TL H 5114
LF13006LF13007
Digital
Gain
Set
February 1995
LF13006 LF13007 Digital Gain Set
General Description
The LF13006 and LF13007 are precision digital gain sets
used for accurately setting non-inverting op amp gains
Gains are set with a 3-bit digital word which can be latched
in with WR and CS pins All digital inputs are TTL and CMOS
compatible
The LF13006 shown below will set binary scaled gains of 1
2 4 8 16 32 64 and 128 The LF13007 will set gains of 1
2 5 10 20 50 and 100 (a common attenuator sequence)
In addition both versions have several taps and two uncom-
mitted matching resistors that allow customization of the
gain
The gains are set with precision thin film resistors The low
temperature coefficient of the thin film resistors and their
excellent tracking result in gain ratios which are virtually in-
dependent of temperature
The LF13006 LF13007 used in conjunction with an amplifi-
er not only satisfies the need for a digitally programmable
amplifier in microprocessor based systems but is also use-
ful for discrete applications eliminating the need to find
0 5% resistors in the ratio of 100 to 1 which track each
other over temperature
Features
Y
TTL and CMOS compatible logic levels
Y
Microprocessor compatible
Y
Gain error 0 5% max
Y
Binary or scope knob gains
Y
Wide supply range
a
5V to
g
18V
Y
Packaged in 16-pin DIP
Block Diagram and Typical Application
(LF13006)
TL H 5114 1
Note
Rj 15 kX
Order Number LF13006N or LF13007N
See NS Package Number N16A
C1995 National Semiconductor Corporation
RRD-B30M115 Printed in U S A
Absolute Maximum Ratings
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Supply Voltage V
a
to V
b
36V
Supply Voltage V
a
to GND
25V
Voltage at Any Digital Input
V
a
to GND
Analog Voltage
V
a
to (V
b
a
2V)
Operating Ratings
(Note 1)
Operating Temperature Range
b
40 C to
a
85 C
Lead Temp (Soldering 10 seconds)
260 C
Electrical Characteristics
(Note 2)
Typ
Tested
Design
Parameter
Conditions
(Note 3)
Limit
Limit
Units
(Note 4)
(Note 5)
Gain Error
A
OUT
e
g
10V
0 3
0 5
0 5
%(max)
ANA GND
e
0V
I
INPUT
k
10 nA
Gain Temperature Coefficient
A
OUT
e
g
10V
0 001
% C
ANA GND
e
0V
Digital Input Voltage
Low
1 4
0 8
0 8
V(max)
High
1 6
2 0
2 0
V(min)
Digital Input Current
Low
V
IL
e
0V
b
38
b
100
b
100
m
A(max)
High
V
IH
e
5V
0 0001
1
1
m
A(max)
Positive Power Supply Current
All Logic Inputs Low
2
5
5
mA(max)
Negative Power Supply Current
All Logic Inputs Low
b
1 7
b
5
b
5
mA(max)
Write Pulse Width t
W
V
IL
e
0V V
IH
e
5V
150
ns(min)
Chip Select Set-Up Time t
CS
V
IL
e
0V V
IH
e
5V
250
ns(min)
Chip Select Hold Time t
CH
V
IL
e
0V V
IH
e
5V
0
ns(min)
DIG IN Set-Up Time t
DS
V
IL
e
0V V
IH
e
5V
150
ns(min)
DIG IN Hold Time t
DH
V
IL
e
0V V
IH
e
5V
60
ns(min)
Switching Time for Gain Change
(Note 4)
200
ns(max)
Switch On Resistance
3
kX
Unit Resistance R
15
12 18
kX
R1 and R2 Mismatch
0 3
0 5
0 5
%(max)
R1 R2 Temperature Coefficient
0 001
% C
Note 1
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur DC and AC electrical specifications do not apply when operating
the device beyond its specified operating conditions
Note 2
Parameters are specified at V
a
e
15V and V
b
e b
15V Min V
a
to ground voltage is 5V Min V
a
to V
b
voltage is 5V Boldface numbers apply over full
operating temperature ranges
All other numbers apply at T
A
e
T
j
e
25 C
Note 3
Typicals are at 25 C and represent most likely parametric norm
Note 4
Guaranteed and 100% production tested
Note 5
Guaranteed (but not 100% production tested) over the operating temperature These limits are not used to calculate outgoing quality levels
Note 6
Settling time for gain change is the switching time for gain change plus settling time (see section on Settling Time)
Note 7
WR minimum high threshold voltage increases to 2 4V under the extreme conditions when all three digital inputs are simultaneously taken from 0V to 5V at
a slew rate of greater than 500V mS
GAIN TABLE
Digital Input
Gain
LF13006
LF13007
DIG in 3
DIG in 2
DIG in 1
A
OUT
B
OUT
A
OUT
B
OUT
0
0
0
1
1
1
1
0
0
1
2
1 25
1 25
1
0
1
0
4
2 5
2
1 6
0
1
1
8
5
5
4
1
0
0
16
10
10
8
1
0
1
32
20
20
16
1
1
0
64
40
50
40
1
1
1
128
80
100
80
Connection Diagram
Dual-In-Line Package
TL H 5114 2
2
Switching Waveforms
TL H 5114 3
Block Diagram and Typical Application
(Continued) (LF13007)
TL H 5114 4
Note
R j 15 kX
3
Typical Performance Characteristics
Positive Power Supply
Current vs Temperature
Logical 0 Input Bias Current
vs Temperature
Negative Power Supply
Current vs Temperature
Digital Input Threshold vs
Supply Voltage
Digital Input Threshold vs
Temperature
Write Width t
w
Data Set-Up Time t
DS
Chip Select Set-Up Time t
cs
TL H 51145
4
Application Information
FLOW-THROUGH OPERATION
THE LF13006 LF13007 can be operated with control lines
CS and WR grounded In this mode new data on the digital
inputs will immediately set the new gain value Input data
cannot be latched in this mode
INPUT CURRENT
Current flowing through the input (pin 2) due to bias current
of the op amp will result in a gain error due to switch imped-
ance Normally this error is very small For example 10 nA
of bias current flowing through 3 kX of switch resistance will
result in an error of 30 mV at the summing node However
applications that have significant current flowing through the
input must take this effect into account
SETTLING TIME
Settling time is a function of the particular op amp used with
the LF13006 7 and the gain that is selected It can be opti-
mized and stability problems can be prevented through the
use of a lead capacitor from the inverting input to the output
of the amplifier A lead capacitor is effective whenever the
feedback around an amplifier is resistive whether with dis-
crete resistors or with the LF13006 7 It compensates for
the feedback pole created by the parallel resistance and
capacitance from the inverting input of the op amp to AC
ground
Settling Time Test Circuit
TL H 5114 6
Typical Settling Time Curves
TL H 5114 7
Unstable at C
L
less than 2 pF
Typical Applications
Variable Capacitance Multiplier
C
effective
e
C1(gain set
)
Note Output swing at input op amp
is multiplied by set gain Signal
range may be limited
TL H 5114 8
Variable Time Constant Filter
Time constant
e
R
N
C1
N
e
setting of LF13006
(range
e
1
128
to 1)
TL H 5114 9
5
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