LM193JAN
Low Power Low Offset Voltage Dual Comparators
General Description
The LM193 series consists of two independent precision
voltage comparators with an offset voltage specification as
low as 2.0 mV max for two comparators which were de-
signed specifically to operate from a single power supply
over a wide range of voltages. Operation from split power
supplies is also possible and the low power supply current
drain is independent of the magnitude of the power supply
voltage. These comparators also have a unique characteris-
tic in that the input common-mode voltage range includes
ground, even though operated from a single power supply
voltage.
Application areas include limit comparators, simple analog to
digital converters; pulse, squarewave and time delay gen-
erators; wide range VCO; MOS clock timers; multivibrators
and high voltage digital logic gates. The LM193 series was
designed to directly interface with TTL and CMOS. When
operated from both plus and minus power supplies, the
LM193 series will directly interface with MOS logic where
their low power drain is a distinct advantage over standard
comparators.
Advantages
n
High precision comparators
n
Reduced V
OS
drift over temperature
n
Eliminates need for dual supplies
n
Allows sensing near ground
n
Compatible with all forms of logic
n
Power drain suitable for battery operation
Features
n
Wide supply
-- Voltage range:
5.0V
DC
to 36V
DC
-- Single or dual supplies:
2.5V
DC
to
18V
DC
n
Very low supply current drain (0.4 mA) -- independent
of supply voltage
n
Low input biasing current:
25 nA typ
n
Low input offset current:
3 nA typ
n
Maximum offset voltage
+5mV Max
@
25C
n
Input common-mode voltage range includes ground
n
Differential input voltage range equal to the power
supply voltage
n
Low output saturation voltage,:
250 mV at 4 mA typ
n
Output voltage compatible with TTL, DTL, ECL, MOS
and CMOS logic systems
Ordering Information
NS Part Number
JAN Part Number
NS Package Number
Package Description
JL193BGA
JM38510/11202BGA
H08C
8LD T0-99 Metal Can
JL193BPA
JM38510/11202BPA
J08A
8LD CERDIP
Squarewave Oscillator
Non-Inverting Comparator with Hysteresis
20143238
20143209
May 2005
LM193JAN
Low
Power
Low
Offset
V
oltage
Dual
Comparators
2005 National Semiconductor Corporation
DS201432
www.national.com
Schematic and Connection Diagrams
20143202
Metal Can Package
20143203
Dual-In-Line Package
20143201
LM193JAN
www.national.com
2
Absolute Maximum Ratings
(Note 1)
Supply Voltage, V
+
36V
DC
or
18V
DC
Differential Input Voltage (Note 5)
36V
Output Voltage
36V
Input Voltage
-0.3V
DC
to +36V
DC
Input Current (V
IN
<
-0.3V
DC
) (Note 4)
50 mA
Power Dissipation (Note 2),
CERDIP
400 mW
@
T
A
= 125C
Metal Can
330 mW
@
T
A
= 125C
Maximum Junction Temperature (T
Jmax
175C
Output Short-Circuit to Ground (Note 3)
Continuous
Operating Temperature Range
-55C
T
A
+125C
Storage Temperature Range
-65C
T
A
+150C
Thermal Resistance
JA
Metal Can (Still Air)
174C/W
Metal Can (500LF/Min Air flow)
99C/W
CERDIP (Still Air)
146C/W
CERDIP (500LF/Min Air flow)
85C/W
JC
Metal Can
44C/W
CERDIP
33C/W
Lead Temperature
(Soldering, 10 seconds)
260C
ESD Tolerance (Note 6)
500V
Quality Conformance Inspection
Mil-Std-883, Method 5005 - Group A
Subgroup
Description
TempC
1
Static tests at
25
2
Static tests at
125
3
Static tests at
-55
4
Dynamic tests at
25
5
Dynamic tests at
125
6
Dynamic tests at
-55
7
Functional tests at
25
8A
Functional tests at
125
8B
Functional tests at
-55
9
Switching tests at
25
10
Switching tests at
125
11
Switching tests at
-55
12
Settling time at
25
13
Settling time at
125
14
Settling time at
-55
LM193JAN
www.national.com
3
LM193 JAN Electrical Characteristics
DC Parameters
Symbol
Parameter
Conditions
Notes
Min
Max
Unit
Sub-
groups
V
IO
Input Offset Voltage
+V
CC
= 30V, -V
CC
= 0V,
V
O
= 15V
-5.0
5.0
mV
1
-7.0
7.0
mV
2, 3
+V
CC
= 2V, -V
CC
= -28V,
V
O
= -13V
-5.0
5.0
mV
1
-7.0
7.0
mV
2, 3
+V
CC
= 5V, -V
CC
= 0V,
V
O
= 1.4V
-5.0
5.0
mV
1
-7.0
7.0
mV
2, 3
+V
CC
= 2V, -V
CC
= -3V,
V
O
= -1.6V
-5.0
5.0
mV
1
-7.0
7.0
mV
2, 3
I
IO
Input offset Current
+V
CC
= 30V, -V
CC
= 0V,
V
O
= 15V, R
S
= 20K
(Note 7)
-25
25
nA
1, 2
(Note 7)
-75
75
nA
3
+V
CC
= 2V, -V
CC
= -28V,
V
O
= -13V, R
S
= 20K
(Note 7)
-25
25
nA
1, 2
(Note 7)
-75
75
nA
3
+V
CC
= 5V, -V
CC
= 0V,
V
O
= 1.4V, R
S
= 20K
(Note 7)
-25
25
nA
1, 2
(Note 7)
-75
75
nA
3
+V
CC
= 2V, -V
CC
= -3V,
V
O
= -1.6V, R
S
= 20K
(Note 7)
-25
25
nA
1, 2
(Note 7)
-75
75
nA
3
I
IB
Input Bias Current
+V
CC
= 30V, -V
CC
= 0V,
V
O
= 15V, R
S
= 20K
(Note 7)
-100
+0.1
nA
1, 2
(Note 7)
-200
+0.1
nA
3
+V
CC
= 2V, -V
CC
= -28V,
V
O
= -13V, R
S
= 20K
(Note 7)
-100
+0.1
nA
1, 2
(Note 7)
-200
+0.1
nA
3
+V
CC
= 5V, -V
CC
= 0V,
V
O
= 1.4V, R
S
= 20K
(Note 7)
-100
+0.1
nA
1, 2
(Note 7)
-200
+0.1
nA
3
+V
CC
= 2V, -V
CC
= -3V,
V
O
= -1.6V, R
S
= 20K
(Note 7)
-100
+0.1
nA
1, 2
(Note 7)
-200
+0.1
nA
3
CMRR
Input Voltage Common Mode
Rejection
2V
+V
CC
30V,
-28V
-V
CC
0V,
-13V
V
O
15V
76
dB
1, 2, 3
2V
+V
CC
5V,
-3V
-V
CC
0V,
-1.6V
V
O
1.4V
70
dB
1, 2, 3
I
CEX
Output Leakage Current
+V
CC
= 30V, -V
CC
= 0V,
V
O
= +30V
1.0
A
1, 2, 3
+I
IL
Input Leakage Current
+V
CC
= 36V, -V
CC
= 0V,
+V
I
= 34V, -V
I
= 0V
-500
500
nA
1, 2, 3
-I
IL
Input Leakage Current
+V
CC
= 36V, -V
CC
= 0V,
+V
I
= 0V, -V
I
= 34V
-500
500
nA
1, 2, 3
V
OL
Logical "0" Output Voltage
+V
CC
= 4.5V, -V
CC
= 0V,
I
O
= 4mA
0.4
V
1
0.7
V
2, 3
+V
CC
= 4.5V, -V
CC
= 0V,
I
O
= 8mA
1.5
V
1
2.0
V
2, 3
I
CC
Power Supply Current
+V
CC
= 5V, -V
CC
= 0V,
V
ID
= 15mV
2.0
mA
1, 2
3.0
mA
3
+V
CC
= 30V, -V
CC
= 0V,
V
ID
= 15mV
3.0
mA
1, 2
4.0
mA
3
IO
/
T
Temperature Coefficient of
Input Offset Voltage
25C
T
A
+125C
(Note 9)
-25
25
V/C
2
-55C
T
A
25C
(Note 9)
-25
25
V/C
3
LM193JAN
www.national.com
4
LM193 JAN Electrical Characteristics
(Continued)
DC Parameters
(Continued)
Symbol
Parameter
Conditions
Notes
Min
Max
Unit
Sub-
groups
I
IO
/
T
Temperature Coefficient of
Input Offset Current
25C
T
A
+125C
(Note 9)
-300
300
pA/C
2
-55C
T
A
25C
(Note 9)
-400
400
pA/C
3
A
VS
Open Loop Voltage Gain
+V
CC
= 15V, -V
CC
= 0V,
R
L
= 15K
,
1V
V
O
11V
(Note 8)
50
V/mV
4
(Note 8)
25
V/mV
5, 6
V
Lat
Voltage Latch (Logical "1"
Input)
+V
CC
= 5V, -V
CC
= 0V,
V
I
= 10V, I
O
= 4mA
0.4
V
9
AC Parameters
The following conditions apply, unless otherwise specified.
+V
CC
= 5V, -V
CC
= 0V
Symbol
Parameter
Conditions
Notes
Min
Max
Unit
Sub-
groups
t
RLH
Response Time
V
I
= 100mV, R
L
= 5.1K
,
V
OD
= 5mV
5.0
S
7, 8B
7.0
S
8A
V
I
= 100mV, R
L
= 5.1K
,
V
OD
= 50mV
0.8
S
7, 8B
1.2
S
8A
t
RHL
Response Time
V
I
= 100mV, R
L
= 5.1K
,
V
OD
= 5mV
2.5
S
7, 8B
3.0
S
8A
V
I
= 100mV, R
L
= 5.1K
,
V
OD
= 50mV
0.8
S
7, 8B
1.0
S
8A
CS
Channel Separation
+V
CC
= 20V, -V
CC
= -10V,
A to B
80
dB
7
+V
CC
= 20V, -V
CC
= -10V,
B to A
80
dB
7
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
Jmax
(maximum junction temperature),
JA
(package junction
to ambient thermal resistance), and T
A
(ambient temperature). The maximum allowable power dissipation at any temperature is P
Dmax
= (T
Jmax
- T
A
)/
JA
or the
number given in the Absolute Maximum Ratings, whichever is lower.
Note 3: Short circuits from the output to V
+
can cause excessive heating and eventual destruction. When considering short circuits to ground, the maximum output
current is approximately 20 mA independent of the magnitude of V
+
.
Note 4: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP
transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action
on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V
+
voltage level (or to ground for a large overdrive) for the time
duration that an input is driven negative. This is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns
to a value greater than -0.3V
DC
.
Note 5: Positive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode range, the
comparator will provide a proper output state. The low input voltage state must not be less than -0.3V (or 0.3V below the magnitude of the negative power supply,
if used).
Note 6: Human body model, 1.5K
in series with 100pF.
Note 7: S/S R
S
= 20K
, tested with R
S
= 100K
for better resolution
Note 8: K in datalog is equivalent to V/mV.
Note 9: Calculated parameter for
V
IO
/
T and I
IO
/
T.
LM193JAN
www.national.com
5
Typical Performance Characteristics
Supply Current
Input Current
20143225
20143226
Output Saturation Voltage
Response Time for Various Input Overdrives -- Negative
Transition
20143227
20143228
Response Time for Various Input Overdrives -- Positive
Transition
20143229
LM193JAN
www.national.com
6
Application Hints
The LM193 series are high gain, wide bandwidth devices
which, like most comparators, can easily oscillate if the
output lead is inadvertently allowed to capacitively couple to
the inputs via stray capacitance. This shows up only during
the output voltage transition intervals as the comparator
change states. Power supply bypassing is not required to
solve this problem. Standard PC board layout is helpful as it
reduces stray input-output coupling. Reducing the input re-
sistors to
<
10 k
reduces the feedback signal levels and
finally, adding even a small amount (1.0 to 10 mV) of positive
feedback (hysteresis) causes such a rapid transition that
oscillations due to stray feedback are not possible. Simply
socketing the IC and attaching resistors to the pins will cause
input-output oscillations during the small transition intervals
unless hysteresis is used. If the input signal is a pulse
waveform, with relatively fast rise and fall times, hysteresis is
not required.
All input pins of any unused comparators should be tied to
the negative supply.
The bias network of the LM193 series establishes a drain
current which is independent of the magnitude of the power
supply voltage over the range of from 2.0 V
DC
to 30 V
DC
.
It is usually unnecessary to use a bypass capacitor across
the power supply line.
The differential input voltage may be larger than V
+
without
damaging the device (Note 5). Protection should be provided
to prevent the input voltages from going negative more than
-0.3 V
DC
(at 25C). An input clamp diode can be used as
shown in the applications section.
The output of the LM193 series is the uncommitted collector
of a grounded-emitter NPN output transistor. Many collectors
can be tied together to provide an output OR'ing function. An
output pull-up resistor can be connected to any available
power supply voltage within the permitted supply voltage
range and there is no restriction on this voltage due to the
magnitude of the voltage which is applied to the V
+
terminal
of the LM193 package. The output can also be used as a
simple SPST switch to ground (when a pull-up resistor is not
used). The amount of current which the output device can
sink is limited by the drive available (which is independent of
V
+
) and the
of this device. When the maximum current limit
is reached (approximately 16mA), the output transistor will
come out of saturation and the output voltage will rise very
rapidly. The output saturation voltage is limited by the ap-
proximately 60
r
SAT
of the output transistor. The low offset
voltage of the output transistor (1.0mV) allows the output to
clamp essentially to ground level for small load currents.
Typical Applications
(V
+
=5.0 V
DC
)
Basic Comparator
Driving CMOS
Driving TTL
20143235
20143236
20143237
Squarewave Oscillator
Pulse Generator
Crystal Controlled Oscillator
20143238
20143239
* For large ratios of R1/R2,
D1 can be omitted.
20143240
LM193JAN
www.national.com
7
Typical Applications
(V
+
=5.0 V
DC
) (Continued)
Two-Decade High Frequency VCO
20143241
V* = +30 V
DC
+250 mV
DC
V
C
+50 V
DC
700Hz
f
o
100kHz
Basic Comparator
Non-Inverting Comparator with Hysteresis
20143206
20143209
Inverting Comparator with Hysteresis
Output Strobing
20143210
20143211
LM193JAN
www.national.com
8
Typical Applications
(V
+
=5.0 V
DC
) (Continued)
AND Gate
OR Gate
20143212
20143213
Large Fan-in AND Gate
Limit Comparator
20143214
20143215
Comparing Input Voltages of Opposite Polarity
ORing the Outputs
20143216
20143217
LM193JAN
www.national.com
9
Typical Applications
(V
+
=5.0 V
DC
) (Continued)
Zero Crossing Detector (Single Power Supply)
One-Shot Multivibrator
20143221
20143222
Bi-Stable Multivibrator
One-Shot Multivibrator with Input Lock Out
20143224
20143223
Zero Crossing Detector
Comparator With a Negative Reference
20143243
20143244
LM193JAN
www.national.com
10
Typical Applications
(V
+
=5.0 V
DC
) (Continued)
Time Delay Generator
20143207
Split-Supply Applications
(V
+
=+15 V
DC
and V
-
=-15 V
DC
)
MOS Clock Driver
20143242
LM193JAN
www.national.com
11
Revision History Section
Date Released Revision
Section
Originator
Changes
05/09/05
A
New Release. Corporate format
L. Lytle
1 MDS datasheets converted into one Corp.
datasheet format. DC Drift table was deleted
due to no JANS product offerings.
MJLM193-X Rev 1A1 MDS will be archived.
LM193JAN
www.national.com
12
Physical Dimensions
inches (millimeters) unless otherwise noted
Metal Can Package (H)
NS Package Number H08C
Ceramic Dual-In-Line Package
NS Package Number J08A
LM193JAN
www.national.com
13
Notes
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
LIFE SUPPORT POLICY
NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS
WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body, or
(b) support or sustain life, and whose failure to perform when
properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result
in a significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.
BANNED SUBSTANCE COMPLIANCE
National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products
Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain
no ``Banned Substances'' as defined in CSP-9-111S2.
National Semiconductor
Americas Customer
Support Center
Email: new.feedback@nsc.com
Tel: 1-800-272-9959
National Semiconductor
Europe Customer Support Center
Fax: +49 (0) 180-530 85 86
Email: europe.support@nsc.com
Deutsch Tel: +49 (0) 69 9508 6208
English
Tel: +44 (0) 870 24 0 2171
Franais Tel: +33 (0) 1 41 91 8790
National Semiconductor
Asia Pacific Customer
Support Center
Email: ap.support@nsc.com
National Semiconductor
Japan Customer Support Center
Fax: 81-3-5639-7507
Email: jpn.feedback@nsc.com
Tel: 81-3-5639-7560
www.national.com
LM193JAN
Low
Power
Low
Offset
V
oltage
Dual
Comparators
PDF 
ZIP