LM2437
Monolithic Triple 7.5 ns CRT Driver
General Description
The LM2437 is an integrated high voltage CRT driver circuit
designed for use in color monitor applications. The IC con-
tains three high input impedance, wide band amplifiers
which directly drive the RGB cathodes of a CRT. Each chan-
nel has its gain internally set to -14 and can drive CRT ca-
pacitive loads as well as resistive loads present in other ap-
plications, limited only by the package's power dissipation.
The IC is packaged in an industry standard 9-lead TO-220
molded plastic power package. See Thermal Considerations
section.
Features
n
Well matched with LM1279 video preamp
n
0V to 4.5V input range
n
Stable with 020 pF capacitive loads and inductive
peaking networks
n
Convenient TO-220 staggered lead package style
n
Standard LM243X Family Pinout which is designed for
easy PCB layout
Applications
n
1024 x 768 displays up to 85 Hz refresh
n
Pixel clock frequencies up to 100 MHz
n
Monitors using video blanking
Schematic and Connection Diagrams
DS100932-1
FIGURE 1. Simplified Schematic Diagram
(One Channel)
DS100932-2
Note: Tab is at GND
Top View
Order Number LM2437T
August 1999
LM2437
Monolithic
T
riple
7.5
ns
CRT
Driver
1999 National Semiconductor Corporation
DS100932
www.national.com
Absolute Maximum Ratings
(Notes 1, 3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC
)
+90V
Bias Voltage (V
BB
)
+16V
Input Voltage (V
IN
)
0V to 6V
Storage Temperature Range (T
STG
)
-65C to +150C
Lead Temperature
(Soldering,
<
10 sec.)
300C
ESD Tolerance, Human Body Model
2 kV
Machine Model
250V
Operating Ranges
(Note 2)
V
CC
+60V to +85V
V
BB
+8V to +15V
V
IN
+0V to +5V
V
OUT
+15V to +75V
Case Temperature
-20C to +100C
Do not operate the part without a heat sink.
Electrical Characteristics
(See
Figure 2 for Test Circuit)
Unless otherwise noted: V
CC
= +80V, V
BB
= +12V, V
IN
= +2.7 V
DC
, C
L
= 8 pF, Output = 40 V
PP
at 1 MHz, T
C
= 50C.
Symbol
Parameter
Conditions
LM2437
Units
Min
Typical
Max
I
CC
Supply Current
All Three Channels, No Input Signal,
No Output Load
34.5
mA
I
BB
Bias Current
All Three Channels
11
mA
V
OUT
DC Output Voltage
No AC Input Signal, V
IN
= 1.2V
62
65
68
V
DC
A
V
DC Voltage Gain
No AC Input Signal
-12
-14
-16
A
V
Gain Matching
(Note 4), No AC Input Signal
1.0
dB
LE
Linearity Error
(Notes 4, 5), No AC Input Signal
8
%
t
R
Rise Time
(Note 6), 10% to 90%
7.5
ns
t
F
Fall Time
(Note 6), 90% to 10%
7.5
ns
OS
Overshoot
(Note 6)
5
%
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: Operating ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and
test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may
change when the device is not operated under the listed test conditions.
Note 3: All voltages are measured with respect to GND, unless otherwise specified.
Note 4: Calculated value from Voltage Gain test on each channel.
Note 5: Linearity Error is the variation in dc gain from V
IN
= 1.0V to V
IN
= 4.5V.
Note 6: Input from signal generator: t
r
, t
f
<
1 ns.
AC Test Circuit
Figure 2 shows a typical test circuit for evaluation of the LM2437. This circuit is designed to allow testing of the LM2437 in a 50
environment without the use of an expensive FET probe. The two 2490
resistors form a 200:1 divider with the 50
resistor and
the oscilloscope. A test point is included for easy use of an oscilloscope probe.The compensation capacitor is used to compen-
sate the stray capacitance of the two 2490
resistors to achieve flat frequency response.
DS100932-3
Note: 8 pF load includes parasitic capacitance.
FIGURE 2. Test Circuit (One Channel)
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2
Typical Performance Characteristics
(V
CC
= +80 V
DC
, V
BB
= +12 V
DC
, C
L
= 8 pF, V
OUT
= 40 V
PP
(25V-65V), Test Circuit -
Figure 2 unless otherwise specified)
DS100932-4
FIGURE 3. V
OUT
vs V
IN
DS100932-5
FIGURE 4. Speed vs Temp.
DS100932-6
FIGURE 5. LM2437 Pulse Response
DS100932-7
FIGURE 6. Power Dissipation vs Frequency
DS100932-8
FIGURE 7. Speed vs Offset
DS100932-9
FIGURE 8. Speed vs Load Capacitance
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3
Theory of Operation
The LM2437 is a high voltage monolithic three channel CRT
driver suitable for high resolution display applications. The
LM2437 operates with 80V and 12V power supplies. The
part is housed in the industry standard 9-lead TO-220
molded plastic power package.
The circuit diagram of the LM2437 is shown in
Figure 1. The
PNP emitter follower, Q5, provides input buffering. Q1 and
Q2 form a fixed gain cascode amplifier with resistors R1 and
R2 setting the gain at -14. Emitter followers Q3 and Q4 iso-
late the high output impedance of the cascode stage from
the capacitance of the CRT cathode which decreases the
sensitivity of the device to load capacitance. Q6 provides bi-
asing to the output emitter follower stage to reduce cross-
over distortion at low signal levels.
Figure 2 shows a typical test circuit for evaluation of the
LM2437. This circuit is designed to allow testing of the
LM2437 in a 50
environment without the use of an expen-
sive FET probe. In this test circuit, the two 2.49k
resistors
form a 200:1 wideband, low capacitance probe when con-
nected to a 50
coaxial cable and a 50
load (such as a
50
oscilloscope input). The input signal from the generator
is ac coupled to the base of Q5.
Application Hints
INTRODUCTION
National Semiconductor (NSC) is committed to provide ap-
plication information that assists our customers in obtaining
the best performance possible from our products. The follow-
ing information is provided in order to support this commit-
ment. The reader should be aware that the optimization of
performance was done using a specific printed circuit board
designed at NSC. Variations in performance can be realized
due to physical changes in the printed circuit board and the
application. Therefore, the designer should know that com-
ponent value changes may be required in order to optimize
performance in a given application. The values shown in this
document can be used as a starting point for evaluation pur-
poses. When working with high bandwidth circuits, good lay-
out practices are also critical to achieving maximum perfor-
mance.
IMPORTANT INFORMATION
The LM2437 performance is targeted for the XGA (1024 x
768, 85 Hz refresh) resolution market. The application cir-
cuits shown in this document to optimize performance and to
protect against damage from CRT arcover are designed spe-
cifically for the LM2437. If another member of the LM243X
family is used, please refer to its datasheet.
POWER SUPPLY BYPASS
Since the LM2437 is a wide bandwidth amplifier, proper
power supply bypassing is critical for optimum performance.
Improper power supply bypassing can result in large over-
shoot, ringing or oscillation. 0.1 F capacitors should be con-
nected from the supply pins, V
CC
and V
BB
, to ground, as
close to the LM2437 as is practical. Additionally, a 47 F or
larger electrolytic capacitor should be connected from both
supply pins to ground reasonably close to the LM2437.
ARC PROTECTION
During normal CRT operation, internal arcing may occasion-
ally occur. Spark gaps, in the range of 200V, connected from
the CRT cathodes to CRT ground will limit the maximum volt-
age, but to a value that is much higher than allowable on the
LM2437. This fast, high voltage, high energy pulse can dam-
age the LM2437 output stage. The application circuit shown
in
Figure 9 is designed to help clamp the voltage at the out-
put of the LM2437 to a safe level. The clamp diodes, D1 and
D2, should have a fast transient response, high peak current
rating, low series impedance and low shunt capacitance.
FDH400 or equivalent diodes are recommended. Do not use
1N4148 diodes for the clamp diodes. D1 and D2 should have
short, low impedance connections to V
CC
and ground re-
spectively. The cathode of D1 should be located very close
to a separately decoupled bypass capacitor (C3 in
Figure 9).
The ground connection of D2 and the decoupling capacitor
should be very close to the LM2437 ground. This will signifi-
cantly reduce the high frequency voltage transients that the
LM2437 would be subjected to during an arcover condition.
Resistor R2 limits the arcover current that is seen by the di-
odes while R1 limits the current into the LM2437 as well as
the voltage stress at the outputs of the device. R2 should be
a
1
/
2
W solid carbon type resistor. R1 can be a
1
/
4
W metal or
carbon film type resistor. Having large value resistors for R1
and R2 would be desirable, but this has the effect of increas-
ing rise and fall times. Inductor L1 is critical to reduce the ini-
tial high frequency voltage levels that the LM2437 would be
subjected to. The inductor will not only help protect the de-
vice but it will also help minimize rise and fall times as well as
minimize EMI. For proper arc protection, it is important to not
omit any of the arc protection components shown in
Figure
9.
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Application Hints
(Continued)
OPTIMIZING TRANSIENT RESPONSE
Referring to
Figure 9, there are three components (R1, R2
and L1) that can be adjusted to optimize the transient re-
sponse of the application circuit. Increasing the values of R1
and R2 will slow the circuit down while decreasing over-
shoot. Increasing the value of L1 will speed up the circuit as
well as increase overshoot. It is very important to use induc-
tors with very high self-resonant frequencies, preferably
above 300 MHz. Ferrite core inductors from J.W. Miller Mag-
netics (part # 78FR56M) were used for optimizing the perfor-
mance of the device in the NSC application board. The val-
ues shown in
Figure 9 can be used as a good starting point
for the evaluation of the LM2437. The NSC demo board also
has a position open to add a resistor in parallel with L1. This
resistor can be used to help control overshoot. Using vari-
able resistors for R1 and the parallel resistor will simplify
finding the values needed for optimum performance in a
given application. Once the optimum values are determined
the variable resistors can be replaced with fixed values.
EFFECT OF LOAD CAPACITANCE
Figure 8 shows the effect of increased load capacitance on
the speed of the device. This demonstrates the importance
of knowing the load capacitance in the application.
EFFECT OF OFFSET
Figure 7 shows the variation in rise and fall times when the
output offset of the device is varied from 40 to 50 V
DC
. The
rise time shows a maximum variation relative to the center
data point (45 V
DC
) of about 20%. The fall time shows a
variation of about 5% relative to the center data point.
THERMAL CONSIDERATIONS
Figure 4 shows the performance of the LM2437 in the test
circuit shown in
Figure 2 as a function of case temperature.
The figure shows that the rise time of the LM2437 increases
by approximately 5% as the case temperature increases
from 50C to 100C. This corresponds to a speed degrada-
tion of 1% for every 10C rise in case temperature.There is a
negligible change in fall time vs. temperature in the test cir-
cuit.
Figure 6 shows the maximum power dissipation of the
LM2437 vs. Frequency when all three channels of the device
are driving an 8 pF load with a 40 V
p-p
alternating one pixel
on, one pixel off signal. The graph assumes a 72% active
time (device operating at the specified frequency) which is
typical in a monitor application. The other 28% of the time
the device is assumed to be sitting at the black level (65V in
this case). This graph gives the designer the information
needed to determine the heat sink requirement for his appli-
cation. The designer should note that if the load capacitance
is increased the AC component of the total power dissipation
will also increase.
The LM2437 case temperature must be maintained below
100C. If the maximum expected ambient temperature is
70C and the maximum power dissipation is 6.2W (from
Fig-
ure 6, 50 MHz bandwidth) then a maximum heat sink thermal
resistance can be calculated:
This example assumes a capacitive load of 8 pF and no re-
sistive load.
TYPICAL APPLICATION
A typical application of the LM2437 is shown in
Figure 10.
Used in conjunction with an LM1279, a complete video chan-
nel from monitor input to CRT cathode can be achieved. Per-
formance is ideal for 1024 x 768 resolution displays with
pixel clock frequencies up to 100 MHz.
Figure 10 is the sche-
matic for the NSC demonstration board that can be used to
evaluate the LM1279/2437 combination in a monitor.
PC BOARD LAYOUT CONSIDERATIONS
For optimum performance, an adequate ground plane, isola-
tion between channels, good supply bypassing and minimiz-
ing unwanted feedback are necessary. Also, the length of the
signal traces from the preamplifier to the LM2437 and from
the LM2437 to the CRT cathode should be as short as pos-
sible. The following references are recommended:
Ott, Henry W., "Noise Reduction Techniques in Electronic
Systems", John Wiley & Sons, New York, 1976.
"Video Amplifier Design for Computer Monitors", National
Semiconductor Application Note 1013.
Pease,
Robert A.,
"Troubleshooting Analog
Circuits",
Butterworth-Heinemann, 1991.
Because of its high small signal bandwidth, the part may os-
cillate in a monitor if feedback occurs around the video chan-
nel through the chassis wiring. To prevent this, leads to the
video amplifier input circuit should be shielded, and input cir-
cuit wiring should be spaced as far as possible from output
circuit wiring.
NSC DEMONSTRATION BOARD
Figure 11 shows the routing and component placement on
the NSC LM1279/2437 demonstration board. The schematic
of the board is shown in
Figure 10. This board provides a
DS100932-10
FIGURE 9. One Channel of the LM2437 with the Recommended Arc Protection Circuit
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5
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