LM25115
Secondary Side Post Regulator Controller
General Description
The LM25115 controller contains all of the features neces-
sary to implement multiple output power converters utilizing
the Secondary Side Post Regulation (SSPR) technique. The
SSPR technique develops a highly efficient and well regu-
lated auxiliary output from the secondary side switching
waveform of an isolated power converter. Regulation of the
auxiliary output voltage is achieved by leading edge pulse
width modulation (PWM) of the main channel duty cycle.
Leading edge modulation is compatible with either current
mode or voltage mode control of the main output. The
LM25115 drives external high side and low side NMOS
power switches configured as a synchronous buck regulator.
A current sense amplifier provides overload protection and
operates over a wide common mode input range. Additional
features include a low dropout (LDO) bias regulator, error
amplifier, precision reference, adaptive dead time control of
the gate signals and thermal shutdown.
Features
n
Self-synchronization to main channel output
n
Free-run mode for buck regulation of DC input
n
Leading edge pulse width modulation
n
Voltage-mode control with current injection and input line
feed-forward
n
Operates from AC or DC input up to 42V
n
Wide 4.5V to 30V bias supply range
n
Wide 0.75V to 13.5V output range.
n
Top and bottom gate drivers sink 2.5A peak
n
Adaptive gate driver dead-time control
n
Wide bandwidth error amplifier (4MHz)
n
Programmable soft-start
n
Thermal shutdown protection
n
TSSOP-16 or thermally enhanced LLP-16 packages
Typical Application Circuit
20172601
FIGURE 1. Simplified Multiple Output Power Converter Utilizing SSPR Technique
November 2005
LM251
15
Secondary
Side
Post
Regulator
Controller
2005 National Semiconductor Corporation
DS201726
www.national.com
Connection Diagram
20172602
16-Lead TSSOP, LLP
See NS Package Numbers MTC16 and SDA16A
Ordering Information
Ordering Number
Package Type
NSC Package Drawing
Supplied As
LM25115MT
TSSOP-16
MTC16
92 Units Per Anti-Static Tube
LM25115MTX
TSSOP-16
MTC16
2500 shipped as Tape & Reel
LM25115SD
LLP-16
SDA16A
Available Soon
LM25115SDX
LLP-16
SDA16A
Available Soon
Pin Descriptions
Pin
Name
Description
Application Information
1
CS
Current Sense amplifier positive input
A low inductance current sense resistor is connected between
CS and VOUT. Current limiting occurs when the differential
voltage between CS and VOUT exceeds 45mV (typical).
2
VOUT
Current sense amplifier negative input
Connected directly to the output voltage. The current sense
amplifier operates over a voltage range from 0V to 13.5V at the
VOUT pin.
3
AGND
Analog ground
Connect directly to the power ground pin (PGND).
4
CO
Current limit output
For normal current limit operation, connect the CO pin to the
COMP pin. Leave this pin open to disable the current limit
function.
5
COMP
Compensation. Error amplifier output
COMP pin pull-up is provided by an internal 300uA current
source.
6
FB
Feedback. Error amplifier inverting input
Connected to the regulated output through the feedback resistor
divider and compensation components. The non-inverting input
of the error amplifier is internally connected to the SS pin.
7
SS
Soft-start control
An external capacitor and the equivalent impedance of an
internal resistor divider connected to the bandgap voltage
reference set the soft-start time. The steady state operating
voltage of the SS pin equal to 0.75V (typical).
8
RAMP
PWM Ramp signal
An external capacitor connected to this pin sets the ramp slope
for the voltage mode PWM. The RAMP capacitor is charged
with a current that is proportional to current into the SYNC pin.
The capacitor is discharged at the end of every cycle by an
internal MOSFET.
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Pin Descriptions
(Continued)
Pin
Name
Description
Application Information
9
SYNC
Synchronization input
A low impedance current input pin. The current into this pin sets
the RAMP capacitor charge current and the frequency of an
internal oscillator that provides a clock for the free-run (DC
input) mode .
10
PGND
Power Ground
Connect directly to the analog ground pin (AGND).
11
LO
Low side gate driver output
Connect to the gate of the low side synchronous MOSFET
through a short, low inductance path.
12
VCC
Output of bias regulator
Nominal 7V output from the internal LDO bias regulator. Locally
decouple to PGND using a low ESR/ESL capacitor located as
close to controller as possible.
13
HS
High side MOSFET source connection
Connect to negative terminal of the bootstrap capacitor and the
source terminal of the high side MOSFET.
14
HO
High side gate driver output
Connect to the gate of high side MOSFET through a short, low
inductance path.
15
HB
High side gate driver bootstrap rail
Connect to the cathode of the bootstrap diode and the positive
terminal of the bootstrap capacitor. The bootstrap capacitor
supplies current to charge the high side MOSFET gate and
should be placed as close to controller as possible.
16
VBIAS
Supply Bias Input
Input to the LDO bias regulator and current sense amplifier that
powers internal blocks. Input range of VBIAS is 4.5V to 30V.
-
Exposed Pad
(LLP
Package
Only)
Exposed Pad, underside of LLP package Internally bonded to the die substrate. Connect to system
ground for low thermal impedance.
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Block Diagram
20172603
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Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VBIAS to GND
0.3V to 32V
VCC to GND
0.3V to 9V
HS to GND
1V to 45V
VOUT, CS to GND
0.3V to 15V
All other inputs to GND
-0.3V to 7.0V
Storage Temperature Range
55C to +150C
Junction Temperature
+150C
ESD Rating
HBM (Note 2)
2 kV
Operating Ratings
VBIAS supply voltage
5V to 30V
VCC supply voltage
5V to 7.5V
HS voltage
0V to 42V
HB voltage
VCC + HS
Operating Junction Temperature
40C to +125C
Typical Operating Conditions
Parameter
Min
Typ
Max
Units
Supply Voltage, VBIAS
4.5
30
V
Supply Voltage, VCC
4.5
7
V
Supply voltage bypass, CVBIAS
0.1
1
F
Reference bypass capacitor, CVCC
0.1
1
10
F
HB-HS bootstrap capacitor
0.047
F
SYNC Current Range (VCC = 4.5V)
50
150
A
RAMP Saw Tooth Amplitude
1
1.75
V
VOUT regulation voltage (VBIAS min = 3V + VOUT)
0.75
13.5
V
Electrical Characteristics
Unless otherwise specified, T
J
= 40C to +125C, VBIAS = 12V, No Load on
LO or HO.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
VBIAS SUPPLY
Ibias
VBIAS Supply Current
F
SYNC
= 200kHz
4
mA
VCC LOW DROPOUT BIAS REGULATOR
VccReg
VCC Regulation
VCC open circuit. Outputs not
switching
6.65
7
7.15
V
VCC Current Limit
(Note 4)
40
mA
VCC Under-voltage Lockout Voltage Positive going VCC
4
4.5
V
VCC Under-voltage Hysteresis
0.2
0.25
0.3
V
SOFT-START
SS Source Impedance
43
60
77
k
SS Discharge Impedance
100
ERROR AMPLIFIER and FEEDBACK REFERENCE
VREF
FB Reference Voltage
Measured at FB pin
0.737
0.75
0.763
V
FB Input Bias Current
FB = 2V
0.2
0.5
A
COMP Source Current
300
A
Open Loop Voltage Gain
60
dB
GBW
Gain Bandwidth Product
4
MHz
Vio
Input Offset Voltage
-7
0
7
mV
COMP Offset
Threshold for V
HO
= high RAMP = CS
= VOUT = 0V
2
V
RAMP Offset
Threshold for V
HO
= high COMP =
1.5V, CS = VOUT = 0V
1.1
V
CURRENT SENSE AMPLIFIER
Current Sense Amplifier Gain
16
V/V
Output DC Offset
1.27
V
Amplifier Bandwidth
500
kHz
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