LMH0030
SMPTE 292M/259M Digital Video Serializer with Video
and Ancillary Data FIFOs and Integrated Cable Driver
General Description
The LMH0030 SMPTE 292M/259M Digital Video Serializer
with Ancillary Data FIFO and Integrated Cable Driver is a
monolithic integrated circuit that encodes, serializes and
transmits bit-parallel digital video data conforming to SMPTE
125M and 267M standard definition, 10-bit wide component
video and SMPTE 260M, 274M, 295M and 296M high-
definition, 20-bit wide component video standards. The
LMH0030 operates at SMPTE 259M serial data rates of
270 Mbps, 360 Mbps, the SMPTE 344M serial data rate of
540 Mbps; and the SMPTE 292M serial data rates of 1483.5
and 1.485 Gbps. The serial data clock frequency is internally
generated and requires no external frequency setting, trim-
ming or filtering components.
The LMH0030 performs functions which include: parallel-to-
serial data conversion, SMPTE standard data encoding,
NRZ to NRZI data format conversion, serial data clock gen-
eration and encoding with the serial data, automatic video
rate and format detection, ancillary data packet manage-
ment and insertion, and serial data output driving. The
LMH0030 has circuitry for automatic EDH/CRC character
and flag generation and insertion per SMPTE RP-165 (stan-
dard definition) or SMPTE 292M (high definition). Optional
LSB dithering is implemented which prevents pathological
pattern generation. Unique to the LMH0030 are its video and
ancillary data FIFOs. The video FIFO allows the video data
to be delayed from 0 to 4 parallel data clock periods for video
timing purposes. The ancillary data port and on-chip FIFO
and control circuitry store and insert ancillary flags, data
packets and checksums into the ancillary data space. The
LMH0030 also has an exclusive built-in self-test (BIST) and
video test pattern generator (TPG) with SD and HD compo-
nent video test patterns: reference black, PLL and EQ patho-
logicals and color bars in 4:3 and 16:9 raster formats for
NTSC and PAL standards*. The color bar patterns feature
optional bandwidth limiting coding in the chroma and luma
transitions.
The LMH0030 has a unique multi-function I/O port for imme-
diate access to control and configuration settings. This port
may be programmed to provide external access to control
functions and indicators as inputs and outputs. The designer
can thus customize the LMH0030 to fit the desired applica-
tion. At power-up or after a reset command, the LMH0030 is
auto-configured to a default operating condition. Separate
power pins for the output driver, PLL and the serializer
improve power supply rejection, output jitter and noise per-
formance.
The LMH0030's internal circuitry is powered from +2.5V and
the I/O circuitry from a +3.3V supply. Power dissipation is
typically 430mW at 1.485 Gbps including two 75
AC-
coupled and back-matched output loads. The device is pack-
aged in a 64-pin TQFP.
Features
n
SDTV/HDTV serial digital video standard compliant
n
Supports 270 Mbps, 360 Mbps, 540 Mbps, 1.4835Gbps
and 1.485 Gbps SDV data rates with auto-detection
n
Low output jitter: 125ps max, 85ps typical
n
Low power: typically 430mW
n
No external serial data rate setting or VCO filtering
components required*
n
Fast PLL lock time:
<
150s typical at 1.485 Gbps
n
Adjustable depth video FIFO for timing alignment
n
Built-in self-test (BIST) and video test pattern generator
(TPG)*
n
Automatic EDH/CRC word and flag generation and
insertion
n
On-chip ancillary data FIFO and insertion control
circuitry
n
Flexible control and configuration I/O port
n
LVCMOS compatible data and control inputs and
outputs
n
75
ECL-compatible, differential, serial cable-driver
outputs
n
3.3V I/O power supply and 2.5V logic power supply
operation
n
64-pin TQFP package
* Patent applications made or pending.
Applications
n
SDTV/HDTV parallel-to-serial digital video interfaces for:
-- Video cameras
-- VTRs
-- Telecines
-- Digital video routers and switchers
-- Digital video processing and editing equipment
-- Video test pattern generators and digital video test
equipment
-- Video signal generators
Order Number LMH0030VS
64-Pin TQFP
NS Package Number VEC-64A
PRELIMINARY
April 2006
LMH0030
SMPTE
292M/259M
Digital
V
ideo
Serializer
with
V
ideo
and
Ancillary
Data
FIFOs
and
Integrated
Cable
Driver
2006 National Semiconductor Corporation
DS201803
www.national.com
Absolute Maximum Ratings
(Note 1) It
is anticipated that this device will not be offered in a
military qualified version. If Military/Aerospace specified
devices are required, please contact the National Semicon-
ductor Sales Office / Distributors for availability and specifi-
cations.
CMOS I/O Supply Voltage
(V
DDIO
V
SSIO
):
4.0V
SDO Supply Voltage
(V
DDSD
V
SSSD
):
4.0V
Digital Logic Supply Voltage
(V
DDD
V
SSD
):
3.0V
PLL Digital Supply Voltage
(V
DDPLL
V
SSPLL
):
3.0V
PLL Analog Supply Voltage
(V
DDPLLA
V
SSPLLA
), (V
DDZ
-V
SSD
) :
3.0V
CMOS Input Voltage
(Vi):
V
SSIO
-0.15V to
V
DDIO
+0.15V
CMOS Output Voltage
(Vo):
V
SSIO
-0.15V to
V
DDIO
+0.15V
CMOS Input Current (single input):
Vi = V
SSIO
-0.15V:
-5 mA
Vi = V
DDIO
+0.15V:
+5 mA
CMOS Output Source/Sink Current:
10 mA
SDO Output Sink Current:
40 mA
Package Thermal Resistance
JA
@
0 LFM Airflow
47C/W
JA
@
500 LFM Airflow
27C/W
JC
6.5C/W
Storage Temp. Range:
-65C to +150C
Junction Temperature:
+150C
Lead Temperature (Soldering 4 Sec):
+260C
ESD Rating (HBM):
2 kV
ESD Rating (MM):
250V
Recommended Operating Conditions
Symbol
Parameter
Conditions
Reference
Min
Typ
Max
Units
V
DDIO
CMOS I/O Supply Voltage
V
DDIO
-V
SSIO
3.150
3.300
3.450
V
V
DDSD
SDO Supply Voltage
V
DDSD
-V
SSSD
3.150
3.300
3.450
V
V
DDD
Digital Logic Supply
Voltage
V
DDD
V
SSD
2.375
2.500
2.625
V
V
DDPLL
PLL Supply Voltage
V
DDPLL
V
SSPLL
2.375
2.500
2.625
V
V
DDZ
Analog Supply Voltage
V
DDZ
V
SSD
2.375
2.500
2.625
V
V
IL
CMOS Input Voltage, Low
Level
V
SSIO
V
V
IH
CMOS Input Voltage High
Level
V
DDIO
V
T
A
Operating Free Air
Temperature
0
+70
C
t
JIT
Video Clock Jitter
V
CLK
30
ps
P-P
DC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (Notes 2, 3).
Symbol
Parameter
Conditions
Reference
Min
Typ
Max
Units
V
IH
Input Voltage High Level
All LVCMOS
Inputs
2.0
V
DDIO
V
V
IL
Input Voltage Low Level
V
SSIO
0.8
V
I
IH
Input Current High Level
V
IH
= V
DDIO
+90
+150
A
I
IL
Input Current Low Level
V
IL
= V
SSIO
-1
-20
A
V
OH
CMOS Output Voltage
High Level
I
OH
= -6.6 mA
All LVCMOS
Outputs
2.4
2.7
V
DDIO
V
V
OL
CMOS Output Voltage
Low Level
I
OL
= +6.6 mA
V
SSIO
V
SSIO
+0.3
V
SSIO
+0.5V
V
V
SDO
Serial Driver Output
Voltage
Test Circuit, Test Loads
Shall Apply
SDO, SDO
720
800
880
mV
P-P
I
DD
(3.3V) Power Supply Current,
3.3V Supply, Total
V
CLK
= 27 MHz, NTSC
color Bar Pattern, Test
Circuit, Test Loads Shall
Apply
V
DDIO
, V
DDSD
48
65
mA
LMH0030
www.national.com
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