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Semiconductor
MSM82C37B-5RS/GS/VJS
GENERAL DESCRIPTION
The MSM82C37B-5RS/GS/VJS, DMA (Direct Memory Access) controller is capable of high-
speed data transfer without CPU intervention and is used as a peripheral device in microcomputer
systems. The device features four independent programmable DMA channels.
Due to the use of silicon gate CMOS technology, standby current is 10 mA (max.), and power
consumption is as low as 10 mA (max.) when a 5 MHz clock is generated.
All items of AC characteristics are compatible with intel 8237A-5.
FEATURES
Maximum operating frequency of 5 MHz (Vcc = 5 V
10%)
High-speed operation at very low power consumption due to silicon gate CMOS technology
Wide operating temperature range from 40
C to +85
C
4-channels independent DMA control
DMA request masking and programming
DMA request priority function
DREQ and DACK input/output logic inversion
DMA address increment/decrement selection
Memory-to-Memory Transfers
Channel extension by cascade connection
DMA transfer termination by EOP input
Intel 8237A-5 compatibility
TTL Compatible
40-pin Plastic DIP (DIP40-P-600-2.54): (Product name: MSM82C37B-5RS)
44-pin Plastic QFJ (QFJ44-P-S650-1.27): (Product name: MSM82C37B-5VJS)
44-pin Plastic QFP (QFP44-P-910-0.80-2K): (Product name: MSM82C37B-5GS-2K)
Semiconductor
MSM82C37B-5RS/GS/VJS
PROGRAMMABLE DMA CONTROLLER
E2O0016-39-81
This version: Aug. 1999
Previous version: Jan. 1998
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Semiconductor
MSM82C37B-5RS/GS/VJS
PIN CONFIGURATION (TOP VIEW)
40 pin Plastic DIP
16
15
14
13
IOR
MEMR
MEMW
READY
HLDA
ADSTB
AEN
HRQ
CS
20
19
18
17
GND
A
7
A
6
A
5
A
4
A
3
EOP
A
2
A
1
A
0
DB
0
DB
1
DB
2
DB
3
DB
4
DACK
0
1
2
3
4
5
6
7
8
9
10
11
12
32
31
30
29
28
27
26
37
38
39
40
36
35
34
33
25
DACK
1
DB
5
DB
6
DB
7
24
23
22
21
V
CC
(+5 V)
DREQ
0
DREQ
1
DREQ
2
IOW
NC
DREQ
3
DACK
3
DACK
2
RESET
CLK
44 pin Plastic QFP
V
CC
33
32
31
30
29
28
27
A
3
A
2
A
1
A
0
NC
DB
0
READY
HLDA
ADSTB
AEN
HRQ
NC
CS
12
13
14
15
16
17
18
DREQ
3
DREQ
2
DREQ
1
DREQ
0
GND
NC
DB
7
44
43
42
41
40
39
38
NC
MEMW
MEMR
IOW
IOR
NC
1
2
3
4
5
6
7
26
25
24
23
DB
1
DB
2
DB
3
CLK
RESET
DACK
2
DACK
3
8
9
10
11
DB
4
19
20
21
22
DB
6
DB
5
DACK
1
DACK
0
37
36
35
34
A
6
A
7
A
5
A
4
EOP
39
38
37
36
35
34
33
NC
A
3
A
2
A
1
A
0
DB
4
DB
0
NC
READY
HLDA
ADSTB
AEN
HRQ
CS
18
19
20
21
22
23
24
DACK
3
DREQ
3
DREQ
2
DREQ
1
DREQ
0
GND
DB
7
6
5
4
3
2
1
44
NC
MEMW
MEMR
IOW
IOR
NC
A
7
7
8
9
10
11
12
13
32
31
30
29
DB
1
DB
2
DB
3
CLK
RESET
DACK2
NC
14
15
16
17
V
CC
25
26
27
28
DB
6
DB
5
DACK
1
DACK
0
43
42
41
40
A
6
A
5
A
4
EOP
44 pin Plastic QFJ
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Semiconductor
MSM82C37B-5RS/GS/VJS
BLOCK DIAGRAM
4
4
8 4
4
2
IOR
IOW
MEMR
MEMW
READY
ADSTB
AEN
CS
CLK
RESET
EOP
Timing
Control
Circuit
TC
(Terminal Count)
Decrementer
Temporary Word
Count Register (16)
HLDA
HRQ
DREQ
0 - 3
DACK
0 - 3
Priority
Judgment
Circuit
Mode
Register
(4
16)
Command
Register (8)
Mark
Register (4)
Request
Register (4)
Incrementer/Decrementer
Temporary Address
Register (16)
16 Bit Bus
16 Bit Bus
Base Word
Count
Register
(4 16)
Current
Word
Count
Register
(4 16)
Base
Address
Register
(4 16)
Current
Address
Register
(4 16)
Internal Data Bus
Status
Register (8)
Temporary
Register (8)
Input/Output
Buffer
Output
Buffer
Input/Output
Buffer
Command
Control
Circuit
D
0 - 1
A
4 -
A
7
A
0 -
A
3
DB
0 -
DB
7
A
8
- A
15
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Semiconductor
MSM82C37B-5RS/GS/VJS
ABSOLUTE MAXIMUM RATINGS
55 to +150
MSM82C37B-5RS
Power Supply Voltage
V
CC
0.5 to +7
V
Input Voltage
V
IN
0.5 to V
CC
+0.5
V
Output Voltage
V
OUT
0.5 to V
CC
+0.5
V
Storage Temperature
T
STG
C
Power Dissipation
P
D
W
Parameter
Unit
Symbol
with respect
to GND
--
Ta = 25C
Conditions
Rating
1.0
MSM82C37B-5GS
0.7
MSM82C37B-5VJS
1.0
RECOMMENDED OPERATING CONDITIONS
DC CHARACTERISTICS
"L" Output Voltage
V
OL
"H" Output Voltage
V
OH
Parameter
Symbol
Min.
--
3.7
10
I
OL
= 3.2 mA
V
CC
= 4.5 V
to 5.5 V
Ta
= 40C
to +85C
I
OH
= 1.0 mA
Conditions
Input Leak Current
I
LI
Output Leak Current
I
LO
10
--
0V V
IN
V
CC
0V
V
OUT
V
CC
Average Power Supply
Current during Operations
I
CC
Input frequency
5 MHz, when RESET
V
IN
= 0 V/V
CC
,
C
L
= 0 pF
Power Supply Current
in Standby Mode
I
CCS
--
HLDA
= 0 V,
V
IL
= 0 V,
V
IH
= V
CC
Typ.
--
--
--
--
--
--
Max.
0.4
--
10
10
10
10
Unit
V
V
mA
mA
mA
mA
Min.
Power Supply Voltage
V
CC
4.5
V
Operating Temperature
T
op
40
C
"L" Input Voltage
V
IL
0.5
V
"H" Input Voltage
T
IH
2.2
V
Typ.
5.0
+25
--
--
Max.
5.5
+85
+0.8
V
CC
+ 0.5
Parameter
Unit
Symbol
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Semiconductor
MSM82C37B-5RS/GS/VJS
AC CHARACTERISTICS
DMA (Master) Mode
Item
Symbol
Min.
Max.
Unit
Delay Time from CLK Falling Edge
up to AEN Leading Edge
Comments
t
AEL
(Ta = 40 to +85C, V
CC
= 4.5 to 5.5 V)
--
--
200
ns
Delay Time from CLK Rising Edge
up to AEN Trailing Edge
t
AET
--
--
130
ns
Delay Time from CLK Rising Edge
up to Address Floating Status
t
AFAB
--
--
90
ns
Delay Time from CLK Rising Edge
up to Read/Write Signal Floating Status
t
AFC
--
--
120
ns
Delay Time from CLK Rising Edge
up to Data Bus Floating Status
t
AFDB
--
--
170
ns
Address Valid Hold Time
to Read Signal Trailing Edge
t
AHR
t
CY
100
--
--
ns
Data Valid Hold Time
to ADSTB Trailing Edge
t
AHS
30
--
--
ns
Address Valid Hold Time
to Write Signal Trailing Edge
t
AHW
t
CY
50
--
--
ns
Delay Time from CLK Falling Edge
up to Active DACK
--
(Note 3)
170
ns
Delay Time from CLK Rising Edge
up to EOP Leading Edge
t
AK
--
(Note 5)
170
ns
Delay Time from CLK Rising Edge
up to EOP Trailing Edge
--
--
170
ns
Time from CLK Rising Edge
up to Address Valid
t
ASM
--
--
170
ns
Data Set-up Time to ADSTB Trailing Edge
t
ASS
100
--
--
ns
Clock High-level Time
t
CH
68
(Note 6)
--
ns
Clock Low-level Time
t
CL
68
(Note 6)
--
ns
CLK Cycle Time
t
CY
200
--
--
ns
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