FEDL70Q5111LA-01
1
Semiconductor
This version: December 2001
ML70Q5111LA
Bluetooth Baseband Controller IC
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GENERAL DESCRIPTION
The ML70Q5111LA is a CMOS digital IC for use in 2.4 GHz band BluetoothTM systems. This IC incorporates the
ARM7TDMI
as the CPU core, features a highly expandable architecture, and supports the interfaces for a variety of
applications. Used in conjunction with the ML7050LA (Bluetooth RF Transceiver IC) and the OKI Bluetooth Protocol
Stack Software, data/voice communications are possible while maintaining interconnectivity with other Bluetooth
systems.
Also this IC is equiped with 4 Mbit Flash ROM to reduce the external parts.
FEATURES
Compliant to Bluetooth Specification (Ver. 1.1)
The ARM7TDMI
is installed as the CPU (operation at a maximum of 32 MHz in this LSI)
1-Ch, 16-bit auto-reload timer
3-Ch, 18-bit auto-reload timer
Interrupt controller (17 causes)
Built-in 8 kbyte, 4-Way Unified Cache
Built-in 32 kbyte
Up to a total of 2 Mbyte of SRAM, ROM, and Flash ROM can be connected to the external memory bus.
Built-in 4Mbit Flash ROM
- Endurance 10
4
cycles
Selectable master clock (12/13/16 MHz).
PCM-CVSD transcoder is installed.
Installed interfaces:
- UART
(*)
interface (Up to 921.6 Kbps)
- USB
(*)
interface (conforms to USB1.1)
- UART/synchronous serial port interface
- General-purpose I/O interface (programmable interrupts)
- PCM interface (PCMLinear/A-law/
-law can be selected)
- JTAG interface
(*)
This mark indicates interfaces that support the HCI command.
Built-in Regulator and Power-on-Reset
Single power supply voltage: 3.0 to 3.6 V
Package: 144-pin BGA (P-LFBGA144-1111-0.80-MC)
(Dimensions: 11 mm
11 mm
1.5 mm; pin pitch: 0.8 mm)
ARM and ARM7TDMI are registered trademarks of ARM Ltd., UK.
Thumb is trademark of ARM Ltd., UK.
BLUETOOTH is a trademark owned by Bluetooth SIG, Inc. and licensed to Oki Electric Industry.
The information contained herein can change without notice owing to the product being under development.
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1Semiconductor
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ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Conditions
Rating
Unit
Power supply voltage
V
DD
--
0.3 to +4.5
V
Input voltage
V
I
--
0.3 to +4.5
V
Allowable power dissipation
P
d
--
1.35
W
Storage temperature
T
stg
--
55 to 150
C
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
Power supply voltage
V
DD
--
3.0
3.3
3.6
V
"H" level input voltage
Vih
--
2.2
--
3.6
V
"L" level input voltage
Vil
--
0
--
0.8
V
Operating temperature
Ta
--
40
--
85
C
INTERNAL FLASH ROM PROGRAMMING CONDITIONS
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
Supply voltage
V
DD
--
3.0
3.3
3.6
V
During Read
40
--
85
C
Operating temperature
Ta
During Programming
0
--
85
C
ELECTRICAL CHARACTERISTICS
DC Characteristics(1) (Except USB port)
(V
DD
= 3.3 V 0.3 V, Ta = 40 to 85C)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
"H" level output voltage
Voh
Ioh = 2 mA
2.4
--
--
V
"L" level output voltage
Vol
Iol = 2mA
--
--
0.4
V
Input leak current
Ii
Vi = GND to 3.6 V
10
--
10
A
Output leak current
Io
Vo = GND to V
DD
10
--
10
A
Power supply current (during
operation)
Iddo
During 32 MHz
operation
0
70
90
mA
Power supply current (during
stand-by)
Idds
CLK Stopped
--
200
800
A
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1Semiconductor
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DC Characteristics(2) USB port (D+, D)
(V
DD
= 3.3 V 0.3 V, Ta = 40 to 85C)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
Differential input sensitivity
V
DI
{(D+) (D)}
0.2
--
--
V
Differential common mode
range
V
CM
Includes VDI
0.8
--
2.5
V
Single ended receiver threshold
V
SE
--
0.8
--
2.0
V
"H" output voltage
V
OH
15 K
to GND
2.8
--
3.6
V
"L" output voltage
V
OL
1.5 K
to 3.6 V
--
--
0.3
V
Output leakage current
I
LO
0 V < V
IN
< V
DD
10
--
+10
A
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PIN DESCRIPTIONS
RF I/F
Pin Name
Direction
[*0]
Internal
Pull Up/Down
Initial
Value
Pin
Placement
Description
TXD
O
--
L
C2
Transmit data output
(To ML7050LA Pin# A8)
RXD
I
--
--
F1
Receive data input
(To ML7050LA Pin# H5)
PLL_DATA
O
--
L
D2
PLL setting data output
(To ML7050LA Pin# H3)
PLL_CLK
O
--
L
E1
PLL setting clock output
(To ML7050LA Pin# G3)
PLL_LE
O
--
L
B1
PLL setting load enable output
(To ML7050LA Pin# H4)
PLL_OFF
O
--
L
D1
PLL Open-loop/Closed-loop control signal
output (To ML7050LA Pin# G8)
PLL_POW
O
--
H
C3
Local transmit circuit power control signal
output (To ML7050LA Pin# A7)
TX_POW
O
--
H
D3
Transmit power control signal output
(To ML7050LA Pin# B6)
RX_POW
O
--
H
C1
Receive power control signal output
(To ML7050LA Pin# B3)
RSSI
I
Pull down
--
F4
Receive field strength data input
RSSI_CLK
O
--
H
E3
RSSI transfer clock
PLL_PS
O
--
L
A2
PLL power control signal output
PLLLOCK
I
Pull down
--
A3
PLL lock signal input
RXC
O
--
L
B2
Bluetooth receive clock output (1 MHz)
TXC_IN
I
Pull down
--
F2
Bluetooth transmit clock input (1 MHz)
When the transmit clock is used by a clock
(RXC) that is generated from the receive
data, set TXCSEL(Pin# A10) to H and
connect to RXC(Pin# B2).
TXCSEL
I
Pull down
--
A10
Bluetooth transmit clock setting pin
L: Select 1 MHz divided by internal PLL.
H: Select TXC_IN input signal.
[*0]
"I" = Input, "O" = Output, "I/O" = Input/Output, "Oc" = Open Collector
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