¡ Semiconductor

ML9205-01

1/34

FEDL9205-02

¡ Semiconductor
ML9205-01

¥ 7 Dot Character ¥ 16-Digit Display Controller/Driver with Character RAM

GENERAL DESCRIPTION

The ML9205-01 is a dot matrix vacuum fluorescent display tube controller driver IC which
displays characters, numerics and symbols.
Dot matrix vacuum fluorescent display tube drive signals are generated by serial data sent from
a micro-controller. A display system is easily realized by internal ROM and RAM for character
display.

FEATURES

· Logic power supply (V

)

: 3.3 V

10% or 5.0 V

10%

· Fluorescent display tube drive power supply (V

DISP

)

: 3.3 V

10% or 5.0 V

10%

· Fluorescent display tube drive power supply (V

)

: 20 to 60 V

· VFD driver output current

(VFD driver output can be connected directly to the fluorescent display tube. No pull-down
resistor is required.)
· Segment driver (SEG1 to SEG35)

: 5.0 mA

= 60 V)

· Segment driver (AD1 to AD4)

: 10.0 mA

= 60 V)

· Grid driver (COM1 to COM24)

: 50.0 mA

= 60 V)

· General output port output current

· Output driver (P1 to P4)

1.0 mA (V

= 3.3 V

10%)

2.0 mA (V

= 5.0 V

10%)

· Content of display

· CGROM

5 ¥ 7 dots

: 240 types (character data)

· CGRAM

5 ¥ 7 dots

: 16 types (character data)

· ADRAM

24 (display digit) ¥ 4 bits (symbol data)

· DCRAM

24 (display digit) ¥ 8 bits (register for character data display)

· General output port

4 bits (static operation)

· Display control function

· Display digit

: 9 to 24 digits

· Display duty (brightness adjustment) : 8 stages
· All lights ON/OFF

· 3 interfaces with microcontroller

: DA, CS, CP (4 interfaces when RESET is added)

· 1-byte instruction execution (excluding data write to RAM)
· Built-in oscillation circuit (external R and C)
· Package options:

80-pin QFP package (QFP80-P-1414-0.65-K) (Product name : ML9205-01GP)
80-pin QFP package (QFP80-P-1420-0.80-BK)(Product name : ML9205-01GA)

FEDL9205-02

This version: Sep. 2000

Previous version: Jun. 1999

¡ Semiconductor

ML9205-01

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FEDL9205-02

PIN CONFIGURATION (TOP VIEW)

NC: No connection

80-Pin Plastic QFP

(QFP80-P-1414-0.65-K)

AD2

AD1

DISP2

FL2

RESET

OSC1

OSC0

GND

FL1

COM24

COM23

SEG19

SEG20

SEG21

SEG22

SEG23

SEG24

SEG25

SEG26

SEG27

SEG28

SEG29

SEG30

SEG31

SEG32

SEG33

SEG34

SEG35

DISP1

COM1

COM2

60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41

COM22
COM21
COM20
COM19
COM18
COM17
COM16
COM15
COM14
COM13
COM12
COM11
COM10
COM9
COM8
COM7
COM6
COM5
COM4
COM3

1
2
3
4
5
6
7
8
9

10
11
12
13
14
15
16
17
18
19
20

AD3
AD4

SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9

SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18

¡ Semiconductor

ML9205-01

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FEDL9205-02

COM1

COM2

COM3

COM4

COM5

COM6

COM7

COM8

COM9

COM10

COM11

COM12

COM13

COM14

COM15

COM16

COM17

COM18

COM19

COM20

COM21

COM22

COM23

COM24

DISP1

SEG35

SEG34

SEG33

SEG32

SEG31

SEG30

SEG29

SEG28

SEG27

SEG26

SEG25

SEG24

SEG23

SEG22

SEG21

SEG20

SEG19

SEG18

SEG17

SEG16

SEG15

SEG14

SEG13

SEG12

SEG11

SEG10

SEG9

SEG8

SEG7

SEG6

SEG5

SEG4

SEG3

SEG2

SEG1

AD4

AD3

AD2

AD1

FL1

GND

OSC0

OSC1

RESET

FL2

DISP2

NC: No connection

80-Pin Plastic QFP

(QFP80-P-1420-0.80-BK)

¡ Semiconductor

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FEDL9205-02

PIN DESCRIPTION

3 to 37

Pin

QFP-1

Type Connects to

Fluorescent display tube anode electrode drive output.
Directly connected to fluorescent display tube and a pull-down
resistor is not necessary. I

> 5.0 mA

Description

Symbol

QFP-2

Fluorescent

tube anode

electrode

5 to 39 SEG1 to 35

Fluorescent display tube grid electrode drive output.
Directly connected to fluorescent display tube and a pull-down
resistor is not necessary. I

> 50.0 mA

Fluorescent

tube grid

electrode

41 to 64 COM1 to 24

39 to 62

Fluorescent display tube anode electrode drive output.
Directly connected to fluorescent display tube and a pull-down
resistor is not necessary. I

> 10.0 mA

Fluorescent

tube anode

electrode

1 to 4 AD1 to AD4

1, 2,

79, 80

General port output.
Output of these pins in static operation, so these pins can drive
the LED. I

> 2.0 mA

LED anode

electrode

74 to 77 P1 to P4

72 to 75

40, 80 V

DISP1 to 2

38, 78

GND

Power

supply

-GND are power supplies for internal logic.

DISP

-V

are power supplies for driving fluorescent tubes.

Use the same power supply for V

and V

DISP

Serial data input (positive logic).
Input from LSB.

Micro-

controller

Shift clock input.
Serial data is shifted on the rising edge of CP.

Micro-

controller

Chip select input.
Serial data transfer is disabled when CS pin is "H" level.

Micro-

controller

Reset input.
"Low" initializes all the functions.
Initial status is as follows.
· Address of each RAM
· Data of each RAM
· Display digit
· Brightness adjusment
· All lights ON or OFF
· All outputs

address "00"H
Content is undefined
24 digits
8/16
OFF mode
"Low" level

RESET

(Circuit when R and C are
connected externally)
See Application Circuit.

RESET

Micro-

controller

, R

External RC pin for RC oscillation.
Connect R and C externally. The RC time constant depends on the
V

voltage used. Set the target oscillation frequency to 2 MHz.

OSC0

OSC1

(RC oscillation circuit)
See Application Circuit.

OSC0

OSC1

, R

65, 78

FL1 to 2

63, 76

* QFP-1: QFP80-P-1414-0.65-K
* QFP-2: QFP80-P-1420-0.80-BK

¡ Semiconductor

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Parameter

Supply Voltage (1)

Symbol

Condition

Rating

Unit

Supply Voltage (2)

Input Voltage

Power Dissipation

Storage Temperature

Output Current

STG

Ta25

COM1 to COM24

AD1 to AD4

SEG1 to SEG35

0.3 to +6.5

80 to V

DISP

+0.3

0.3 to V

+0.3

637

55 to +150

10 to 0.0

60 to 0.0

20 to 0.0

P1 to P4

4.0 to +4.0

QFP80-P-1414-0.65-K

764

QFP80-P-1420-0.80-BK

DISP

0.3 to +6.5

*1: Use the same power supply for V

and V

DISP

RECOMMENDED OPERATING CONDITIONS

When the power supply voltage is 5V (typ.)

Parameter

Supply Voltage (1)

Symbol

Condition

Min.

Typ.

Max.

Unit

Supply Voltage (2)

High Level Input Voltage

Low Level Input Voltage
CP Frequency

Oscillation Frequency

Frame Frequency

Operating Temperature

, V

DISP

All input pins excluding OSC0 pin

=3.3kW, C

=47pF

DIGIT=1 to 24, R

=3.3kW, C

=47pF

4.5

0.7V

5.0

5.5

0.3V

2.0

+85

MHz

1.5

122

2.0

163

2.5

204

MHz

OSC

ABSOLUTE MAXIMUM RATINGS

When the power supply voltage is 3.3V (typ.)

Parameter

Supply Voltage (1)

Symbol

Condition

Min.

Typ.

Max.

Unit

Supply Voltage (2)

High Level Input Voltage

Low Level Input Voltage
CP Frequency

Oscillation Frequency

Frame Frequency

Operating Temperature

, V

DISP

All input pins excluding OSC0 pin

=3.3kW, C

=39pF

DIGIT=1 to 24, R

=3.3kW, C

=39pF

3.0

0.8V

3.3

3.6

0.2V

2.0

+85

MHz

1.5

122

2.0

163

2.5

204

MHz

OSC

¡ Semiconductor

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ELECTRICAL CHARACTERISTICS

DC Characteristics-1

Parameter

Symbol

Applied pin

Condition

Min.

Max.

Unit

High Level Input Voltage

CS, CP, DA,
RESET
CS, CP, DA,
RESET

RESET

Low Level Input Voltage

=0.0V

CS, CP, DA,
RESET

High Level Input Current

Low Level Input Current

High Level Output

Voltage

OH1

OH2

OH3

OH4

COM1 to 24

AD1 to AD4

SEG1 to 35

P1 to P4

DD1

P1 to P4

COM1 to 24

AD1 to AD4

SEG1 to 35

, V

DISP

OH1

=50.0 mA

OH2

=10.0 mA

OH3

=5.0 mA

OH4

=2.0 mA

Duty=15/16

Digit=1 to 24

All output lights ON

Low Level Output

Voltage

Supply Current

0.7V

1.0

DISP

2.0

DISP

1.5

DISP

1.5

DISP

1.0

0.3V

+1.0

1.0

, V

DISP

=5.0 V

10%, V

=60 V, Ta=40 to +85

C, unless otherwise specified)

CS, CP, DA,

+1.0

OL1

=2 mA

OL2

OL1

DD2

OSC

2 MHz,

no load

Duty=8/16

Digit=1 to 9

All output lights OFF

¡ Semiconductor

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FEDL9205-02

DC Characteristics-2

Parameter

Symbol

Applied pin

Condition

Min.

Max.

Unit

High Level Input Voltage

CS, CP, DA,
RESET
CS, CP, DA,
RESET

RESET

Low Level Input Voltage

=0.0V

CS, CP, DA,
RESET

High Level Input Current

Low Level Input Current

High Level Output

Voltage

OH1

OH2

OH3

OH4

COM1 to 24

AD1 to AD4

SEG1 to 35

P1 to P4

DD1

P1 to P4

COM1 to 24

AD1 to AD4

SEG1 to 35

, V

DISP

OH1

=50.0 mA

OH2

=10.0 mA

OH3

=5.0 mA

OH4

=1.0 mA

Duty=15/16

Digit=1 to 24

All output lights ON

Low Level Output

Voltage

Supply Current

0.8V

1.0

DISP

2.0

DISP

1.5

DISP

1.5

1.0

0.2V

+1.0

1.0

, V

DISP

=3.3 V

10%, V

=60 V, Ta=40 to +85

C, unless otherwise specified)

CS, CP, DA,

+1.0

OL1

=1mA

OL2

OL1

DD2

OSC

2 MHz,

no load

Duty=8/16

Digit=1 to 9

All output lights OFF

¡ Semiconductor

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FEDL9205-02

Parameter

Symbol

Condition

Min.

Max.

Unit

CP Pulse Width

DA Setup Time

DA Hold Time
CS Setup Time
CS Hold Time
CS Wait Time

Data Processing Time

RESET Pulse Width

DA Wait Time

All Output Slew Rate

Rise Time

CSS

CSH

CSW

DOFF

WRES

RSOFF

PRZ

=3.3 kW, C

=47 pF

=3.3 kW, C

=47 pF

=20% to 80%

=80% to 20%

When mounted in the unit

250

2.0

100

CP Frequency

2.0

MHz

When RESET signal is input from

microcontroller, etc. externally

250

, V

DISP

=5.0V

10%, V

=60 V, Ta=40 to +85

C, unless otherwise specified)

=100pF

2.0

Off Time

POF

When mounted in the unit, V

=0.0 V

5.0

RESET Time

RSON

When RESET signal is input from

microcontroller, etc. externally

250

200

=1.0 kW, C

=0.1 mF

AC Characteristics-1

AC Characteristics-2

Parameter

Symbol

Condition

Min.

Max.

Unit

CP Pulse Width

DA Setup Time

DA Hold Time
CS Setup Time
CS Hold Time
CS Wait Time

Data Processing Time

RESET Pulse Width

DA Wait Time

All Output Slew Rate

Rise Time

CSS

CSH

CSW

DOFF

WRES

RSOFF

PRZ

=3.3 kW, C

=39 pF

=3.3 kW, C

=39 pF

=100pF

When mounted in the unit

250

2.0

100

CP Frequency

2.0

MHz

When RESET signal is input from

microcontroller etc. externally

250

, V

DISP

=3.3V

10%, V

=60V, Ta=40 to +85

C, unless otherwise specified)

2.0

=20% to 80%

=80% to 20%

Off Time

POF

When mounted in the unit, V

=0.0 V

5.0

When RESET signal is input from

microcontroller etc. externally

RESET Time

RSON

=1.0 kW, C

=0.1 mF

200

250

¡ Semiconductor

ML9205-01

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FEDL9205-02

TIMING DIAGRAM

Symbol

=3.3V

10%

=5.0V

10%

0.8 V

0.7 V

0.2 V

0.3 V

· Data Timing

· Reset Timing

RESET

PRZ

RSON

RSOFF

POF

WRES

When external

R and C are

connected

When input externally

0.8 V

0.0 V

0.5 V

RSOFF

CSS

DOFF

CSH

CSW

VALID

1/f

· Output Timing

All outputs

0.8 V

DISP

0.2 V

¡ Semiconductor

ML9205-01

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FUNCTIONAL DESCRIPTION

Commands List

1st byte

2nd byte

LSB

MSB

LSB

MSB

Command

DCRAM data write

CGRAM data write

ADRAM data write

General output port set

Display duty set

Number of digits set

All lights ON/OFF

Test mode

C5 C10 C15 C20 C25 C30

C6 C11 C16 C21 C26 C31

C7 C12 C17 C22 C27 C32

C8 C13 C18 C23 C28 C33

C9 C14 C19 C24 C29 C34

2nd byte

3rd byte

4th byte

5th byte

6th byte

Xn
Cn
Pn
Dn
Kn
H
L

: Don't care
: Address specification for each RAM
: Character code specification for each RAM
: General output port status specification
: Display duty specification
: Number of digits specification
: All lights ON instruction
: All lights OFF instruction

When data is written to RAM (DCRAM, CGRAM, ADRAM) continuously,
addresses are internally incremented automatically.
Therefore it is not necessary to specify the 1st byte to write RAM data
for the 2nd and later bytes.

Note: The test mode is used for inspection before shipment.

It is not a user function.

¡ Semiconductor

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Positional Relationship Between SEGn and ADn (one digit)

C0 AD1

SEG1

SEG6

C10

SEG11

C15

SEG16

C20

SEG21

C25

SEG26

C30

SEG31

SEG2

SEG7

C11

SEG12

C16

SEG17

C21

SEG22

C26

SEG27

C31

SEG32

SEG3

SEG8

C12

SEG13

C17

SEG18

C22

SEG23

C27

SEG28

C32

SEG33

SEG4

SEG9

C13

SEG14

C18

SEG19

C23

SEG24

C28

SEG29

C33

SEG34

SEG5

SEG10

C14

SEG15

C19

SEG20

C24

SEG25

C29

SEG30

C34

SEG35

ADRAM written data.
Corresponds to 2nd byte

CGRAM written data. Corresponds to 2nd byte

CGRAM written data. Corresponds to 3rd byte

CGRAM written data. Corresponds to 4th byte

CGRAM written data. Corresponds to 6th byte
CGRAM written data. Corresponds to 5th byte

C1 AD2

C2 AD3

C3 AD4

¡ Semiconductor

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Data Transfer Method and Command Write Method

Display control command and data are written by an 8-bit serial transfer.
Write timing is shown in the figure below.

Setting the CS pin to "Low" level enables a data transfer.
Data is 8 bits and is sequentially input into the DA pin from LSB (LSB first).
As shown in the figure below, data is read by the shift register at the rising edge of the shift clock,
which is input into the CP pin. If 8-bit data is input, internal load signals are automatically
generated and data is written to each register and RAM.
Therefore it is not necessary to input load signals from the outside.

Setting the CS pin to "High" disables data transfer. Data input from the point when the CS pin
changes from "High" to "Low" is recognized in 8-bit units.

When data is written to RAM (DCRAM, ADRAM, CGRAM) continuously, addresses are
internally incremented automatically.
Therefore it is not necessary to specify the 1st byte to write RAM data for the 2nd and later
bytes.

Reset Function

Reset is executed when the RESET pin is set to "L", (when turning power on, for example) and
initializes all functions.
Initial status is as follows:
· Address of each RAM .................. address "00"H
· Data of each RAM ........................ All contents are undefined
· General output port ..................... All general output ports go "Low"
· Display digit .................................. 24 digits
· Brightness adjustment ................. 8/16
· All display lights ON or OFF ..... OFF mode
· Segment output ............................ All segment outputs go "Low"
· AD output ..................................... All AD outputs go "Low"
Please set the functions again according to "Setting Flowchart" after reset.

DOFF

LSB

B1 B2 B3 B4 B5 B6 B7

B0 B1 B2 B3 B4 B5 B6 B7

MSB

1st byte

LSB

MSB

2nd byte

When data is written to DCRAM* Command and address data

CSH

B0 B1 B2 B3 B4 B5 B6 B7

LSB

MSB

2nd byte

Character code data of the
next address

Character code data

¡ Semiconductor

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FEDL9205-02

C0 C1 C2 C3 C4 C5 C6 C7

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(3rd)

LSB

MSB

C0 C1 C2 C3 C4 C5 C6 C7

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(4th)

LSB

MSB

: specifies the character codes of CGROM and CGRAM

(written into DCRAM address 01H)

: specifies the character codes of CGROM and CGRAM

(written into DCRAM address 02H)

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(25th)

LSB

MSB

: specifies the character codes of CGROM and CGRAM

(written into DCRAM address 17H)

C0 C1 C2 C3 C4 C5 C6 C7

Description of Commands and Functions

1. DCRAM data write

(Specifies the addresses 00H to 1FH of DCRAM and writes the character codes of CGROM
and CGRAM.)

DCRAM (Data Control RAM) has a 5-bit address to store the character codes of CGROM and
CGRAM.
The character code specified by DCRAM is converted to a 5 ¥ 7 dot matrix character pattern via
CGROM or CGRAM.
(The DCRAM can store 24 characters.)

[Command format]

X0 X1 X2 X3 X4

B0 B1 B2 B3 B4 B5 B6 B7

1st byte

(1st)

LSB

MSB

C0 C1 C2 C3 C4 C5 C6 C7

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(2nd)

LSB

MSB

: selects DCRAM data write mode and specifies DCRAM

address
(Ex: Specifies DCRAM address 00H.)

: specifies the character codes of CGROM and CGRAM

(written into DCRAM address 00H)

To specify the character code of CGROM and CGRAM continuously to the next address, specify
only character codes as follows.
The addresses of DCRAM are automatically incremented. Specification of an address is
unnecessary.

¡ Semiconductor

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FEDL9205-02

X0 (LSB) to X4 (MSB): DCRAM addresses (5 bits: 24 characters)
C0 (LSB) to C7 (MSB): Character codes of CGROM and CGRAM (8 bits: 256 characters)

[COM positions and set DCRAM addresses]

The character code setting of CGROM and CGRAM up to 24 digits is completed.
To set a character code from DCRAM address 00H continuously.
Specify a dummy charactor code between DCRAM addresses 18H and 1FH.
(To increament the DCRAM address automatically and set it to 00H)

C0 C1 C2 C3 C4 C5 C6 C7

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(26th)

LSB

MSB

: specifies the character codes of dummy CGROM

and CGRAM
(Not written into DCRAM address)

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(33th)

LSB

MSB

C0 C1 C2 C3 C4 C5 C6 C7

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(34th)

LSB

MSB

: specifies the character codes of dummy CGROM

and CGRAM
(Not written into DCRAM address)

: specifies the character codes of CGROM and CGRAM

(DCRAM address 00H is rewritten)

C0 C1 C2 C3 C4 C5 C6 C7

(Operated 8 times)

HEX

COM position

X0 X1 X2 X3 X4

HEX

COM position

X0 X1 X2 X3 X4

COM1

COM17

COM2

COM18

COM3

COM19

COM4

COM20

COM5

COM21

COM6

COM22

COM7

COM23

COM8

COM24

COM9

Not fixed

COM10

Not fixed

COM11

Not fixed

COM12

Not fixed

COM13

Not fixed

COM14

Not fixed

COM15

Not fixed

COM16

Not fixed

¡ Semiconductor

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FEDL9205-02

C0 C5 C10 C15 C20 C25 C30

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(2nd)

LSB

MSB

: specifies 1st column data

(written into CGRAM address 00H)

C1 C6 C11 C16 C21 C26 C31

B0 B1 B2 B3 B4 B5 B6 B7

3rd byte

(3rd)

LSB

MSB

: specifies 2nd column data

(written into CGRAM address 00H)

X0 X1 X2 X3

B0 B1 B2 B3 B4 B5 B6 B7

1st byte

(1st)

LSB

MSB

: selects CGRAM data write mode and specifies

CGRAM address.
(Ex: Specifies CGRAM address 00H.)

C2 C7 C12 C17 C22 C27 C32

B0 B1 B2 B3 B4 B5 B6 B7

4th byte

(4th)

LSB

MSB

: specifies 3rd column data

(written into CGRAM address 00H)

C3 C8 C13 C18 C23 C28 C33

B0 B1 B2 B3 B4 B5 B6 B7

5th byte

(5th)

LSB

MSB

: specifies 4th column data

(written into CGRAM address 00H)

C4 C9 C14 C19 C24 C29 C34

B0 B1 B2 B3 B4 B5 B6 B7

6th byte

(6th)

LSB

MSB

: specifies 5th column data

(written into CGRAM address 00H)

To specify character pattern data continuously to the next address, specify only character pattern
data as follows.
The addresses of CGRAM are automatically incremented. Specification of an address is
therefore unnecessary.
The 2nd to 6th byte (character pattern data) are regarded as one data item, so 300 ns is sufficient
for t

DOFF

time between bytes.

2. CGRAM data write

(Specifies the addresses of CGRAM and writes character pattern data.)

CGRAM (Character Generator RAM) has a 4-bit address to store 5 ¥ 7 dot matrix character
patterns.
A character pattern stored in CGRAM can be displayed by specifying the character code
(address) by DCRAM.
The address of CGRAM is assigned to 00H to 0FH. (All the other addresses are the CGROM
addresses.)
(The CGRAM can store 16 types of character patterns.)

[Command format]

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C0 C5 C10 C15 C20 C25 C30

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(7th)

LSB

MSB

specifies 1st column data
(written into CGRAM address 01H)

C4 C9 C14 C19 C24 C29 C34

B0 B1 B2 B3 B4 B5 B6 B7

6th byte

(11th)

LSB

MSB

specifies 5th column data
(written into CGRAM address 01H)

C0 C5 C10 C15 C20 C25 C30

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(12th)

LSB

MSB

specifies 1st column data
(written into CGRAM address 02H)

C4 C9 C14 C19 C24 C29 C34

B0 B1 B2 B3 B4 B5 B6 B7

6th byte

(16th)

LSB

MSB

specifies 5th column data
(written into CGRAM address 02H)

C0 C5 C10 C15 C20 C25 C30

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(77th)

LSB

MSB

specifies 1st column data
(written into CGRAM address 0FH)

C4 C9 C14 C19 C24 C29 C34

B0 B1 B2 B3 B4 B5 B6 B7

6th byte

(81th)

LSB

MSB

specifies 5th column data
(written into CGRAM address 0FH)

C0 C5 C10 C15 C20 C25 C30

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(82th)

LSB

MSB

specifies 1st column data
(CGRAM address 00H is written)

C4 C9 C14 C19 C24 C29 C34

B0 B1 B2 B3 B4 B5 B6 B7

6th byte

(86th)

LSB

MSB

specifies 5th column data
(CGRAM address 00H is written)

X0 (LSB) to X3 (MSB): CGRAM addresses (4 bits: 16 characters)
C0 (LSB) to C34 (MSB) : Character pattern data (35 bits: 35 outputs per digit)

* : Don't care

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Positional relationship between the output area of CGROM and that of CGRAM

Note: CGROM (Character Generator ROM) has an 8-bit address to generate 5 ¥ 7 dot matrix

character patterns.
CGRAM can store 240 types of character patterns.

C10

C15

C20

C25

C30

C11

C16

C21

C26

C31

C12

C17

C22

C27

C32

C13

C18

C23

C28

C33

C14

C19

C24

C29

C34

area that corresponds to 2nd byte (1st column)

area that corresponds to 3rd byte (2nd column)

area that corresponds to 5th byte (4th column)

area that corresponds to 6th byte (5th column)

area that corresponds to 4th byte (3rd column)

[CGROM addresses and set CGRAM addresses]

Refer to ROMCODE table

HEX X0

CGROM address

X1 X2 X3

HEX X0

CGROM address

X1 X2 X3

RAM00(00000000B)

RAM01(00000001B)

RAM08(00001000B)

RAM09(00001001B)

RAM02(00000010B)

RAM03(00000011B)

RAM0A(00001010B)

RAM0B(00001011B)

RAM04(00000100B)

RAM05(00000101B)

RAM0C(00001100B)

RAM0D(00001101B)

RAM06(00000110B)

RAM07(00000111B)

RAM0E(00001110B)

RAM0F(00001111B)

¡ Semiconductor

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To specify symbol data continuously to the next address, specify only symbol data as follows.
The address of ADRAM is automatically incremented. Specification of addresses is therefore
unnecessary.

3. ADRAM data write

(Specifies the addresses 00H to 1FH of ADRAM and writes symbol data.)

ADRAM (Additional Data RAM) has a 5-bit address to store symbol data.
Symbol data specified by ADRAM is directly output without CGROM and CGRAM.
(The ADRAM can store 4 types of symbol patterns for each digit.)
The terminal to which the contents of ADRAM are output can be used as a cursor.

[Command format]

C0 C1 C2 C3

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(2nd)

LSB

MSB

: sets symbol data

(written into ADRAM address 00H.)

X0 X1 X2 X3 X4

B0 B1 B2 B3 B4 B5 B6 B7

1st byte

(1st)

LSB

MSB

: selects ADRAM data write mode and specifies ADRAM

address
(Ex: Specifies ADRAM address 00H.)

C0 C1 C2 C3

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(3rd)

LSB

MSB

: sets symbol data

(written into ADRAM address 01H)

C0 C1 C2 C3

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(4th)

LSB

MSB

: sets symbol data

(written into ADRAM address 02H)

C0 C1 C2 C3

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(25th)

LSB

MSB

: sets symbol data

(written into ADRAM address 17H)

¡ Semiconductor

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The symbol data setting up to 24 digits is completed.
To set symbol data from ADRAM address 00H continuously.
Specify a dummy symbol data between ADRAM addresses 18H and 1FH.
(To increment the ADRAM address automatically and set it to 00H)

C0 C1 C2 C3

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(26th)

LSB

MSB

: sets dummy symbol data

(Not written into ADRAM address)

C0 C1 C2 C3

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(33th)

LSB

MSB

: sets dummy symbol data

(Not written into ADRAM address)

C0 C1 C2 C3

B0 B1 B2 B3 B4 B5 B6 B7

2nd byte

(34th)

LSB

MSB

: sets dummy symbol data

(ADRAM address 00H is rewritten.)

X0 (LSB) to X4 (MSB) : ADRAM addresses (5 bits: 24 characters)
C0 (LSB) to C3 (MSB): Symbol data (4 bits: 4-symbol data per digit)

* : Don't care

[COM positions and ADRAM addresses]

HEX X0

COM position

X1 X2 X3

HEX X0

COM position

X1 X2 X3

COM1

COM17

COM2

COM18

COM3

COM19

COM4

COM20

COM5

COM21

COM6

COM22

COM7

COM23

COM8

COM24

COM9

Not fixed

COM10

Not fixed

COM11

Not fixed

COM12

Not fixed

COM13

Not fixed

COM14

Not fixed

COM15

Not fixed

COM16

Not fixed

¡ Semiconductor

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4. General output port set

(Specifies the general output port status.)

The general output port is an output for 4-bit static operation.
It is used to control other I/O devices and turn on LED. (static operation)
When at the "High" level, this output becomes the V

voltage, and when at the "Low" level,

it becomes the ground potential. Therefore, the fluorescent display tube cannot be driven.

[Command format]

P1 to P4 : general output ports

* : Don't care

[Set data and set state of general output port]

P1 P2 P3 P4

B0 B1 B2 B3 B4 B5 B6 B7

1st byte

LSB

MSB

: selects a general output port and specifies

the output status

Display state of general output port

Sets the output to Low

(The state when power is applied or when RESET is input.)

Sets the output to High

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5. Display duty set

(Writes a display duty value to the duty cycle register.)

Display duty adjusts brightness in 8 stages using 3-bit data.
When power is turned on or when the RESET signal is input, the duty cycle register value is
"0". Always execute this instruction before turning the display on, then set a desired duty
value.

[Command format]

D0 (LSB) to D2 (MSB) : display duty data (3 bits: 8 stages)

* : Don't care

[Relation between setup data and controlled COM duty]

D0 D1 D2

B0 B1 B2 B3 B4 B5 B6 B7

1st byte

LSB

MSB

: selects display duty set mode and sets duty value

HEX

COM duty

8/16

9/16

10/16

11/16

12/16

13/16

14/16

15/16

(The state when power is turned on or when RESET

signal is input.)

¡ Semiconductor

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6. Number of digits set

(Writes the number of display digits to the display digit register.)

The number of digits set can display 9 to 24 digits using 4-bit data.
When power is turned on or when a RESET signal is input, the number of digit register value
is "0". Always execute this instruction to change the number of digits before turning the
dispaly on.

[Command format]

K0 (LSB) to K3 (MSB) : number of digit data (4 bits: 16 digits)

* : Don't care

[Relation between setup data and controlled COM]

K0 K1 K2 K3

B0 B1 B2 B3 B4 B5 B6 B7

1st byte

LSB

MSB

: selects the number of digit set mode and specifies

the number of digit value

HEX

Number of digits

of COM

COM1 to 24

COM1 to 9

COM1 to 10

COM1 to 11

COM1 to 12

COM1 to 13

COM1 to 14

COM1 to 15

HEX

Number of digits

of COM

COM1 to 16

COM1 to 17

COM1 to 18

COM1 to 19

COM1 to 20

COM1 to 21

COM1 to 22

COM1 to 23

* The state when power is turned on or when RESET signal is input.

¡ Semiconductor

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7. All display lights ON/OFF set

(Turns all dispaly lights ON or OFF.)

All display lights ON is used primarily for display testing.
All display lights OFF is primarily used for display blink and to prevent malfunction when
power is turned on.
This command cannot control the general output port.

[Command format]

B0 B1 B2 B3 B4 B5 B6 B7

1st byte

LSB

MSB

: selects all display lights ON or OFF mode and

specifies display operation

L and H: display operation data
*: Don't care

[Set data and display state of SEG and AD]

Normal display

Sets all outputs to Low

Sets all outputs to High

Display state of SEG and AD

(The state when power is applied or when RESET is input.)

¡ Semiconductor

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Setting Flowchart
(Power applying included)

Apply V

All display lights OFF

Number of digits setting

Display duty setting

CGRAM

Data write mode

(with address setting)

CGRAM

Character code

CGRAM

Is character code

write ended?

Another RAM to

be set?

General output port setting

Releases all display lights

OFF mode

ADRAM

Data write mode

(with address setting)

ADRAM

Character code

ADRAM

Is character code

write ended?

DCRAM

Data write mode

(with address setting)

DCRAM

Character code

DCRAM

Is character code

write ended?

Select a RAM to be used

Status of all outputs by RESET
signal input

Display operation mode

Address is automatically
incremented

YES

End

Address is automatically
incremented

Apply V

and V

DISP

¡ Semiconductor

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APPLICATION CIRCUIT

Notes: 1. The V

value depends on the power supply voltage of the microcontroller used.

Adjust the values of the constants R

, R

, C

, and C

to the power supply voltage

used.

2. The V

value depends on the fluorescent display tube used. Adjust the values of the

constants R

and ZD to the power supply voltage used.

ML9205 -01

Micro-

controller

RESET V

DISP1-2

COM1-24

SEG1-35

AD1-4

GND

FL1-2

OSC0

OSC1

Output Port

P1-4

5¥7-dot matrix fluorescent display tube

GRID

(DIGIT)

ANODE

(SEGMENT)

ANODE

(SEGMENT)

Heater Transformer

LED

NPN Tr

GND

¡ Semiconductor

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REFERENCE DATA

Graphs illustrating the V

versus driver output current capability relationship are shown

below.
Care must be taken not to use the total power in excess of allowable power dissipation.

2.0

1.5

1.0

0.5

75 (mA)

DISP

n(V)]

[Driver output current versus output drop voltage]
V

=60V,COMn

[Output current (mA)]

2.0

1.5

1.0

0.5

20 (mA)

DISP

n(V)]

[Driver output current versus output drop voltage]
V

=60V,ADn

[Output current (mA)]

(V)

Ta=40

Ta=25

Ta=85

Ta=40

Ta=25

Ta=85

2.0

1.5

1.0

0.5

10 (mA)

DISP

n(V)]

[Driver output current versus output drop voltage]
V

=60V,SEGn

[Output current (mA)]

(V)

Ta=40

Ta=25

Ta=85

2.0

1.5

1.0

0.5

75 (mA)

DISP

n(V)]

[Driver output current versus output drop voltage]
V

=20V,COMn

[Output current (mA)]

2.0

1.5

1.0

0.5

20 (mA)

DISP

n(V)]

[Driver output current versus output drop voltage]
V

=20V,ADn

[Output current (mA)]

(V)

Ta=40

Ta=25

Ta=85

2.0

1.5

1.0

0.5

10 (mA)

DISP

n(V)]

[Driver output current versus output drop voltage]
V

=20V,SEGn

[Output current (mA)]

(V)

Ta=40

Ta=25

Ta=85

Ta=40

Ta=25

Ta=85

¡ Semiconductor

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(Unit : mm)

PACKAGE DIMENSIONS

Notes for Mounting the Surface Mount Type Package

The SOP, QFP, TSOP, TQFP, LQFP, SOJ, QFJ (PLCC), SHP, and BGA are surface mount type
packages, which are very susceptible to heat in reflow mounting and humidity absorbed in
storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person
on the product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).

Package material
Lead frame material
Pin treatment
Package weight (g)

Oki Electric Industry Co., Ltd.

Rev. No./Last Revised

Epoxy resin
42 alloy
Solder plating (5 mm)
0.85 TYP.
3/Nov. 28, 1996

Mirror finish

QFP80-1414-0.65-K

¡ Semiconductor

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(Unit : mm)

Notes for Mounting the Surface Mount Type Package

Package material
Lead frame material
Pin treatment
Package weight (g)

Oki Electric Industry Co., Ltd.

Rev. No./Last Revised

Epoxy resin
42 alloy
Solder plating (5 mm)
1.27 TYP.
4/Nov. 28, 1996

Mirror finish

QFP80-P-1420-0.80-BK

¡ Semiconductor

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FEDL9205-02

NOTICE

The information contained herein can change without notice owing to product and/or
technical improvements. Before using the product, please make sure that the information
being referred to is up-to-date.

The outline of action and examples for application circuits described herein have been
chosen as an explanation for the standard action and performance of the product. When
planning to use the product, please ensure that the external conditions are reflected in the
actual circuit, assembly, and program designs.

When designing your product, please use our product below the specified maximum
ratings and within the specified operating ranges including, but not limited to, operating
voltage, power dissipation, and operating temperature.

Oki assumes no responsibility or liability whatsoever for any failure or unusual or
unexpected operation resulting from misuse, neglect, improper installation, repair, alteration
or accident, improper handling, or unusual physical or electrical stress including, but not
limited to, exposure to parameters beyond the specified maximum ratings or operation
outside the specified operating range.

Neither indemnity against nor license of a third party's industrial and intellectual property
right, etc. is granted by us in connection with the use of the product and/or the information
and drawings contained herein. No responsibility is assumed by us for any infringement
of a third party's right which may result from the use thereof.

The products listed in this document are intended for use in general electronics equipment
for commercial applications (e.g., office automation, communication equipment,
measurement equipment, consumer electronics, etc.). These products are not authorized
for use in any system or application that requires special or enhanced quality and reliability
characteristics nor in any system or application where the failure of such system or
application may result in the loss or damage of property, or death or injury to humans.
Such applications include, but are not limited to, traffic and automotive equipment, safety
devices, aerospace equipment, nuclear power control, medical equipment, and life-support
systems.

Certain products in this document may need government approval before they can be
exported to particular countries. The purchaser assumes the responsibility of determining
the legality of export of these products and will take appropriate and necessary steps at their
own expense for these.

No part of the contents contained herein may be reprinted or reproduced without our prior
permission.

MS-DOS is a registered trademark of Microsoft Corporation.

Printed in Japan

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