Semiconductor Components Industries, LLC, 1999
December, 1999 Rev. 6
1
Publication Order Number:
SN74LS682/D
SN74LS682 SN74LS684
SN74LS688
8-Bit Magnitude
Comparators
The SN74LS682, 684, 688 are 8-bit magnitude comparators. These
device types are designed to perform comparisons between two
eight-bit binary or BCD words. All device types provide P = Q outputs
and the LS682 and LS684 have P > Q outputs also.
The LS682, LS684 and LS688 are totem pole devices. The LS682
has a 20 k
pullup resistor on the Q inputs for analog or switch data.
OUTPUT
OUTPUT
TYPE
P = Q
P > Q
ENABLE
CONFIGURATION
PULLUP
LS682
yes
yes
no
totem-pole
yes
LS684
yes
yes
no
totem-pole
no
LS688
yes
no
yes
totem-pole
no
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min
Typ
Max
Unit
V
CC
Supply Voltage
4.75
5.0
5.25
V
T
A
Operating Ambient
Temperature Range
0
25
70
C
I
OH
Output Current High
0.4
mA
I
OL
Output Current Low
24
mA
LOW
POWER
SCHOTTKY
Device
Package
Shipping
ORDERING INFORMATION
SN74LS682N
16 Pin DIP
1440 Units/Box
SN74LS682DW
16 Pin
SOIC
DW SUFFIX
CASE 751D
http://onsemi.com
2500/Tape & Reel
PLASTIC
N SUFFIX
CASE 738
20
1
20
1
SN74LS684N
16 Pin DIP
1440 Units/Box
SN74LS684DW
16 Pin
2500/Tape & Reel
SN74LS688N
16 Pin DIP
1440 Units/Box
SN74LS688DW
16 Pin
2500/Tape & Reel
SN74LS682 SN74LS684 SN74LS688
http://onsemi.com
2
CONNECTION DIAGRAMS (TOP VIEW)
SN74LS682/684
18
17
16
15
14
13
1
2
3
4
5
6
7
20
19
8
V
CC
P>Q
P=Q
Q7
P7
Q6
Q5
P6
P5
P0
Q0
P1
Q1
P2
Q2
P3
9
10
Q3
GND
12
11
Q4
P4
SN74LS688
18
17
16
15
14
13
1
2
3
4
5
6
7
20
19
8
V
CC
G
P=Q
Q7
P7
Q6
Q5
P6
P5
P0
Q0
P1
Q1
P2
Q2
P3
9
10
Q3
GND
12
11
Q4
P4
FUNCTION TABLE
INPUTS
OUTPUTS
DATA
ENABLES
P, Q
G, GT
G2
P = Q
P > Q
P = Q
P > Q
P < Q
X
L
L
L
H
L
L
L
H
L
H
H
H
H
L
H
H
H = HIGH Level, L = LOW Level, X = Irrelevant
SN74LS682 SN74LS684 SN74LS688
http://onsemi.com
3
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
(unless otherwise specified)
Limits
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
V
IH
Input HIGH Voltage
2.0
V
Guaranteed Input HIGH Voltage for
All Inputs
V
IL
Input LOW Voltage
0.8
V
Guaranteed Input LOW Voltage for
All Inputs
V
IK
Input Clamp Diode Voltage
0.65
1.5
V
V
CC
= MIN, I
IN
= 18 mA
V
OH
Output HIGH Voltage
2.7
3.5
V
V
CC
= MIN, I
OH
= MAX, V
IN
= V
IH
or V
IL
per Truth Table
V
O
Output LOW Voltage
0.25
0.4
V
I
OL
= 12 mA
V
CC
= V
CC
MIN,
V
IN
= V
IL
or V
IH
V
OL
Output LOW Voltage
0.35
0.5
V
I
OL
= 24 mA
V
IN
= V
IL
or V
IH
per Truth Table
20
A
V
CC
= MAX, V
IN
= 2.7 V
I
IH
Input HIGH Current
LS682-Q Inputs
0.1
mA
V
CC
= MAX, V
IN
= 5.5 V
Others
0.1
mA
V
CC
= MAX, V
IN
= 7.0 V
I
Input LOW Current
LS682-Q Inputs
0.4
mA
V
CC
= MAX V
= 0 4 V
I
IL
Input LOW Current
Others
0.2
mA
V
CC
= MAX, V
IN
= 0.4 V
I
OS
Short Circuit Current (Note 1)
30
130
mA
V
CC
= MAX
P
S
l
LS682
70
mA
I
CC
Power Supply
Current
LS684
65
mA
V
CC
= MAX
Current
LS688
65
mA
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
SN74LS682 SN74LS684 SN74LS688
http://onsemi.com
4
LOGIC DIAGRAMS
P7
Q7
P6
Q6
P5
Q5
P4
Q4
P3
Q3
P2
Q2
P1
Q1
P0
Q0
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(11)
(12)
(13)
(14)
(15)
(16)
(17)
(18)
(19)
P = Q
P > Q
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(11)
(12)
(13)
(14)
(15)
(16)
(17)
(18)
P7
Q7
P6
Q6
P5
Q5
P4
Q4
P3
Q3
P2
Q2
P1
Q1
P0
Q0
(19)
P = Q
(1)
G
SN74LS682 and LS684
SN74LS688
SN74LS682 SN74LS684 SN74LS688
http://onsemi.com
5
AC CHARACTERISTICS
(T
A
= 25
C)
SN74LS682
Limits
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
t
PLH
t
PHL
Propagation Delay, P to P = Q
13
15
25
25
ns
t
PLH
t
PHL
Propagation Delay, Q to P = Q
14
15
25
25
ns
V
CC
= 5.0 V
C
L
= 45 pF
t
PLH
t
PHL
Propagation Delay, P to P > Q
20
15
30
30
ns
C
L
= 45 F
R
L
= 667
t
PLH
t
PHL
Propagation Delay, Q to P > Q
21
19
30
30
ns
SN74LS684
Limits
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
t
PLH
t
PHL
Propagation Delay, P to P = Q
15
17
25
25
ns
t
PLH
t
PHL
Propagation Delay, Q to P = Q
16
15
25
25
ns
V
CC
= 5.0 V
C
L
= 45 pF
t
PLH
t
PHL
Propagation Delay, P to P > Q
22
17
30
30
ns
C
L
= 45 F
R
L
= 667
t
PLH
t
PHL
Propagation Delay, Q to P > Q
24
20
30
30
ns
SN74LS688
Limits
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
t
PLH
t
PHL
Propagation Delay, P to P = Q
12
17
18
23
ns
t
PLH
t
PHL
Propagation Delay, Q to P = Q
12
17
18
23
ns
V
CC
= 5.0 V
C
L
= 45 pF
R
L
= 667
t
PLH
t
PHL
Propagation Delay, G , G1 to P = Q
12
13
18
20
ns
R
L
667
SN74LS682 SN74LS684 SN74LS688
http://onsemi.com
6
PACKAGE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 73803
ISSUE E
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
M
L
J
20 PL
M
B
M
0.25 (0.010)
T
DIM
MIN
MAX
MIN
MAX
MILLIMETERS
INCHES
A
25.66
27.17
1.010
1.070
B
6.10
6.60
0.240
0.260
C
3.81
4.57
0.150
0.180
D
0.39
0.55
0.015
0.022
G
2.54 BSC
0.100 BSC
J
0.21
0.38
0.008
0.015
K
2.80
3.55
0.110
0.140
L
7.62 BSC
0.300 BSC
M
0
15
0
15
N
0.51
1.01
0.020
0.040
_
_
_
_
E
1.27
1.77
0.050
0.070
1
11
10
20
A
SEATING
PLANE
K
N
F
G
D
20 PL
T
M
A
M
0.25 (0.010)
T
E
B
C
F
1.27 BSC
0.050 BSC
SN74LS682 SN74LS684 SN74LS688
http://onsemi.com
7
PACKAGE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D05
ISSUE F
20
1
11
10
B
20X
H
10X
C
L
18X
A1
A
SEATING
PLANE
q
h
X 45
_
E
D
M
0.25
M
B
M
0.25
S
A
S
B
T
e
T
B
A
DIM
MIN
MAX
MILLIMETERS
A
2.35
2.65
A1
0.10
0.25
B
0.35
0.49
C
0.23
0.32
D
12.65
12.95
E
7.40
7.60
e
1.27 BSC
H
10.05
10.55
h
0.25
0.75
L
0.50
0.90
q
0
7
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION SHALL
BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT
MAXIMUM MATERIAL CONDITION.
_
_
SN74LS682 SN74LS684 SN74LS688
http://onsemi.com
8
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