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Электронный компонент: 4240-01

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Page 1 of 8
Document No. 70-0067-03
www.psemi.com
2006 Peregrine Semiconductor Corp. All rights reserved.
RF1
RF2
CTRL
75
CMOS
Control
Driver
The PE4240 is a high-isolation MOSFET Switch designed for
CATV applications, covering a broad frequency range from
DC up to 1.3 GHz. This single-supply SPST switch offers a
single-pin CMOS control interface with industry leading CTB
performance. It also provides low insertion loss, high isolation
and extremely low bias requirements while operating on a
single 3-volt supply. In a typical CATV application, the
PE4240 provides for a cost effective and manufacturable
solution vs. mechanical relays.

The PE4240 is manufactured on Peregrine's UltraCMOSTM
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Product Specification
SPST UltraCMOSTM CATV Switch
DC - 1300 MHz
Product Description
Figure 1. Functional Diagram
PE4240
Features
75-ohm switch
Non-reflective at RF1, open reflective
at RF2 when OFF
Integrated 0.25 watt terminations
CTB performance of 100dBc
High isolation: 85 dB at 5 MHz, 47 dB
at 1 GHz
Low insertion loss: 0.5 dB at 5 MHz,
0.75 dB at 1 GHz
High input IP2: >80 dBm
CMOS/TTL single-pin control
Single +3 volt supply operation
Notes: 1. Device linearity will begin to degrade below 1 MHz.
2. Measured in a 50
system.
3. Measured with a 1 ns risetime, 0/3 V pulse and 500 MHz bandwidth.
4. Note Absolute Maximum ratings in Table 3.
Table 1. Electrical Specifications @ +25 C
(Z
S
= Z
L
= 75
)
Figure 2. Package Type
6-lead DFN
Parameter Condition
Minimum
Typical
Maximum
Units
Operating Frequency
1
DC
1300
MHz
Operating Power
On / Off
30/24
dBm
Insertion Loss
DC 50 MHz
1000 MHz
0.5
0.75
0.65
1.0
dB
Isolation
DC 50 MHz
1000 MHz
71
44
85
47
dB
Return Loss
DC - 1000 MHz
14
20
dB
Input 1 dB Compression
2,4
1000 MHz
30
33
dBm
Input IP2
2
1000 MHz
80
dBm
CTB / CSO
77 & 110 channels;
PO = 44 dBmV
-100
dBc
Input IP3
2
1000 MHz
50
dBm
Video Feedthrough
3
15
mV
pp
Switching Time
2
s
Product Specification
PE4240
Page 2 of 8
2006 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0067-03
UltraCMOSTM RFIC Solutions
Table 2. Pin Descriptions
Table 3. Absolute Maximum Ratings
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOSTM device, observe
the same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOSTM
devices are immune to latch-up.
Table 4. DC Electrical Specifications @ 25 C
Notes: 1. A bypass capacitor should be placed as close as possible
to the pin.
2. Both RF pins must be held at 0 V
AC
or require external DC
blocking capacitors.
3. The exposed pad must be soldered to the ground plane for
proper switch performance.
Figure 3. Pin Configuration
Table 5. Control Logic Truth Table
Absolute Maximum Ratings are those values listed
in the above table. Exceeding these values may
cause permanent device damage. Functional
operation should be restricted to the limits in the DC
Electrical Specifications table. Exposure to absolute
maximum ratings for extended periods may affect
device reliability.
Exposed Solder
Pad - Shorted
to Pin 2
(bottom side)
RF2
GND
RF1
RFC
CTRL
V
DD
4
5
6
3
2
1
Device Description
The PE4240 high isolation SPST CATV Switch is
designed to support CATV applications such as
premium channel service connect/disconnect switch
blocks. This function is typically performed by bulky
and expensive mechanical switches. The high
isolation characteristics (>44 dB at 1 GHz, 85 dB
at 5 MHz), high compression point, and an
integrated 75-ohm terminations make the PE4240
an ideal, low cost solution.
Pin
No.
Pin
Name
Description
1
V
DD
Nominal 3 V supply connection.
1
2
GND
Ground
connection.
3
3
RF1
RF port.
2
4
CTRL
CMOS or TTL logic level:
High = RF1 to RF2 signal path
Low = RF1 isolated from RF2
5
GND
Ground connection.
3
6
RF2
RF port.
2
Parameter Min
Typ
Max
Unit
V
DD
Power Supply
2.7
3.0
3.3
V
I
DD
Power Supply Current
(V
DD
= 3V, V
CNTL
= 3V)
33
40
A
Control Voltage High
70% V
DD
5
V
Control Voltage Low
0
30% V
DD
V
Symbol Parameter/Condition Min
Max
Unit
V
DD
Power supply voltage
-0.3
4.0
V
V
I
Voltage on CTRL input
-0.3
5.5
V
T
ST
Storage temperature
-65
150
C
T
OP
Operating temperature
-40
85
C
P
IN
Input power (50),
CTRL=1/CTRL=0
33/24
dBm
V
ESD
ESD voltage
(Human Body Model)
200
V
Control Voltage (CTRL)
Signal Path (RF1 to RF2)
High
1
ON
Low
OFF
2-way
Splitter
Premium
Channel
Filter
PE4240
PE4240
CATVin
CATVout
Notes: 1. CTRL accepts both CMOS and TTL voltage leads.
The control logic input pin (CTRL) is typically driven
by a 3-volt CMOS logic level signal, and has a
threshold of 50% of V
DD
. For flexibility to support
systems that have 5-volt control logic drivers, the
control logic input has been designed to handle a 5-
volt logic HIGH signal. (A minimal current will be
sourced out of the V
DD
pin when the control logic in-
put voltage level exceeds V
DD.
)
Figure 4. Typical Application Block Diagram
Product Specification
PE4240
Page 3 of 8
2006 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0067-03
www.psemi.com
-100
-80
-60
-40
-20
0
0
200
400
600
800
1000
1200
Is
o
l
a
t
i
o
n
(
d
B
)
Frequency (MHz)
20
30
40
50
60
20
30
40
50
60
0
200
400
600
800
1000
1200
II
P
3
(
d
B
m
)
1dB C
o
m
p
r
e
s
s
i
on P
o
i
n
t

(
d
B
m
)
Frequency (MHz)
IIP3
Input 1dB Compression
-1.2
-1
-0.8
-0.6
-0.4
-0.2
0
0
200
400
600
800
1000
1200
I
n
se
r
t
i
o
n
L
o
ss (
d
B
)
Frequency (MHz)
-40 C
25 C
85 C
Typical Performance Data @ 25 C (Unless Otherwise Noted)
Figure 5. Insertion Loss
Figure 6. Input 1dB Compression Point and IIP3
Figure 7. Isolation
(75
impedance except as indicated)
50
system impedance
Product Specification
PE4240
Page 4 of 8
2006 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0067-03
UltraCMOSTM RFIC Solutions
-30
-25
-20
-15
-10
-5
0
0
200
400
600
800
1000
1200
R
e
tu
r
n
L
o
s
s

(
d
B
)
Frequency (MHz)
-30
-24
-18
-12
-6
0
0
200
400
600
800
1000
1200
R
e
tu
r
n
L
o
s
s
(
d
B
)
Frequency (MHz)
-30
-25
-20
-15
-10
-5
0
0
200
400
600
800
1000
1200
R
e
tu
r
n
L
o
s
s

(
d
B
)
Frequency (MHz)
Typical Performance Data @ 25 C
Figure 8. RF1 Return Loss (Switch = ON)
Figure 9. RF1 Return Loss (Switch = OFF)
Figure 10. RF2 Return Loss (Switch = ON)
(75
impedance except as indicated)
Product Specification
PE4240
Page 5 of 8
2006 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0067-03
www.psemi.com
Evaluation Kit
The SPST Switch Evaluation Kit board was
designed to ease customer evaluation of the
PE4240 SPST switch. The RF1 port is connected
through a 75
transmission line to the top left
BNC connector, J1. The RF2 port is connected
through a 75
transmission line to the BNC
connector on the top right side of the board, J2. A
through transmission line connects BNC
connectors J3 and J4. This transmission line can
be used to estimate the loss of the PCB over the
environmental conditions being evaluated.

The board is constructed of a two metal layer FR4
material with a total thickness of 0.031". The
bottom layer provides ground for the RF
transmission lines. The transmission lines were
designed using a coplanar waveguide model with
trace width of 0.021", trace gaps of 0.030",
dielectric thickness of 0.028", metal thickness of
0.0021" and
R of 4.3. Note that the predominate
mode for these transmission lines is coplanar
waveguide with a ground plane.


J5 provides a means for controlling DC and digital
inputs to the device. Starting from the lower left
pin, the second pin to the right (J5-3) is connected
to the device V
DD
input. The fourth pin to the right
(J5-7) is connected to the device CTRL input. It is
the responsibility of the customer to determine
proper supply decoupling for their design
application. Removing these components from
the evaluation board has not been shown to
degrade RF performance.
Figure 11. Evaluation Board Layouts
Figure 12. Evaluation Board Schematic
Peregrine Specification 102/0081
Peregrine Specification 101/0079