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Электронный компонент: 4246-51

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Page 1 of 8
Document No. 70-0090-05
www.psemi.com
2005 Peregrine Semiconductor Corp. All rights reserved.
RF1
RF2
CTRL
50
50
CMOS
Control
Driver
The PE4246 RF Switch is designed to cover a broad range of
applications from DC to 5000 MHz. It is non-reflective at both
RF1 and RF2 ports. This SPST switch integrates a single-pin
CMOS control interface, and provides low insertion loss while
operating with extremely low bias from a single +3-volt supply.
In a typical application, the high isolation PE4246 can replace
multiple RF switches of lesser isolation performance. It is
offered in a small 3x3 mm DFN package.

The PE4246 is manufactured on Peregrine's UltraCMOSTM
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Product Specification
Absorptive SPST UltraCMOSTM
RF Switch: DC - 5000 MHz
Product Description
Figure 1. Functional Diagram
PE4246
Features
Non-reflective 50-ohm RF switch
50-ohm (0.25 watt) terminations
High isolation: 55 dB at 1000 MHz,
48 dB at 3000 MHz
Low insertion loss: 0.8 dB at 1000 MHz,
0.9 dB at 3000 MHz
High linearity: +33 dBm input 1dB
compression point
CMOS/TTL single-pin control
Single +3-volt supply operation
Extremely low bias: 33
A @ 3 V
Available in a 6-lead DFN package
Notes: 1. Device linearity will begin to degrade below 1 MHz.
2. The DC transient at the output of the switch when the control voltage is switched from Low to High or High to Low in a 50
test set-up,
measured with 1ns risetime pulses and 500 MHz bandwidth.
3. Note Absolute Maximum ratings in Table 3.
Table 1. Electrical Specifications @ +25 C, V
DD
= 3 V
(ZS = ZL = 50
)
Figure 2. Package Type
6-lead DFN
Parameter Condition
Minimum Typical Maximum Units
Operation Frequency
1
DC
5000
MHz
Operating Power
CTRL=1/CTRL=0
30/24
dBm
Insertion Loss
DC-2000 MHz
2000-3000 MHz
3000-4000 MHz
4000-5000 MHz
0.8
0.9
1.0
1.3
1.0
1.1
1.3
1.8
dB
dB
dB
dB
Isolation
DC-2000 MHz
2000-3000 MHz
3000-4000 MHz
4000-5000 MHz
49
45
43
40
55
48
46
44
dB
dB
dB
dB
Return Loss
DC-5000 MHz
11
20
dB
Input 1 dB Compression
3
DC-5000 MHz
30
33
dBm
Input IP3
DC-5000 MHz
50
dBm
Video Feedthrough
2
15
mV
pp
Switching Time
2
s
Product Specification
PE4246
Page 2 of 8
2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0090-05
UltraCMOSTM RFIC Solutions
Table 2. Pin Descriptions
Table 3. Absolute Maximum Ratings
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOSTM device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOSTM
devices are immune to latch-up.
Table 4. DC Electrical Specifications
Notes: 1. A bypass capacitor should be placed as close as possible
to the pin.
2. Both RF pins must be DC blocked by an external capacitor
or held at 0 V
DC
.
3. The exposed pad must be soldered to the ground plane for
proper switch performance.
Figure 3. Pin Configuration
Table 5. Control Logic Truth Table
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
Pin
No.
Pin
Name
Description
1
V
DD
Nominal 3 V supply connection.
1
2
GND
Ground connection.
3
3
RF1
RF port.
2
4
CTRL
CMOS or TTL logic level:
High = RF1 to RF2 signal path
Low = RF1 isolated from RF2
5
GND
Ground connection.
3
6
RF2
RF port.
2
Symbol Parameter/Condition Min
Max
Unit
V
DD
Power supply voltage
-0.3
4.0
V
V
I
Voltage on CTRL input
-0.3
5.5
V
T
ST
Storage temperature
-65
150
C
T
OP
Operating temperature
-40
85
C
P
IN
Input power (50 ),
CTRL=1/CTRL=0
33/24
dBm
V
ESD
ESD voltage
(Human Body Model)
200
V
Parameter Min
Typ
Max
Unit
V
DD
Power Supply
2.7
3.0
3.3
V
I
DD
Power Supply Current
(V
DD
= 3 V, V
CNTL
= 3 V)
33
40
A
Control Voltage High
0.7xV
DD
5
V
Control Voltage Low
0
0.3xV
DD
V
Control Voltage
Signal Path
CTRL = CMOS or TTL High
RF1 to RF2
CTRL = CMOS or TTL Low
RF1 isolated from RF2
Exposed
Solder Pad
(bottom side)
V
DD
GND
RF1
RF2
GND
CTRL
4
5
6
3
2
1
Device Description
The
PE4246 high-isolation SPST RF Switch is
designed to support a variety of applications
where high isolation performance is demanded
and a non-reflective input and output is desired.
This switch is able to replace multiple lesser
performing switches in a very small 3x3 mm DFN
footprint.
Control Logic
The control logic input pin (CTRL) is typically
driven by a 3-volt CMOS logic level signal, and
has a threshold of 50% of V
DD
. For flexibility to
support systems that have 5-volt control logic
drivers, the control logic input has been designed
to handle a 5-volt logic HIGH signal. (A minimal
current will be sourced out of the V
DD
pin when the
control logic input voltage level exceeds V
DD
.)
Product Specification
PE4246
2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0090-05
www.psemi.com
Page 3 of 8
-100
-80
-60
-40
-20
0
0
1000
2000
3000
4000
5000
Is
ol
a
t
i
o
n
(
d
B
)
Frequency (MHz)
20
30
40
50
60
20
30
40
50
60
0
1000
2000
3000
4000
5000
I
I
P3
(
d
Bm
)
1d
B
C
o
m
p
r
e
s
s
io
n
P
o
i
n
t

(
d
B
m
)
Frequency (MHz)
IIP3
Input 1dB Compression
-3
-2.5
-2
-1.5
-1
-0.5
0
0
1000
2000
3000
4000
5000
Ins
e
r
t
i
o
n Los
s

(
d
B
)
Frequency (MHz)
-40 C
25 C
85 C
Typical Performance Data @ 25 C (Unless Otherwise Noted)
Figure 4. Insertion Loss
Figure 5. Input 1dB Compression Point and IIP3
Figure 6. Isolation
T = -40 C to 85 C
Product Specification
PE4246
Page 4 of 8
2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0090-05
UltraCMOSTM RFIC Solutions
-35
-30
-25
-20
-15
-10
-5
0
0
1000
2000
3000
4000
5000
R
e
tu
rn
L
o
s
s

(
d
B
)
Frequency (MHz)
-35
-30
-25
-20
-15
-10
-5
0
0
1000
2000
3000
4000
5000
R
e
tu
r
n
L
o
s
s

(
d
B
)
Frequency (MHz)
-30
-25
-20
-15
-10
-5
0
0
1000
2000
3000
4000
5000
R
e
tu
r
n
L
o
s
s

(
d
B)
Frequency (MHz)
-30
-25
-20
-15
-10
-5
0
0
1000
2000
3000
4000
5000
Re
t
u
r
n
L
o
s
s

(
d
B
)
Frequency (MHz)
Typical Performance Data @ +25 C
Figure 7. RF1 Return Loss (CTRL = High)
Figure 8. RF2 Return Loss (CTRL = High)
Figure 9. RF1 Return Loss (CTRL = Low)
Figure 10. RF2 Return Loss (CTRL = Low)
Product Specification
PE4246
2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0090-05
www.psemi.com
Page 5 of 8
Evaluation Kit
The SPST Switch Evaluation Kit board was
designed to ease customer evaluation of the
PE4246 SPST switch. The RF1 port is connected
through a 50
transmission line to the top left
SMA connector, J1. The RF2 port is connected
through a 50
transmission line to the top right
SMA connector, J2. A through transmission line
connects SMA connectors J3 and J4. This
transmission line can be used to estimate the loss
of the PCB over the environmental conditions
being evaluated.

The board is constructed of a two metal layer FR4
material with a total thickness of 0.031". The
bottom layer provides ground for the RF
transmission lines. The transmission lines were
designed using a coplanar waveguide model with
trace width of 0.0476", trace gaps of 0.030",
dielectric thickness of 0.028", metal thickness of
0.0021" and
R of 4.3. Note that the predominate
mode for these transmission lines is coplanar
waveguide with a ground plane.

J5 and J6 provide a means for controlling DC and
digital inputs to the device. J6-1 is connected to
the device V
DD
input. J5-1 is connected to the
device CTRL input. J5-2 and J6-2 are GND
connections. A decoupling capacitor (100 pF) is
provided on both CTRL and V
DD
traces. It is the
responsibility of the customer to determine proper
supply decoupling for their design application.
Removing these components from the evaluation
board has not been shown to degrade RF
performance.
Figure 11. Evaluation Board Layouts
Figure 12. Evaluation Board Schematic
Peregrine Specification 102/0134
Peregrine Specification 101/0102