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Электронный компонент: 9308-00

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Page 1 of 7
Document No. 70-0187-01
www.psemi.com
2005 Peregrine Semiconductor Corp. All rights reserved.
V
DD
= 2.45< V
DD
<2.75 V, -40 C
T
A
85 C,
unless otherwise specified
The PE9308 is a high-performance dynamic UltraCMOSTM
prescaler ideal for Ku band Transceiver applications. It has a
fixed divide ratio of 4 with an operating frequency range of 4.0
GHz to 13.5 GHz. The PE9308 operates on a nominal 2.6 V
supply and draws only 15 mA. It is packaged in a small 8-lead
Flat Pack and is also available in Die form for Hybrid
application.

The PE9308 is manufactured in Peregrine's patented Ultra
Thin Silicon (UTSi) CMOS process, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Advance Information
13.5 GHz Low Power UltraCMOSTM
Divide-by-4 Prescaler for
RAD-Hard Space Applications
Product Description
Figure 1. Functional Schematic Diagram
PE9308
Features
High-frequency operation: up to 13.5 GHz
Fixed divide ratio of 4
Low-power operation:15 mA typical @ 2.6V
SEL Immune due to UltraCMOSTM
SEU <10
-10
errors / bit-day
100 Krads (Si) Total Dose
Small package: 8-lead Formed Flat pack
Available as Die
Table 1. Electrical Specifications (Z
S
= Z
L
= 50
)
Figure 2. Package Type
8-lead CSOIC
IN
OUT
Q
Q
SET
CLR
D
Q
Q
SET
CLR
D
Output Buffer
Parameter Conditions
Minimum
Typical
Maximum
Units
Supply Voltage
2.45
2.6
2.75
V
Supply Current
8
15
20
mA
SSB Phase noise (PhN)
100 KHz Offset; Pin=0dBm
-120
dBc/Hz
Input Power (P
in
) 7.0
GHz
F
in
10.0 GHz
0
+10
dBm
4.0 GHz < F
in
7.0 GHz
+5
+10
dBm
Output Power (P
out
) 4.0
GHz
F
in
10.0 GHz
0
dBm
Frequency
4000
13,500
MHz
Advance Information
PE9308
Page 2 of 7
2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0187-01
UltraCMOSTM RFIC Solutions
Table 2. Pin Descriptions
Table 3. Absolute Maximum Ratings
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOSTM device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOSTM
devices are immune to latch-up.
Figure 3. Pin Configuration (Top View)
PE9308
1
2
3
4
8
7
6
5
V
DD1
NC
RF IN
NC
NC
V
DD1
RF OUT
V
DD2
Pin
No.
Pin
Name
Description
1 V
DD1
DC Supply Voltage
2 V
DD1
DC Supply Voltage
3
RF IN
RF Input
4 NC
Not
connected
5 V
DD2
DC Supply Voltage
6
RF OUT
RF Output.
7 NC
Not
connected
8 NC
Not
connected
Symbol Parameter/
Conditions
Min Max Units
V
DD
DC Supply voltage
3.0
V
T
ST
Storage
temperature
range
-65 150 C
T
OP
Operating
temperature
range
-40 85 C
VESD ESD
voltage
(Human
Body Model)
250
V
P
INMAX
Maximum input power
14
dBm
Device Functional Considerations
The PE9308 takes an input signal frequency from
between 4.0 GHz to 13.5 GHz and produces an
output signal frequency one-fourth that of the
supplied input. In order for the prescaler to work
properly, several conditions need to be adhered
to. It is crucial that pins 1, 2 and 5 be supplied
with a bypass capacitor to ground. In addition, the
output signal (pins 6) needs to be ac coupled via
an external capacitor as shown in the test circuit
below.
The ground pattern on the board should be made
as wide as possible to minimize ground
impedance.
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage. Exposure
to absolute maximum ratings for extended periods
may affect device reliability.
Advance Information
PE9308
Page 3 of 7
2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0187-01
UltraCMOSTM RFIC Solutions
Figure 4. Test Circuit Block Diagram
BPF
SAW
AGC
FM
DEMOD
PE9308
PE9701
LOW NOISE
PLL SYNTH
LPF
BASEBAND
OUTPUT
DIVIDE BY 4
INPUT
DBS 1
st
IF
The wideband frequency of operation of the PE9308 makes it an ideal part for use in a DBS
down converter system.
Figure 5. High Frequency System Application
1
2
3
4
5
6
7
8
NC
NC
NC
IN
OUT
V
DD2
V
DD1
V
DD1
PE9308
50
V
DD
V
DD
0.01
F
0.01
F
10
p
F
10 p
F
0.5 p
F
0.5 p
F
6.8 p
F
T Line*
T Line*
50
Spectrum Analyzer
RF Source
*T Line = Transmission Line
Advance Information
PE9308
Page 4 of 7
2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0187-01
www.psemi.com
-2
0
2
4
6
8
10
1.625
1.825
2.025
2.225
2.425
2.625
2.825
3.025
3.225
Output Frequency (GHz)
P
out
(
d
B
m
)
2.60V @ 25C
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
5
10
15
6.5
7
7.5
8
8.5
9
9.5
10
10.5
11
11.5
12
12.5
13
13.5
Input Frequency (GHz)
Pi
n
(
d
B
m
)
2.60V @ 25C
Figure 6: Input Power Sensitivity vs Input Frequency at Nominal Voltage, 25 C
Figure 7: Output Power vs Output Frequency at Nominal Voltage, 25 C
Advance Information
PE9308
Page 5 of 7
2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0187-01
www.psemi.com
Evaluation Kit
Figure 8. Evaluation Board Layouts
Figure 9. Evaluation Board Schematic
Peregrine Specification 102/0247
Peregrine Specification 101/0186
Applications Support
If you have a problem with your evaluation kit or if
you have applications questions call (858) 731-
9400 and ask for applications support. You may
also contact us by fax or e-mail:

Fax: (858) 731-9499
E-Mail: help@psemi.com
The Ceramic SOIC Prescaler Evaluation Board
was designed to help customers evaluate the
PE9308 divide-by-4 prescaler. On this board, the
device input (pin 3) is connected to the SMA
connector J2 through a 50
transmission line.
The device output (pin 6) is connected to SMA
connector J3 through a 50
transmission line.

J1 provides DC power to the device via pin
1,2,4,5,7,8.Multiple decoupling capacitors
(C4,5,8,9=10pF, C3,6,7,10=0.01uF) are used. It is
the responsibility of the customer to determine
proper supply decoupling for their design
application. The board is constructed using 4
layers. The top and bottom layers are comprised
of Rogers low loss 4350 material having a core
thickness of 0.010"; while the internal layers are
comprised of FR-4. The overall board thickness is
0.062".