PEREGRINE SEMICONDUCTOR CORP.
|
http://www.peregrine-semi.com
Copyright
Peregrine Semiconductor Corp. 2003
Page 1 of 7
Exposed
Solder Pad
(bottom side)
V
DD
GND
RF1
RF2
GND
CTRL
4
5
6
3
2
1
Product Description
Figure 1. Functional Schematic Diagram
RF1
RF2
CTRL
75
Figure 2. Pin Configuration
Table 1. Electrical Specifications @ +25 C
(Z
S
= Z
L
= 75
)
Parameter Condition
Minimum
Typical
Maximum
Units
Operating Frequency
1
DC
1300
MHz
Operating Power
On / Off
30/24
dBm
Insertion Loss
DC 50 MHz
1000 MHz
0.5
0.8
0.65
1.0
dB
Isolation
DC 50 MHz
1000 MHz
80
58
85
60
dB
Return Loss
DC - 1000 MHz
16
20
dB
Input 1 dB Compression
2,4
1000
MHz
30
33
dBm
CTB / CSO
77 & 110 channels;
PO = 44 dBmV
-90
dBc
Input IP2
2
1000
MHz
80
dBm
Input IP3
2
1000 MHz
50
dBm
Video Feedthrough
3
15
mV
pp
Switching
Time
2
s
Notes: 1. Device linearity will begin to degrade below 1 MHz.
2. Measured in a 50 system.
3. Measured with a 1 ns risetime, 0/3 V pulse and 500 MHz bandwidth.
4. Note Absolute Maximum ratings in Table 3.
PRODUCT SPECIFICATION
PE4249
SPST CATV MOSFET Switch
DC 1300 MHz
Features
75-ohm switch
Integrated 0.25 watt terminations
CTB performance of 90dBc
High isolation: 90 dB at 5 MHz,
63 dB at 1 GHz
Low insertion loss: 0.5 dB at
5 MHz, 0.75 dB at 1 GHz
High input IP2: >80 dBm
CMOS/TTL single-pin control
Single +3-volt supply operation
Extremely low bias: 33 A @ 3V
The PE4249 is a high-isolation MOSFET Switch
designed for CATV applications, covering a broad
frequency range from DC up to 1.3 GHz. This single-
supply SPST switch offers a single-pin CMOS control
interface with industry leading CTB performance. It also
provides low insertion loss, high isolation and extremely
low bias requirements while operating on a single 3-volt
supply. In a typical CATV application, the PE4249
provides for a cost effective and manufacturable solution
vs. mechanical relays.
The PE4249 is manufactured in Peregrine's patented
Ultra Thin Silicon (UTSi
) CMOS process, offering the
performance of GaAs with the economy and integration
of conventional CMOS.
PE4249
Product Specification
Copyright
Peregrine Semiconductor Corp. 2003
File No. 70/0110~00C
|
UTSi CMOS RFIC SOLUTIONS
Page 2 of 7
Table 2. Pin Descriptions
Pin
No.
Pin
Name
Description
1 V
DD
Nominal 3 V supply connection.
2 GND
Ground
connection.
2
3 RF1
RF port.
1
4 CTRL
CMOS or TTL logic level:
High = RF1 to RF2 signal path
Low = RF1 isolated from RF2
5 GND
Ground connection.
3
6 RF2
RF port.
1
Notes: 1. Both RF pins must be held at 0 V
DC
or require external DC
blocking capacitors.
2. The exposed pad must be soldered to the ground plane for
proper switch performance.
Table 3. Absolute Maximum Ratings
Symbol Parameter/Condition Min Max Unit
V
DD
Power supply voltage
-0.3
4.0
V
V
I
Voltage on CTRL input
-0.3
5.5
V
T
ST
Storage temperature
-65
150
C
T
OP
Operating temperature
-40
85
C
P
IN
Input power (50),
CTRL=1/CTRL=0
33/24
dBm
V
ESD
ESD voltage
(Human Body Model)
500 V
Table 4. DC Electrical Specifications @ 25
C
Parameter Min
Typ
Max
Unit
V
DD
Power Supply
2.7
3.0
3.3
V
I
DD
Power Supply Current
(V
DD
= 3V, V
CNTL
= 3V)
33 40
A
Control Voltage High
0.7xV
DD
5
V
Control Voltage Low
0
0.3xV
DD
V
Electrostatic Discharge (ESD) Precautions
When handling this UTSi device, observe the same
precautions that you would use with other ESD-
sensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
rating specified.
Latch-Up Avoidance
Unlike conventional CMOS devices, UTSi CMOS
devices are immune to latch-up.
Device Description
The PE4249 high isolation SPST CATV Switch is
designed to support CATV applications such as
premium channel service connect/disconnect switch
blocks. This function is typically performed by bulky
and expensive mechanical switches. The high
isolation characteristics (60 dB at 1 GHz, 85 dB at 5
MHz), high compression point, and an integrated 75
(0.25 watt) input termination make the PE4249 an
ideal, low cost solution.
Figure 3. Typical Application Block Diagram
2-way
Splitter
Premium
Channel
Filter
PE4249
PE4249
CATVin
CATVout
Table 5. Truth Table
Control Voltage (CTRL)
Signal Path (RF1 to RF2)
High
1
ON
Low OFF
Notes: 1. CTRL accepts both CMOS and TTL voltage leads.
The control logic input pin (CTRL) is typically driven
by a 3-volt CMOS logic level signal, and has a
threshold of 50% of V
DD
. For flexibility to support
systems that have 5-volt control logic drivers, the
control logic input has been designed to handle a 5-
volt logic HIGH signal. (A minimal current will be
sourced out of the V
DD
pin when the control logic
input voltage level exceeds V
DD.
)
PE4249
Product Specification
PEREGRINE SEMICONDUCTOR CORP.
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http://www.peregrine-semi.com
Copyright
Peregrine Semiconductor Corp. 2003
Page 3 of 7
-1.2
-1
-0.8
-0.6
-0.4
-0.2
0
0
200
400
600
800
1000
1200
I
n
se
r
t
i
o
n
L
o
ss
(
d
B
)
Frequency (MHz)
-40!C
25!C
85!C
-100
-80
-60
-40
-20
0
0
200
400
600
800
1000
1200
Is
o
l
a
t
i
o
n
(
d
B
)
Frequency (MHz)
20
30
40
50
60
20
30
40
50
60
0
200
400
600
800
1000
1200
II
P
3
(
d
B
m
)
1
d
B C
o
mp
r
e
s
s
i
o
n
Po
i
n
t
(
d
Bm)
Frequency (MHz)
IIP3
Input 1dB Compression
Typical Performance Data @ -40
C to 85 C (Unless Otherwise Noted)
(75-ohm impedance except as indicated)
Figure 4. Insertion Loss
Figure 5. Input 1 dB Compression Point & IIP3
(50-ohm system impedance)
Figure 6. Isolation
PE4249
Product Specification
Copyright
Peregrine Semiconductor Corp. 2003
File No. 70/0110~00C
|
UTSi CMOS RFIC SOLUTIONS
Page 4 of 7
-30
-24
-18
-12
-6
0
0
200
400
600
800
1000
1200
Re
t
u
r
n
Lo
ss
(
d
B
)
Frequency (MHz)
-40!C
25!C
85!C
-30
-25
-20
-15
-10
-5
0
0
200
400
600
800
1000
1200
Re
t
u
r
n
Lo
ss
(
d
B
)
Frequency (MHz)
-40!C
25!C
85!C
-40
-35
-30
-25
-20
-15
-10
-5
0
0
200
400
600
800
1000
1200
Re
t
u
r
n
Lo
ss
(
d
B
)
Frequency (MHz)
-40!C
25!C
85!C
Typical Performance Data @ -40
C to 85 C (Unless Otherwise Noted)
(75-ohm impedance)
Figure 7. RF1 Return Loss (Switch = ON)
Figure 8. RF2 Return Loss (Switch = OFF)
Figure 9. RF1 Return Loss (Switch = OFF)
PE4249
Product Specification
PEREGRINE SEMICONDUCTOR CORP.
|
http://www.peregrine-semi.com
Copyright
Peregrine Semiconductor Corp. 2003
Page 5 of 7
Evaluation Kit Information
Evaluation Kit
The SPST Switch Evaluation Kit board was
designed to ease customer evaluation of the
PE4249 SPST switch. The RF1 port is connected
through a 75 transmission line to the top left
BNC connector, J1. The RF2 port is connected
through a 75 transmission line to the BNC
connector on the top right side of the board, J2. A
through transmission line connects BNC
connectors J3 and J4. This transmission line can
be used to estimate the loss of the PCB over the
environmental conditions being evaluated.
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031". The
bottom layer provides ground for the RF
transmission lines. The transmission lines were
designed using a coplanar waveguide model with
trace width of 0.021", trace gaps of 0.030",
dielectric thickness of 0.028", metal thickness of
0.0021" and
r
of 4.3. Note that the predominate
mode for these transmission lines is coplanar
waveguide with a ground plane.
J5 provides a means for controlling DC and digital
inputs to the device. Starting from the lower left
pin, the second pin to the right (J5-3) is connected
to the device V
DD
input. The fourth pin to the right
(J5-7) is connected to the device CTRL input. A
decoupling capacitor (100 pF) is provided on both
traces. It is the responsibility of the customer to
determine proper supply decoupling for their
design application. Removing these components
from the evaluation board has not been shown to
degrade RF performance.
Figure 10. Evaluation Board Layouts
Figure 11. Evaluation Board Schematic
VDD
CTRL
RF1
GND
GND
RF2
100 pF
Optional
J1
J2
J3
J4
J5-7
100 pF
Optional
J5-3
PE4249
Product Specification
Copyright
Peregrine Semiconductor Corp. 2003
File No. 70/0110~00C
|
UTSi CMOS RFIC SOLUTIONS
Page 6 of 7
EDGE OF PLASTIC BODY
THIS FEATURE
APPLIES TO
BOTH ENDS OF
THE PKG.
DETAIL A
EXPOSED SLUG/
HEAT SINK
EXPOSED METALIZED
FEATURE
0.17 MIN.
0.24 +0.20
-0.08
0.125
0.17
0.30
0.025
0.025
DETAIL B
(2X)
EXPOSED
6
5
3
BOTTOM VIEW
2
1
4
3
0.10
C A B
0.05
C
0.95
L
C
0.35 +0.08
-0.02
0.29 +0.21
-0.08
1.21 0.10
0.605 0.05
1.050.05
2.010.10
EXPOSED PAD
SEE DETAIL A
R0.127 TYP
.20 MIN.
R 0.15 TYP
SEATING
PLANE
SIDE VIEW
TOP VIEW
- C -
0.100 C
0.080 C
0.70 0.05
0.20 0.05
0.90 0.10
0.0250.025
10+2
-10
DETAIL C
SEE DETAIL B
3
1
PIN 1
MARK
CL
CL
3.00
0.125
3.00
0.125
0.10 C
0.10 C
2
3
6
5
4
4
4
- A -
- B -
3 COPLANARITY APPLIES TO EXPOSED HEAT SLUG AS WELL AS THE TERMINALS.
4 PROFILE TOLERANCE APPLIES TO PLASTIC BODY ONLY.
1. DIMENSIONS AND TOLERANCES ARE PER ANSi Y14.5
2. DIMENSIONS ARE IN MILLIMETERS, ANGLES ARE IN DEGREES.
Figure 12. Package Drawing
6-lead MLPM
Table 6. Ordering Information
Order
Code
Part Marking
Description
Package
Shipping
Method
4249-01 4249
PE4249-06MLP3x3-12800F
6-lead
3x3mm MLPM
12800 units / Canister
4249-02
4249
PE4249-06MLP3x3-3000C
6-lead 3x3mm MLPM
3000 units / T&R
4249-00
PE4249-EK
PE4249-06MLP3x3-EK
Evaluation Board
1 / Box
PE4249
Product Specification
PEREGRINE SEMICONDUCTOR CORP.
|
http://www.peregrine-semi.com
Copyright
Peregrine Semiconductor Corp. 2003
Page 7 of 7
Sales Offices
United States
Peregrine Semiconductor Corp.
6175 Nancy Ridge Drive
San Diego, CA 92121
Tel 1-858-455-0660
Fax 1-858-455-0770
Japan
Peregrine Semiconductor K.K.
5A-5, 5F Imperial Tower
1-1-1 Uchisaiwaicho, Chiyoda-ku
Tokyo 100-0011 Japan
Tel: 03-3507-5755
Fax: 03-3507-5601
Europe
Peregrine Semiconductor Europe
Btiment Maine
13-15 rue des Quatre Vents
F- 92380 Garches
Tel 33-1-47-41-91-73
Fax 33-1-47-41-91-73
Australia
Peregrine Semiconductor Australia
8 Herb Elliot Ave.
Homebush, NSW 2140
Australia
Tel: 011-61-2-9763-4111
Fax: 011-61-2-9746-1501
For a list of representatives in your area, please refer to our Web site at: http://www.peregrine-semi.com
Data Sheet Identification
Advance Information
The product is in a formative or design stage. The data sheet
contains design target specifications for product
development. Specifications and features may change in any
manner without notice.
Preliminary Specification
The data sheet contains preliminary data. Additional data
may be added at a later date. Peregrine reserves the right to
change specifications at any time without notice in order to
supply the best possible product.
Product Specification
The data sheet contains final data. In the event Peregrine
decides to change the specifications, Peregrine will notify
customers of the intended changes by issuing a PCN
(Product Change Notice).
The information in this data sheet is believed to be reliable. However,
Peregrine assumes no liability for the use of this information. Use
shall be entirely at the user's own risk.
No patent rights or licenses to any circuits described in this
data sheet are implied or granted to any third party.
Peregrine's products are not designed or intended for use in devices
or systems intended for surgical implant, or in other applications
intended to support or sustain life, or in any application in which the
failure of the Peregrine product could create a situation in which
personal injury or death might occur. Peregrine assumes no liability
for damages, including consequential or incidental damages, arising
out of the use of its products in such applications.
Peregrine products are protected under one or more of the following
U.S. patents: 6,090,648; 6,057,555; 5,973,382; 5,973,363; 5,930,638;
5,920,233; 5,895,957; 5,883,396; 5,864,162; 5,863,823; 5,861,336;
5,663,570; 5,610,790; 5,600,169; 5,596,205; 5,572,040; 5,492,857;
5,416,043. Other patents are pending.
Peregrine, the Peregrine logotype, Peregrine Semiconductor Corp.,
and UTSi are registered trademarks of Peregrine Semiconductor Corporation.
Copyright 2003 Peregrine Semiconductor Corp. All rights reserved.
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