1
PS8559A 09/14/04
Block Diagram (PI49FCT3802)
Features
High Frequency >156 MHz
High-speed, low-noise, non-inverting buffer
- PI49FCT3802 is 1:5 buffer
- PI49FCT3803 is 1:7 buffer
Low-skew (<250ps) between any two output clocks
Low duty cycle distortion <250ps
Low propagation delay <2.5ns
5V Tolerant input
Multiple V
DD
, GND pins for noise reduction
3.3V supply voltage
Packaging (Pb-free & Green available):
- 16-pin TSSOP (L)
- 16-pin QSOP (Q)
1:5/1:7 Clock Buffer
for Networking Applications
PI49FCT3802/PI49FCT3803
Description
The PI49FCT380x is a 3.3V compatible, high-speed, low-noise
non-inverting clock buffer. The key goal in designing the
PI6C380x is to target networking applications that require low-
skew, low-jitter, and high-frequency clock distribution. Providing
output-to-output skew as low as 250ps, the PI49FCT380x is an
ideal clock distribution device for synchronous systems. Designing
synchronous networking systems requires a tight level of skew from
a large number of outputs.
CLK4
CLK2
CLK1
CLK0
BUF_IN
CLK3
1
2
3
VDD
4
CLK1
5
CLK0
6
NC
7
VDD
8
GND
VDD
CLK3
GND
VDD
NC
GND
16
15
14
13
12
11
10
9
BUF_IN
GND
CLK2
CLK4
Pin Configuration (PI49FCT3802)
16-Pin
L, Q
Block Diagram (PI49FCT3803)
CLK6
CLK2
CLK1
CLK0
BUF_IN
CLK3
1
2
3
VDD
4
CLK1
5
CLK0
6
CLK2
7
VDD
8
GND
VDD
CLK5
GND
VDD
CLK3
GND
16
15
14
13
12
11
10
9
BUF_IN
GND
CLK4
CLK6
Pin Configuration (PI49FCT3803)
16-Pin
L, Q
Pin Description
Pin Name
Description
3802
3803
BUF_IN
CLK[0:4]
GND
V
DD
BUF_IN
CLK[0:4]
GND
V
DD
Input
Outputs
GND
Power
2
PS8559A 09/14/04
PI49FCT3802/PI49FCT3803
1:5/1:7 Clock Buffers
for Networking Applications
Storage Temperature...........................................................65C to +150C
V
DD
Voltage ............................................................................ 0.5V to 5.5V
Output Voltage......................................................................... 0.5V to 5.5V
Input Voltage ........................................................................... 0.5V to 5.5V
DC Output Current............................................................60mA to +60mA
Power Dissipation .............................................................................500mW
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional op-
eration of the device at these or any other conditions
above those indicated in the operational sections of
this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may
affect reliability.
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
DD
= 3.3V, +25C ambient and maximum loading.
3. V
OH
= V
DD
0.6V at rated current.
4. This parameter is determined by device characterization but is not production tested.
5. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
Operating Range
V
DD
Voltage ...............................................................................3.3V 0.3V
Commercial Temperature.........................................................0C to +70C
Industrial Temperature .........................................................40C to +85C
Input Frequency ...................................................................DC to 156 MHz
Capacitive Loading .................................................................. 10pF to 50pF
DC Electrical Characteristics
(Over the Operating Range)
Parameters
Description
Test Conditions
(1)
Min.
Typ.
(2)
Max.
Units
V
IH
Input HIGH Voltage
Guaranteed Logic HIGH Level (Input Pins)
2.0
5.5
V
V
IL
Input LOW Voltage
Guaranteed Logic LOW Level (Input Pins)
-0.5
0.8
I
IH
Input HIGH Current
V
DD
= Max.
V
IN
= V
DD
1
A
I
IL
Input LOW Current
V
DD
= Max.
V
IN
= GND
-1
V
IK
Clamp Diode Voltage
V
DD
= Min., I
IN
= 18mA
-0.7
-1.2
V
V
OH
Output HIGH Voltage
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OH
= 0.1mA
V
DD
-0.2
I
OH
= 12mA
2.4
(3)
3.0
V
OL
Output LOW Voltage
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OH
= 0.1mA
0.2
I
OH
= 12mA
0.3
0.5
I
OH
Output HIGH Current
V
DD
= 3.0V, V
IN
= V
IH
OR
V
IL
, V
OUT
= 1.5V
(4)
-45
-75
-180
mA
I
OL
Output LOWCurrent
V
DD
= 3.0V, V
IN
= V
IH
OR
V
IL
, V
OUT
= 1.5V
(4)
50
92
200
3
PS8559A 09/14/04
PI49FCT3802/PI49FCT3803
1:5/1:7 Clock Buffers
for Networking Applications
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at V
DD
= 3.3V, +25C ambient.
3. Per TTL driven input (V
IN
= V
DD
0.6V); all other inputs at V
DD
or GND.
Capacitance
(T
A
= 25C, f = 1 MHz)
Parameters
(1)
Description
Test Conditions
Typ
Max.
Units
C
IN
Input Capacitance
V
IN
= 0V
3.0
4
pF
C
OUT
Output Capacitance
V
OUT
= 0V
--
6
Note:
1. This parameter is determined by device characterization but is not production tested.
Power Supply Characteristics
Parameters
Description
Test Conditions
Min.
Typ.
(2)
Max. Units
I
DDQ
Quiescent Power Supply Current
V
DD
= Max.
V
IN
= GND or V
DD
0.1
30
A
I
DD
Supply Current per Inputs
@ TTL High
V
DD
= Max.
V
IN
= V
DD
-0.6V(3)
47
300
I
DD
Dynamic Supply Current
V
DD
= 3.6V,
No load
50 MHz
43
mA
67 MHz
56
80 MHz
66
100 MHz
81
125 MHz
97
156 Mhz
121
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew measured at worse cast temperature (max. temp).
4. Identical conditions: loading, transitions, supply voltage, temperature, package type and speed grade.
Switching Characteristics
(V
DD
= 3.3V 0.3V, T
A
= 85C)
Parameters
Desciription
Test Conditions Min. Typ. Max. Units
t
R
/t
F
CLKn Rise/Fall Time 0.8V ~ 2.0V
C
L
= 15pF,
125 Mhz
0.7
1.0
ns
t
PLH
t
PHL
Propagation Delay BUF_IN to CLKn
1.0
2.2
2.5
t
sk(o)
(3)
Skew between two outputs of the same package (same
transition)
110
250
ps
t
sk(p)
(3)
Skew between opposite transitions (t
PHL
- t
PLH
) of the same
output
200
250
t
sk(t)
(3)
Skew between two outputs of different packages
(4)
0.55
ns
4
PS8559A 09/14/04
PI49FCT3802/PI49FCT3803
1:5/1:7 Clock Buffers
for Networking Applications
Switching Waveforms
Propagation Delay
Package Skew t
SK(T)
Pulse Skew t
SK(P)
Output Skew t
SK(O)
Input
t
PLH
3V
1.5V
0V
Output
V
OH
1.5V
V
OL
t
PHL
2.0V
0.8V
t
R
t
F
Input
t
PLH
3V
1.5V
0V
Output
V
OH
1.5V
V
OL
t
PHL
t
SK(p)
=
| t
PHL
t
PLH
|
Input
t
PLHx
3V
1.5V
0V
CLKx
V
OH
1.5V
V
OL
t
PHLx
t
SK(o)
CLKy
V
OH
1.5V
V
OL
t
SK(o)
t
PLHy
t
PHLy
t
SK(o)
= t
PLHy
t
PLHx
or t
PHLy
t
PHLx
Input
t
PLH1
3V
1.5V
0V
Package 1
Output
V
OH
1.5V
V
OL
t
PHL1
t
SK(t)
Package 2
Output
V
OH
1.5V
V
OL
t
SK(t)
t
PLH2
t
PHL2
t
SK(t)
=
t
PLH2
t
PLH1
or t
PHL2
t
PHL1
Test Circuits for All Outputs
Definitions:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance, should be equal to Zout of the
Pulse Generator.
Pulse
Generator
D.U.T.
V
IN
V
OUT
CL
V
DD
5
PS8559A 09/14/04
PI49FCT3802/PI49FCT3803
1:5/1:7 Clock Buffers
for Networking Applications
.189
.197
.053
.069
.004
.010
SEATING
PLANE
.025
BSC
.007
.010
.228
.244
1
16
.150
.157
.016
.050
X.XX
X.XX
DENOTES DIMENSIONS IN MILLIMETERS
0.635
4.80
5.00
1.35
1.75
5.79
6.19
0.101
0.254
.008
.012
0.203
0.305
3.81
3.99
0.178
0.254
0.38
0.41
1.27
.008
0.203
.015 x 45
REF
Detail A
Detail A
.008
0.20
MIN.
Guage Plane
.010
0.254
.041
1.04
REF
.016
.035
0.41
0.89
0-6
.008
.013
0.20
0.33
.193
.201
.047
max.
.002
.006
SEATING
PLANE
.0256
BSC
.018
.030
.004
.008
.252
BSC
1
16
.169
.177
0.05
0.15
6.4
0.45
0.75
0.09
0.20
4.3
4.5
1.20
4.9
5.1
0.65
0.19
0.30
.007
.012
Packaging Mechanical:
16-Pin QSOP (Q)
Packaging Mechanical: 16-Pin TSSOP (L)
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