1
PS8492 08/10/00
Pin Name
Description
OE
A,
OE
B
Hi-Z State Output Enable Inputs (Active LOW)
IN
A,
IN
B
Clock Inputs
OA
N,
OB
N
Clock Outputs
MON
Monitor Output
GND
Ground
V
CC
Power
3.3V, 2 x 1:5 CMOS Clock Driver
OE
B
IN
A
OA
04
IN
B
OE
A
OB
04
MON
5
5
Logic Block Diagram
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PI49FCT3805D
Description
Pericom Semiconductors PI49FCT series of logic circuits are
produced using the Companys advanced submicron CMOS
technology to achieve fast speed, low skew, fast slew rate, and low
propagation delay for most computing and communication
applications.
The PI49FCT3805D is composed of non-inverting drivers. The
outputs are configured into 2 groups of one-in, five-out with
independent output enable. Group B has an extra MON output.
Excellent output signals to power and ground ratio minimize power
and ground noise and also improves output performance.
Features
Low output skew: <270ps
Switching frequency of 133 MHz
Fast output rise/fall time: <1.5ns
Low propagation delay: <3.0ns
Low input capacitance: <6.0pF
Balanced CMOS outputs
Industrial Temperature: 40C to +85C
3.3V 10% operation
Packages available:
20-pin 300-mil wide SOIC (S)
20-pin 150-mil wide QSOP (Q)
20-pin 209-mil wide SSOP (H)
Product Pin Description
Inputs
Outputs
OE
A
, OE
B
IN
A
, IN
B
OA
N
, OB
N
MON
L
L
L
L
L
H
H
H
H
L
Z
L
H
H
Z
H
Truth Table
(1)
Note:
1. H = High Voltage Level
L = Low Voltage Level
Z = High Impedance
Pin Configuration
V
CCB
V
CC
1
20
OB0
OA0
2
19
OB1
OA1
3
18
GNDB
OA2
4
17
OB2
GNDA
5
16
OB3
OA3
6
15
OB4
OA4
7
14
MON
GNDQ
8
13
OEB
OEA
9
12
INB
INA
10
11
20-Pin
H,Q,S
2
PS8492 08/10/00
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PI49FCT3805D
3.3V, 2 x 1:5 CMOS Clock Driver
Note:
1. This parameter is determined by device characterization but is not production tested.
s
r
e
t
e
m
a
r
a
P
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it
p
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D
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it
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d
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C
t
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e
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p
y
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.
x
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s
ti
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N
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e
c
n
a
ti
c
a
p
a
C
t
u
p
n
I
V
N
I
V
0
=
0
.
3
4
F
p
C
T
U
O
e
c
n
a
ti
c
a
p
a
C
t
u
p
t
u
O
V
T
U
O
V
0
=
6
Capacitance
(T
A
= 25C, f = 1 MHz)
Storage Temperature ............................................................. 65C to +150C
Ambient Temperature with Power Applied ............................. 40C to +85C
Supply Voltage to Ground Potential (Inputs & V
CC
Only) ............0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & I/O Only).. 0.5V to +V
CC
+0.5V
DC Input Voltage ...................................................................... 0.5V to +4.6V
DC Output Current ...............................................................................120 mA
Power Dissipation .................................................................................... 0.5W
Note:
Stresses greater than those listed under MAXI-
MUM RATINGS may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions above those indicated in the operational sec-
tions of this specification is not implied. Exposure to
absolute maximum rating conditions for extended
periods may affect reliability.
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25C ambient and maximum loading.
3. V
OH
= V
CC
0.6V at rated current.
4. This parameter is determined by device characterization but is not production tested.
5. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
Operating Range
Ambient Temperature = 40C to +85C, V
CC
= 3.3V 0.3V
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=
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A
m
1
.
0
=
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A
m
8
=
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A
m
2
1
=
V
C
C
2
.
0
-
4
.
2
)
3
(
4
.
2
)
3
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0
.
3
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3
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=
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m
1
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=
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=
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m
2
1
=
2
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0
3
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0
2
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0
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0
4
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2
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.
5
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o
v
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H
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I
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0
8
.
0
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rr
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h
g
i
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t
u
p
n
I
V
C
C
V
,.
x
a
M
=
N
I
V
=
C
C
1
A
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L
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rr
u
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w
o
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p
n
I
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C
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V
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=
N
I
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N
G
=
1
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ll
a
,
x
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M
=
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b
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d
st
u
p
t
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o
V
T
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O
V
=
C
C
V
T
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D
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G
=
1
1
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1
=
7
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0
2
.
1
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,
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5
.
1
=
N
I
V
=
L
I
V
r
o
H
I
V
,
C
C
V
0
=
5
4
4
7
0
8
1
A
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t
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t
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rr
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c
V
T
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O
V
,
V
5
.
1
=
N
I
V
=
L
I
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o
H
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V
,
C
C
V
0
=
0
5
0
9
0
0
2
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O
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5
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t
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V
C
C
.
x
a
M
=
0
6
5
3
1
0
4
2
DC Electrical Characteristics
(Over the Operating Range)
3
PS8492 08/10/00
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PI49FCT3805D
3.3V, 2 x 1:5 CMOS Clock Driver
Power Supply Characteristics
Parameters Description
Test Conditions
(1)
Min.
Typ
(2)
Max.
Units
I
CC
Quiescent Power
V
CC
= Max.
V
IN
= GND or V
CC
--
0.1
30
A
Supply Current
I
CC
Supply Current per
V
CC
= Max.
V
IN
= V
CC
0.6V
(3)
--
110
300
A
Inputs @ TTL HIGH
I
CCD
Supply Current per
V
CC
= Max.,
V
IN
= V
CC
--
0.09
0.16
mA/
Input per MHz
(4)
Outputs Open
V
IN
= GND
MH
Z
OE
A
or OE
B
= GND
Per Output Toggling
50% Duty Cycle
I
C
V
CC
= Max.,
V
IN
= V
CC
--
1.3
9.0
(5)
Outputs Open
V
IN
= GND
f
O
= 10 MH
Z
50% Duty Cycle
V
IN
= V
CC
0.6V
--
1.3
10.0
(5)
OE
A
or OE
B
= GND
V
IN
= GND
Mon. Outputs Toggling
mA
V
CC
= Max.,
V
IN
= V
CC
--
4.4
6.0
(5)
Outputs Open
V
IN
= GND
f
O
= 2.5 MH
Z
50% Duty Cycle
V
IN
= V
CC
0.6V
--
4.4
7.0
(5)
OE
A
or OE
B
= GND
V
IN
= GND
Eleven Outputs Toggling
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at V
CC
= 3.3V, +25C ambient.
3. Per TTL driven input (V
IN
= V
CC
0.6V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
C
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
I
CC
D
H
N
T
+ I
CCD
(f
O
N
O
)
I
CC
= Quiescent Current
I
CC
= Power Supply Current for a TTL High Input (V
IN
= V
CC
0.6V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
O
= Output Frequency
N
O
= Number of Outputs at f
O
All currents are in milliamps and all frequencies are in megahertz.
4
PS8492 08/10/00
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PI49FCT3805D
3.3V, 2 x 1:5 CMOS Clock Driver
Switching Characteristics over Operating Range
Switch Position
Definitions:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
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2
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e
D
n
B
o
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A
e
c
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r
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f
e
R
V
5
.
1
=
e
g
a
tl
o
V
0
.
3
s
n
t
/
R
t
F
e
m
i
T
ll
a
F
/
e
si
R
V
4
.
2
o
t
V
4
.
0
V
4
.
0
o
t
V
4
.
2
C
L
F
p
5
1
=
C
L
F
p
5
1
=
5
.
1
t
)
p
(
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V
5
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R
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2
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0
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5
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2
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0
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P
V
5
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c
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f
e
R
5
5
.
0
t
L
Z
t
,
,
H
Z
t
Z
L
t
,
Z
H
el
b
a
si
D
/
el
b
a
n
E
e
m
i
T
2
.
5
F
X
A
M
y
c
n
e
u
q
e
r
F
t
u
p
n
I
3
3
1
z
H
M
Tests Circuit for 133 MHz
Note:
1. Lumped load, C
L
= 15pF
2. These parameters are guaranteed by design
3. Series Resistor loading = 33ohms (See Test Circuit)
t
s
e
T
h
c
ti
w
S
W
O
L
el
b
a
si
D
W
O
L
el
b
a
n
E
V
6
H
G
I
H
el
b
a
si
D
H
G
I
H
el
b
a
n
E
D
N
G
st
u
p
n
I
r
e
h
t
O
ll
A
n
e
p
O
Pulse
Generator
f = 125MHz
D.U.T.
50
33
C
L
15pF
V
CC
Enable/Disable Time Test Set-Up
Pulse
Generator
D.U.T.
500
33
50
500
C
L
15pF
V
CC
S
6V
5
PS8492 08/10/00
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PI49FCT3805D
3.3V, 2 x 1:5 CMOS Clock Driver
Switching Waveforms
Output Skew t
SK
(o)
Pulse Skew t
SK
(p)
Package Skew t
SK
(t)
Propagation Delay
Enable and Disable Times
Input
t
PLH
3V
1.5V
0V
Output
V
OH
1.5V
V
OL
t
PHL
Input
tPLH
3V
1.5V
0V
Output
VOH
1.5V
VOL
tPHL
tSK(p) = | tPHL tPLH |
Input
tPLHx
3V
1.5V
0V
Ox
VOH
1.5V
VOL
tPHLx
tSK(o)
Oy
VOH
1.5V
VOL
tSK(o)
tPLHy
tPHLy
tSK(o) = | tPLHy tPLHx | or | tPHLy tPHLx |
Input
tPLH1
3V
1.5V
0V
Package 1
Output
VOH
1.5V
VOL
tPHL1
tSK(t)
Package 2
Output
VOH
1.5V
VOL
tSK(t)
tPLH2
tPHL2
tSK(t) = | tPLH2 tPLH1 | or | tPHL2 tPHL1 |
t
PZL
OE
1.5V
0V
3V
1.5V
3.0V
0V
1.5V
t
PLZ
V
OL
3.0V
0V
t
PZH
t
PHZ
0.3V
0.3V
Output
Normally
Low
Output
Normally
High
Switch
Closed
Switch
Open
V
OH
Enable
Disable
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