PI74FCT16501/162501/162H501T
18-BIT REGISTERED TRANSCEIVERS
1
PS2035A 03/11/96
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Logic Block Diagram
Product Description
Pericom Semiconductor's PI74FCT series of logic circuits are pro-
duced in the Company's advanced 0.6 micron CMOS technology,
achieving industry leading speed grades.
The PI74FCT16501T, PI74FCT162501T, and PI74FCT162H501T
are 18-bit are registered bus transceivers designed with D-type
latches and flip-flops to allow data flow in transparent, latched, and
clocked modes. The Output Enable (OEAB and OEBA, Latch
Enable (LEAB and LEBA) and Clock (CLKAB and CLKBA)
inputs control the data flow in each direction. When LEAB is
HIGH, the device operates in transparent mode for A-to-B data
flow. When LEAB is LOW, the A data is latched if CLKAB is held
at a HIGH or LOW logic level. The A bus data is stored in the latch/
flip-flop on the LOW-to-HIGH transition of CLKAB, if LEAB is LOW.
OEAB performs the output enable function on the B port. Data flow
from B port to A port is similar using OEBA, LEBA and CLKBA.
These high-speed, low power devices offer a flow-through
organization for ease of board layout.
The PI74FCT16501T output buffers are designed with a Power-Off
disable allowing "live insertion" of boards when used as backplane
drivers.
The PI74FCT162501T has 24 mA balanced output drivers. It is
designed with current limiting resistors at its outputs to control the
output edge rate resulting in lower ground bounce and undershoot.
This eliminates the need for external terminating resistors for most
interface applications.
The PI74FCT162H501T has "Bus Hold" which retains the input's
last state whenever the input goes to high-impedance preventing
"floating" inputs and eliminating the need for pull-up/down resistors.
Product Features
Common Features:
PI74FCT16501T, PI74FCT162501T, and PI74FCT162H501T
are high-speed,
low power devices with high current drive.
V
CC
= 5V 10%
Hysteresis on all inputs
Packages available
56-pin 240 mil wide plastic TSSOP (A)
56-pin 300 mil wide plastic SSOP (V)
PI74FCT16501T Features
High output drive: I
OH
= 32 mA; I
OL
= 64 mA
Power off disable outputs permit "live insertion"
Typical V
OLP
(Output Ground Bounce) < 1.0V
at V
CC
= 5V, T
A
= 25C
PI74FCT162501T Features
Balanced output drivers: 24 mA
Reduced system switching noise
Typical V
OLP
(Output Ground Bounce) < 0.6V
at V
CC
= 5V, T
A
= 25C
PI74FCT162H501T Features
Bus Hold retains last active bus state during 3-state
Eliminates the need for external pull-up resistors
PI74FCT16501T
PI74FCT162501T
PI74FCT162H501T
Fast CMOS 18-Bit
Registered Transceivers
LEAB
CLKAB
OEBA
LEBA
CLKBA
OEAB
D
C
D
C
A
1
D
C
D
C
B
1
TO 17 OTHER CHANNELS
PI74FCT16501/162501/162H501T
18-BIT REGISTERED TRANSCEIVERS
2
PS2035A 03/11/96
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Product Pin Description
Pin Name
Description
OEAB
A-to-B Output Enable Input
OEBA
B-to-A Output Enable Input (Active LOW)
LEAB
A-to-B Latch Enable Input
LEBA
B-to-A Latch Enable Input
CLKAB
A-to-B Clock Input
CLKBA
B-to-A Clock Input
Ax
A-to-B Data Inputs or B-to-A 3-State Outputs
(1)
Bx
B-to-A Data Inputs or A-to-B 3-State Outputs
(1)
GND
Ground
V
CC
Power
Inputs
Outputs
OEAB
LEAB
CLKAB
Ax
Bx
L
X
X
X
Z
H
H
X
L
L
H
H
X
H
H
H
L
L
L
H
L
H
H
H
L
L
X
B
(2)
H
L
H
X
B
(3)
Truth Table
(1,4)
Notes:
1. A-to-B data flow is shown. B-to-A data flow is similar but
uses OEBA, LEBA, and CLKBA.
2. Output level before the indicated steady-state input condi-
tions were established.
3. Output level before the indicated steady-state input condi-
tions were established, provided that CLKAB was LOW
before LEAB went LOW.
4. H = High Voltage Level
L = Low Voltage Level
Z = High Impedance
= LOW-to-HIGH Transition
Product Pin Configuration
Note:
1. For the PI74FCT162H501T, these pins have "Bus
Hold." All other pins are standard, outputs, or I/Os.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
25
26
27
28
32
31
30
29
OEAB
LEAB
A
0
GND
A
1
A
2
VCC
A
3
A
4
A
5
GND
A
6
A
7
A
8
A
9
A
10
A
11
GND
A
12
A
13
A
14
V
CC
A
15
A
16
GND
A
17
OEBA
LEBA
GND
CLKAB
B
0
GND
B
1
B
2
VCC
B
3
B
4
B
5
GND
B
6
B
7
B
8
B
9
B
10
B
11
GND
B
12
B
13
B
14
V
CC
B
15
B
16
GND
B
17
CLKBA
GND
56-PIN
V56
A56
PI74FCT16501/162501/162H501T
18-BIT REGISTERED TRANSCEIVERS
3
PS2035A 03/11/96
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
DC Electrical Characteristics
(Over the Operating Range, T
A
= 40C to +85C, V
CC
= 5.0V 10%)
Parameters Description
Test Conditions
(1)
Min.
Typ
(2)
Max.
Units
V
IH
Input HIGH Voltage
Guaranteed Logic HIGH Level
2.0
V
V
IL
Input LOW Voltage
Guaranteed Logic LOW Level
0.8
V
I
IH
Input HIGH Current
Standard Input, V
CC
= Max.
V
IN
= V
CC
1
A
I
IH
Input HIGH Current
Standard I/O, V
CC
= Max.
V
IN
= V
CC
1
A
I
IH
Input HIGH Current
Bus Hold Input
(4)
, V
CC
= Max.
V
IN
= V
CC
100
A
I
IH
Input HIGH Current
Bus Hold I/O
(4)
, V
CC
= Max.
V
IN
= V
CC
100
A
I
IL
Input LOW Current
Standard Input, V
CC
= Min.
V
IN
= GND
1
A
I
IL
Input LOW Current
Standard I/O, V
CC
= Min.
V
IN
= GND
1
A
I
IL
Input LOW Current
Bus Hold Input
(4)
, V
CC
= Min.
V
IN
= GND
100
A
I
IL
Input LOW Current
Bus Hold I/O
(4)
, V
CC
= Min.
V
IN
= GND
100
A
I
BHH
Bus Hold
Bus Hold Input
(4)
, V
CC
= Min.
V
IN
= 2.0V
50
A
I
BHL
Sustain Current
V
IN
= 0.8V
+50
I
OZH
(5)
High-Impedance
V
CC
= Max.
V
OUT
= 2.7V
1
A
I
OZL
(5)
Output Current
V
CC
= Max.
V
OUT
= 0.5V
1
A
(3-S
TATE
O
UTPUTS
)
V
IK
Clamp Diode Voltage
V
CC
= Min., I
IN
= 18 mA
0.7
1.2
V
I
OS
Short Circuit Current
V
CC
= Max.
(3)
, V
OUT
= GND
80
140
200
mA
I
O
Output Drive Current
V
CC
= Max.
(3)
, V
OUT
= 2.5V
50
180
mA
V
H
Input Hysteresis
100
mV
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .................................................................... 65C to +150C
Ambient Temperature with Power Applied .................................... 40C to +85C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .............. 0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) ........... 0.5V to +7.0V
DC Input Voltage ............................................................................ 0.5V to +7.0V
DC Output Current ..................................................................................... 120 mA
Power Dissipation .......................................................................................... 1.0W
Note:
Stresses greater than those listed under
MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions above those
indicated in the operational sections of this
specification is not implied. Exposure to
absolute maximum rating conditions for
extended periods may affect reliability.
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. Pins with Bus Hold are identified in the pin description.
5. This specification does not apply to bi-directional functionalities with Bus Hold.
PI74FCT16501/162501/162H501T
18-BIT REGISTERED TRANSCEIVERS
4
PS2035A 03/11/96
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
PI74FCT16501T Output Drive Characteristics
(Over the Operating Range)
Parameters Description
Test Conditions
(1)
Min.
Typ
(2)
Max.
Units
V
OH
Output HIGH Voltage
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OH
= 3.0 mA
2.5
3.5
V
I
OH
= 15.0 mA
2.4
3.5
I
OH
= 32.0 mA
2.0
3.0
V
OL
Output LOW Voltage
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OL
= 64 mA
0.2
0.55
V
I
OFF
Power Down Disable
V
CC
= 0V, V
IN
or V
OUT
4.5V
--
--
100
A
PI74FCT162501T/162H501T Output Drive Characteristics
(Over the Operating Range)
Parameters Description
Test Conditions
(1)
Min.
Typ
(2)
Max.
Units
V
OH
Output HIGH Voltage
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OH
= 24.0 mA
2.4
3.3
V
V
OL
Output LOW Voltage
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OL
= 24 mA
0.3
0.55
V
I
ODL
Output LOW Current
V
CC
= 5V, V
IN
= V
IH
OR
V
IL
, V
OUT
= 1.5V
(3)
60
115
150
mA
I
ODH
Output HIGH Current
V
CC
= 5V, V
IN
= V
IH
OR
V
IL
, V
OUT
= 1.5V
(3)
60
115
150
mA
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
Capacitance
(T
A
= 25C, f = 1 MHz)
Parameters
(4)
Description
Test Conditions
Typ
Max.
Units
C
IN
Input Capacitance
V
IN
= 0V
4.5
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
5.5
8
pF
PI74FCT16501/162501/162H501T
18-BIT REGISTERED TRANSCEIVERS
5
PS2035A 03/11/96
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Power Supply Characteristics
Parameters Description
Test Conditions
(1)
Min.
Typ
(2)
Max.
Units
I
CC
Quiescent Power
V
CC
= Max.
V
IN
= GND or V
CC
0.1
500
A
Supply Current
I
CC
Supply Current per
V
CC
= Max.
V
IN
= 3.4V
(3)
0.5
1.5
mA
Input @ TTL HIGH
I
CCD
Supply Current per
V
CC
= Max., Outputs Open
V
IN
= V
CC
75
120
A/
Input per MHz
(4)
OEAB = OEBA = V
CC
or GND
V
IN
= GND
MHz
One Bit Toggling
50% Duty Cycle
I
C
Total Power Supply
V
CC
= Max.,
V
IN
= V
CC
0.8
1.7
(5)
mA
Current
(6)
Outputs Open
V
IN
= GND
f
CP
= 10 MH
Z
(CLKAB)
50% Duty Cycle
OEAB = OEBA = V
CC
LEAB = GND
V
IN
= 3.4V
1.3
4.2
(5)
One Bit Toggling
V
IN
= GND
f
I
= 5 MH
Z
50% Duty Cycle
V
CC
= Max., Output Open
V
IN
= V
CC
3.8
6.5
(5)
f
CP
= 10 MH
Z
(CLKAB)
V
IN
= GND
50% Duty Cycle
OEAB = OEBA = V
CC
LEAB = GND
V
IN
= 3.4V
8.5
20.8
(5)
Eighteen Bits Toggling
V
IN
= GND
f
I
= 2.5 MH
Z
50% Duty Cycle
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. I
C
=I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
I
N
I
)
I
CC
= Quiescent Current
I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
I
= Input Frequency
N
I
= Number of Inputs at f
I
All currents are in milliamps and all frequencies are in megahertz.
PI74FCT16501/162501/162H501T
18-BIT REGISTERED TRANSCEIVERS
6
PS2035A 03/11/96
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
16501AT
16501CT
16501DT
16501ET
C o m .
C o m .
C o m .
C o m .
Parameters
Description
Conditions
(1)
Min
Max
Min
Max
Min
Max
Min
Max
Unit
t
MAX
CLKAB or CLKBA frequency
C
L
= 50 pF
--
150
--
150
--
150
--
150
MHz
t
PLH
Propagation Delay
R
L
= 500
1.5
5.1
1.5
4.6
1.5
4.1
1.5
3.8
ns
t
PHL
A
X
to B
X
or A
X
to B
X
t
PLH
Propagation Delay
1.5
5.6
1.5
5.3
1.5
4.6
1.5
4.2
ns
t
PHL
LEBA to A
X
, LEAB to B
X
t
PLH
Propagation Delay
1.5
5.6
1.5
5.3
1.5
4.6
1.5
4.2
ns
t
PHL
CLKBA to A
X
, CLKAB to B
X
t
PZH
Output Enable Time
1.5
6.0
1.5
5.6
1.5
5.2
1.5
4.8
ns
t
PZL
OEBA to A
X
, OEAB to B
X
t
PHZ
Output Disable Time
(3)
1.5
5.6
1.5
5.2
1.5
5.2
1.5
5.2
ns
t
PLZ
OEBA to A
X
, OEAB to B
X
t
SU
Setup Time HIGH or LOW
3.0
--
3.0
--
3.0
--
2.4
--
ns
Ax to CLKAB, Bx to CLKBA
t
H
Hold Time HIGH or LOW
0
--
0
--
0
--
0
--
ns
Ax to CLKAB, Bx to CLKBA
t
SU
Setup Time
Clock HIGH
3.0
--
3.0
--
3.0
--
2.0
--
ns
HIGH or LOW
Ax to LEAB,
Clock LOW
1.5
--
1.5
--
1.5
--
1.5
--
ns
Bx to LEBA
t
H
Hold Time HIGH or LOW
1.5
--
1.5
--
1.5
--
0.5
--
ns
Ax to LEAB, Bx to LEBA
t
W
LEAB or LEBA Pulse Width
3.0
--
3.0
--
3.0
--
3.0
--
ns
HIGH
(3)
t
W
CLKAB or CLKBA Pulse Width
3.0
--
3.0
--
3.0
--
3.0
--
ns
HIGH or LOW
(3)
t
SK
(
O
)
Output Skew
(4)
--
0.5
--
0.5
--
0.5
--
0.5
ns
PI74FCT16501T Switching Characteristics over Operating Range
PI74FCT16501/162501/162H501T
18-BIT REGISTERED TRANSCEIVERS
7
PS2035A 03/11/96
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
162501AT
162501CT
162501DT
162501ET
Com.
Com.
Com.
Com.
Parameters
Description
Conditions
(1)
Min
Max
Min
Max
Min
Max
Min
Max
Unit
t
MAX
CLKAB or CLKBA frequency
C
L
= 50 pF
--
150
--
150
--
150
--
150
MHz
t
PLH
Propagation Delay
R
L
= 500
1.5
5.1
1.5
4.6
1.5
4.1
1.5
3.8
ns
t
PHL
A
X
to B
X
or A
X
to B
X
t
PLH
Propagation Delay
1.5
5.6
1.5
5.3
1.5
4.6
1.5
4.2
ns
t
PHL
LEBA to A
X
, LEAB to B
X
t
PLH
Propagation Delay
1.5
5.6
1.5
5.3
1.5
4.6
1.5
4.2
ns
t
PHL
CLKBA to A
X
, CLKAB to B
X
t
PZH
Output Enable Time
1.5
6.0
1.5
5.6
1.5
5.2
1.5
4.8
ns
t
PZL
OEBA to A
X
, OEAB to B
X
t
PHZ
Output Disable Time
(3)
1.5
5.6
1.5
5.2
1.5
5.2
1.5
5.2
ns
t
PLZ
OEBA to A
X
, OEAB to B
X
t
SU
Setup Time HIGH or LOW
3.0
--
3.0
--
3.0
--
2.4
--
ns
Ax to CLKAB, Bx to CLKBA
t
H
Hold Time HIGH or LOW
0
--
0
--
0
--
0
--
ns
Ax to CLKAB, Bx to CLKBA
t
SU
Setup Time
Clock HIGH
3.0
--
3.0
--
3.0
--
2.0
--
ns
HIGH or LOW
Ax to LEAB,
Clock LOW
1.5
--
1.5
--
1.5
--
1.5
--
ns
Bx to LEBA
t
H
Hold Time HIGH or LOW
1.5
--
1.5
--
1.5
--
0.5
--
ns
Ax to LEAB, Bx to LEBA
t
W
LEAB or LEBA Pulse Width
3.0
--
3.0
--
3.0
--
3.0
--
ns
HIGH
(3)
t
W
CLKAB or CLKBA Pulse Width
3.0
--
3.0
--
3.0
--
3.0
--
ns
HIGH or LOW
(3)
t
SK
(
O
)
Output Skew
(4)
--
0.5
--
0.5
--
0.5
--
0.5
ns
PI74FCT162501T Switching Characteristics over Operating Range
PI74FCT16501/162501/162H501T
18-BIT REGISTERED TRANSCEIVERS
8
PS2035A 03/11/96
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
162H501AT
162H501CT
162H501DT
162H501ET
Com.
Com.
Com.
Com.
Parameters
Description
Conditions
(1)
Min
Max
Min
Max
Min
Max
Min
Max
Unit
t
MAX
CLKAB or CLKBA frequency
C
L
= 50 pF
--
150
--
150
--
150
--
150
MHz
t
PLH
Propagation Delay
R
L
= 500
1.5
5.1
1.5
4.6
1.5
4.1
1.5
3.8
ns
t
PHL
A
X
to B
X
or A
X
to B
X
t
PLH
Propagation Delay
1.5
5.6
1.5
5.3
1.5
4.6
1.5
4.2
ns
t
PHL
LEBA to A
X
, LEAB to B
X
t
PLH
Propagation Delay
1.5
5.6
1.5
5.3
1.5
4.6
1.5
4.2
ns
t
PHL
CLKBA to A
X
, CLKAB to B
X
t
PZH
Output Enable Time
1.5
6.0
1.5
5.6
1.5
5.2
1.5
4.8
ns
t
PZL
OEBA to A
X
, OEAB to B
X
t
PHZ
Output Disable Time
(3)
1.5
5.6
1.5
5.2
1.5
5.2
1.5
5.2
ns
t
PLZ
OEBA to A
X
, OEAB to B
X
t
SU
Setup Time HIGH or LOW
3.0
--
3.0
--
3.0
--
2.4
--
ns
Ax to CLKAB, Bx to CLKBA
t
H
Hold Time HIGH or LOW
0
--
0
--
0
--
0
--
ns
Ax to CLKAB, Bx to CLKBA
t
SU
Setup Time
Clock HIGH
3.0
--
3.0
--
3.0
--
2.0
--
ns
HIGH or LOW
Ax to LEAB,
Clock LOW
1.5
--
1.5
--
1.5
--
1.5
--
ns
Bx to LEBA
t
H
Hold Time HIGH or LOW
1.5
--
1.5
--
1.5
--
0.5
--
ns
Ax to LEAB, Bx to LEBA
t
W
LEAB or LEBA Pulse Width
3.0
--
3.0
--
3.0
--
3.0
--
ns
HIGH
(3)
t
W
CLKAB or CLKBA Pulse Width
3.0
--
3.0
--
3.0
--
3.0
--
ns
HIGH or LOW
(3)
t
SK
(
O
)
Output Skew
(4)
--
0.5
--
0.5
--
0.5
--
0.5
ns
PI74FCT162H501T Switching Characteristics over Operating Range (Advance Information)
Pericom Semiconductor Corporation
2380 Bering Drive San Jose, CA 95131 1-800-435-2336 Fax (408) 435-1100 http://www.pericom.com
PDF 
ZIP