PI74FCT16841T/162841T
20-BIT TRANSPARENT LATCH
1
PS2078A 01/15/95
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
PI74FCT16841T
PI74FCT162841T
Fast CMOS 20-Bit
Transparent Latch
Logic Block Diagram
Product Description:
Pericom Semiconductor's PI74FCT series of logic circuits are pro-
duced in the Company's advanced 0.8 micron CMOS technology,
achieving industry leading speed grades.
The PI74FCT16841T and PI74FCT162841T are 20-bit wide
transparent latches designed to provide temporary storage of data
and can be used as I/O ports, memory address latches, and bus
drivers. The Output Enable and Latch Enable controls allow the
devices to be operated as two 10-bit latches or one 20-bit latch.
Signal pins are arranged in a flow-through organization for ease of
layout and hysteresis is designed into all inputs to improve noise
margin.
The output buffers on the PI74FCT16841T and PI74FCT162841T
are especially designed for driving high-capacitance loads and low
impedance backplanes and include a Power-Off Disable function
allowing "live insertion" of boards when the devices are used as
backplane drivers.
The PI74FCT162841T has 24 mA balanced output drivers. It is
designed with current limiting resistors at its outputs to control the
output edge rate resulting in lower ground bounce and undershoot.
This eliminates the need for external terminating resistors for most
interface applications.
Product Features:
Common Features:
PI74FCT16841T and PI74FCT162841T are high-speed, low
power devices with high current drive
V
CC
= 5V 10%
Hysteresis on all inputs
Packages available:
56-pin 240 mil wide plastic TSSOP (A)
56-pin 300 mil wide plastic SSOP (V)
PI74FCT16841T Features:
High output drive: I
OH
= 32 mA; I
OL
= 64 mA
Power off disable outputs permit "live insertion"
Typical V
OLP
(Output Ground Bounce) < 1.0V
at V
CC
= 5V, T
A
= 25C
PI74FCT162841T Features:
Balanced output drivers: 24 mA
Reduced system switching noise
Typical V
OLP
(Output Ground Bounce) < 0.6V
at V
CC
= 5V, T
A
= 25C
D
1
OE
C
1
LE
1
D
1
1
Q
1
To 9 other channels
D
2
OE
C
2
LE
2
D
1
2
Q
1
To 9 other channels
PI74FCT16841T/162841T
20-BIT TRANSPARENT LATCH
2
PS2078A 01/15/95
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Pin Name
Description
xDx
Data Inputs
xLE
Latch Enable Input (Active LOW)
xOE
Output Enable Input (Active LOW)
xQx
3-State Outputs
Product Pin Description
Product Configuration
Inputs
Outputs
xDx
xLE
xOE
xQx
H
H
L
H
L
H
L
L
X
L
L
Q
(2)
X
X
H
Z
Truth Table
(1)
1.
H = High Voltage Level
L = Low Voltage Level
X = Don't Care
Z = High Impedance
2.
Output level before xLE HIGH-to-LOW
Transition.
1
OE
1
1
Q
1
2
1
Q
2
3
GND
4
1
Q
3
5
1
Q
4
6
V
CC
7
1
Q
5
8
1
Q
6
9
1
Q
7
10
GND
11
1
Q
8
12
1
Q
9
13
1
Q
10
14
2
Q
1
15
2
Q
2
16
2
Q
3
17
GND
18
2
Q
4
19
2
Q
5
20
2
Q
6
21
V
CC
22
2
Q
7
23
2
Q
8
24
1
LE
56
1
D
1
55
1
D
2
54
GND
53
1
D
3
52
1
D
4
51
V
CC
50
1
D
5
49
1
D
6
48
1
D
7
47
GND
46
1
D
8
45
1
D
9
44
1
D
10
43
2
D
1
42
2
D
2
41
2
D
3
40
GND
39
2
D
4
38
2
D
5
37
2
D
6
36
V
CC
35
2
D
7
34
2
D
8
33
GND
25
2
Q
9
26
2
Q
10
27
2
OE
28
GND
32
2
D
9
31
2
D
10
30
2
LE
29
56-PIN
V56
A56
PI74FCT16841T/162841T
20-BIT TRANSPARENT LATCH
3
PS2078A 01/15/95
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
DC Electrical Characteristics
(Over the Operating Range, T
A
= 40C to +85C, V
CC
= 5.0V 10%)
Parameters
Description
Test Conditions
(1)
Min.
Typ
(2)
Max.
Units
V
IH
Input HIGH Voltage
Guaranteed Logic HIGH Level
2.0
V
V
IL
Input LOW Voltage
Guaranteed Logic LOW Level
0.8
V
I
IH
Input HIGH Current
V
CC
= Max.
V
IN
= V
CC
1
A
I
IL
Input LOW Current
V
CC
= Max.
V
IN
= GND
1
A
I
OZH
High Impedance
V
CC
= Max.
V
OUT
= 2.7V
1
A
I
OZL
Output Current
V
CC
= Max.
V
OUT
= 0.5V
1
A
V
IK
Clamp Diode Voltage
V
CC
= Min., I
IN
= 18 mA
0.7
1.2
V
I
OS
Short Circuit Current
V
CC
= Max.
(3)
, V
OUT
= GND
80
140
200
mA
I
O
Output Drive Current
V
CC
= Max.
(3)
, V
OUT
= 2.5V
50
180
mA
V
H
Input Hysteresis
100
mV
PI74FCT16841T Output Drive Characteristics
(Over the Operating Range)
Parameters Description
Test Conditions
(1)
Min.
Typ
(2)
Max.
Units
V
OH
Output HIGH Voltage
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OH
= 3.0 mA
2.5
3.5
V
I
OH
= 15.0 mA
2.4
3.5
I
OH
= 32.0 mA
2.0
3.0
V
OL
Output LOW Voltage
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OL
= 64 mA
0.2
0.55
V
I
OFF
Power Down Disable
V
CC
= 0V, V
IN
or V
OUT
4.5V
--
--
100
A
PI74FCT162841T Output Drive Characteristics
(Over the Operating Range)
Parameters
Description
Test Conditions
(1)
Min.
Typ
(2)
Max.
Units
V
OH
Output HIGH Voltage
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OH
= 24.0 mA
2.4
3.3
V
V
OL
Output LOW Voltage
V
CC
= Min., V
IN
= V
IH
or V
IL
I
OL
= 24 mA
0.3
0.55
V
I
ODL
Output LOW Current
V
CC
= 5V, V
IN
= V
IH
OR
V
IL
, V
OUT
= 1.5V
(3)
60
115
150
mA
I
ODH
Output HIGH Current
V
CC
= 5V, V
IN
= V
IH
OR
V
IL
, V
OUT
= 1.5V
(3)
60
115
150
mA
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
Capacitance
(T
A
= 25C, f = 1 MHz)
Parameters
(4)
Description
Test Conditions
Typ
Max.
Units
C
IN
Input Capacitance
V
IN
= 0V
4.5
6
pF
C
OUT
Output Capacitance
V
OUT
= 0V
5.5
8
pF
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ................................................................... 65C to +150C
Ambient Temperature with Power Applied .................................... 40C to +85C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .............. 0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) ........... 0.5V to +7.0V
DC Input Voltage ............................................................................ 0.5V to +7.0V
DC Output Current ..................................................................................... 120 mA
Power Dissipation .......................................................................................... 1.0W
Note:
Stresses greater than those listed under
MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions above those
indicated in the operational sections of this
specification is not implied. Exposure to
absolute maximum rating conditions for
extended periods may affect reliability.
PI74FCT16841T/162841T
20-BIT TRANSPARENT LATCH
4
PS2078A 01/15/95
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. I
C
=I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 +
FI
N
I
)
I
CC
= Quiescent Current
I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
I
= Input Frequency
N
I
= Number of Inputs at f
I
All currents are in milliamps and all frequencies are in megahertz.
Power Supply Characteristics
Parameters Description
Test Conditions
(1)
Min.
Typ
(2)
Max.
Units
I
CC
Quiescent Power
V
CC
= Max.
V
IN
= GND
0.1
500
A
Supply Current
or V
CC
I
CC
Supply Current per
V
CC
= Max.
V
IN
= 3.4V
(3)
0.5
2.5
mA
Input @ TTL HIGH
I
CCD
Supply Current per
V
CC
= Max.,
V
IN
= V
CC
0.15
0.25
mA/
Input per MHz
(4)
Outputs Open
V
IN
= GND
MHz
OE = GND; LE = Vcc
One Input Toggling
50% Duty Cycle
I
C
Total Power Supply
V
CC
= Max.,
V
IN
= V
CC
1.7
4.0
(5)
mA
Current
(6)
Outputs Open
V
IN
= GND
f
CP
= 10 MH
Z
50% Duty Cycle
V
IN
= 3.4V
2.0
5.0
(5)
OE = GND; LE = Vcc
V
IN
= GND
f
I
= 5 MH
Z
One Bit Toggling
V
CC
= Max.,
V
IN
= V
CC
3.2
6.5
(5)
Outputs Open
V
IN
= GND
f
CP
= 10 MH
Z
50% Duty Cycle
V
IN
= 3.4V
5.2
14.5
(5)
OE = GND; LE = Vcc
V
IN
= GND
Eight Bits Toggling
f
I
= 2.5 MH
Z
50% Duty Cycle
PI74FCT16841T/162841T
20-BIT TRANSPARENT LATCH
5
PS2078A 01/15/95
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
PI74FCT16841 Switching Characteristics over Operating Range
16841AT
16841BT
16841CT
16841DT
16841ET
C o m .
C o m .
C o m .
C o m .
C o m .
Parameters
Description
Conditions
(1)
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Unit
t
PLH
Propagation Delay
C
L
= 50 pF
1.5
9.0
1.5
6.5
1.5
5.5
1.5
4.2
1.5
3.4
ns
t
PHL
X
D
X
to
X
Q
X
R
L
= 500
(LE = HIGH)
C
L
= 300 pF
(3)
1.5
13.0
1.5
13.0
1.5
13.0
1.5
13.0
1.5
7.5
ns
R
L
= 500
t
PLH
Propagation Delay
C
L
= 50 pF
1.5
12.0
1.5
8.0
1.5
6.4
1.5
4.0
1.5
3.7
ns
t
PHL
X
LE to
X
Q
X
R
L
= 500
C
L
= 300 pF
(3)
1.5
16.0
1.5
15.5
1.5
15.0
1.5
8.0
1.5
7.5
ns
R
L
= 500
t
PZH
Output Enable Time
C
L
= 50 pF
1.5
11.5
1.5
8.0
1.5
6.5
1.5
4.8
1.5
4.4
ns
t
PZL
X
OE to
X
Q
X
R
L
= 500
C
L
= 300 pF
(4)
1.5
23.0
1.5
14.0
1.5
12.0
1.5
9.0
1.5
9.0
ns
R
L
= 500
t
PHZ
Output Disable Time
(3)
C
L
= 5 pF
(3)
1.5
7.0
1.5
6.0
1.5
5.7
1.5
4.0
1.5
4.0
ns
t
PLZ
X
OE to
X
Q
X
R
L
= 500
C
L
= 50 pF
1.5
8.0
1.5
7.0
1.5
6.0
1.5
5.4
1.5
4.0
ns
R
L
= 500
t
SU
Setup Time HIGH or
C
L
= 50 pF
2.5
--
2.5
--
2.5
--
1.0
--
1.0
--
ns
LOW,
X
D
X
to
X
LE
R
L
= 500
t
H
Hold Time HIGH or
2.5
--
2.5
--
2.5
--
1.0
--
1.0
--
ns
LOW,
X
D
X
to
X
LE
t
W
xLE Pulse Width HIGH
(3)
4.0
--
4.0
--
4.0
--
4.0
--
3.0
--
ns
t
SK
(
O
)
Output Skew
(4)
--
0.5
--
0.5
--
0.5
--
0.5
--
0.5
ns
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
PI74FCT16841T/162841T
20-BIT TRANSPARENT LATCH
6
PS2078A 01/15/95
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
PI74FCT16841 Switching Characteristics over Operating Range
162841AT
162841BT
162841CT
162841DT
162841ET
C o m .
C o m .
C o m .
C o m .
C o m .
Parameters
Description
Conditions
(1)
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Unit
t
PLH
Propagation Delay
C
L
= 50 pF
1.5
9.0
1.5
6.5
1.5
5.5
1.5
4.2
1.5
3.4
ns
t
PHL
X
D
X
to
X
Q
X
R
L
= 500
(LE = HIGH)
C
L
= 300 pF
(3)
1.5
13.0
1.5
13.0
1.5
13.0
1.5
13.0
1.5
7.5
ns
R
L
= 500
t
PLH
Propagation Delay
C
L
= 50 pF
1.5
12.0
1.5
8.0
1.5
6.4
1.5
4.0
1.5
3.7
ns
t
PHL
X
LE to
X
Q
X
R
L
= 500
C
L
= 300 pF
(3)
1.5
16.0
1.5
15.5
1.5
15.0
1.5
8.0
1.5
7.5
ns
R
L
= 500
t
PZH
Output Enable Time
C
L
= 50 pF
1.5
11.5
1.5
8.0
1.5
6.5
1.5
4.8
1.5
4.4
ns
t
PZL
X
OE to
X
Q
X
R
L
= 500
C
L
= 300 pF
(4)
1.5
23.0
1.5
14.0
1.5
12.0
1.5
9.0
1.5
9.0
ns
R
L
= 500
t
PHZ
Output Disable Time
(3)
C
L
= 5 pF
(3)
1.5
7.0
1.5
6.0
1.5
5.7
1.5
4.0
1.5
4.0
ns
t
PLZ
X
OE to
X
Q
X
R
L
= 500
C
L
= 50 pF
1.5
8.0
1.5
7.0
1.5
6.0
1.5
5.4
1.5
4.0
ns
R
L
= 500
t
SU
Setup Time HIGH or
C
L
= 50 pF
2.5
--
2.5
--
2.5
--
1.0
--
1.0
--
ns
LOW,
X
D
X
to
X
LE
R
L
= 500
t
H
Hold Time HIGH or
2.5
--
2.5
--
2.5
--
1.0
--
1.0
--
ns
LOW,
X
D
X
to
X
LE
t
W
xLE Pulse Width HIGH
(3)
4.0
--
4.0
--
4.0
--
4.0
--
3.0
--
ns
t
SK
(
O
)
Output Skew
(4)
--
0.5
--
0.5
--
0.5
--
0.5
--
0.5
ns
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
PDF 
ZIP