1
PS8691 07/01/03
B
0
A
0
OE
DIR
B
1
A
1
B
2
A
2
B
3
A
3
B
4
A
4
B
5
A
5
B
6
A
6
B
7
A
7
Product Description
Pericom Semiconductor's PI74LVTC series of logic circuits are
produced using the Company's advanced CMOS technology, achiev-
ing industry leading speed.
The PI74LVTC245 is a non-inverting 8-bit Bidirectional Transceiver
designed for low-voltage 2.7V to 3.6V V
CC
operation, with the
capability of interfacing to the 5V system environment. This tranceiver
is designed for asynchronous two-way communication between
data buses. The direction control input pin (DIR) determines the
direction of the dataflow from the A bus to the
B bus or from the B bus to the A bus. The output enable (OE) input,
when HIGH, disables both A and B ports by placing them in
HIGH Z condition.
When Vcc is between 0 to 1.5V during power up or power down, the
outputs of the device are in the high-impedance state. To ensure the
high-impedance state above 1.5V, OE should be tied to V
CC
through
a pullup resistor; the minimum value of the resistor is determined by
the current sinking capability of the driver.
The device fully supports live-insertion with its I
off
and power-up/
down 3-state. The I
off
circuitry disables the outputs when the power
is off, preventing the backflow of damaging current through
the device. Power-up/down 3-state places the outputs in the
high-impedance state during power up or power down, preventing
driver conflict.
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3.3V 8-Bit Bi-Directional Transceiver
with 3-State Outputs
Logic Block Diagram
Product Features
Advanced low power CMOS design for 2.7V to 3.6V
V
CC
operation
Supports 5V input/output tolerance in mixed signal mode
operation
Function compatible with LVT family of products
Balanced 24mA output drive
Typical V
OLP
(Output Ground Bounce) <0.8V at V
CC
=3.3V,
T
A
=25C
I
off
and Power Up/Down 3-State support live insertion
Latch-up performance exceeds 200mA Per JESD78
ESD protection exceeds JESD 22
- 2000V Human-Body Model (A114-B)
- 200V Machine Model (A115-A)
Packages (Pb-free available):
- 20-pin 209-mil wide plastic SSOP (H)
- 20-pin 173-mil wide plastic TSSOP (L)
20-pin 300-mil wide plastic SOIC (S)
PI74LVTC245
Product Pin Configuration
DIR
A0
A1
A2
A3
A4
A5
A6
A7
GND
VCC
OE
B0
B1
B2
B3
B4
B5
B6
B7
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
20-Pin
H, L, S
2
PS8691 07/01/03
PI74LVTC245
3.3V, 8-Bit Bi-Directional Tranceiver
with 3-State Outputs
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Maximum Ratings
(Above which the useful life may be impaired.
For user guidelines, not tested.)
Supply voltage range, V
CC
............................... 0.5V to +6.5V
Input voltage range, V
I
(1)
................................. 0.5V to +6.5V
Voltage range applied to any output in the
high-impedance or power-off state, V
O
(1)
........ 0.5V to +6.5V
Voltage range applied to any output in the
active state, V
O
(1),(2)
................................. 0.5V to V
CC
+0.5V
Input clamp current, I
IK
(V
I
<0) ..................................... 50mA
Output clamp current, I
OK
(V
O
<0) ............................... 50mA
Continous Output Current I
O
....................................... 50mA
Continous Current through each V
CC
or GND pin ............... 100mA
Package thermal impedance,
JA
(3)
:package H ............ 81C/W
package L ............. 84C/W
package S ............. 84C/W
Storage Temperature range, T
stg
..................... 65C to 150C
1. Input negative-voltage and output voltage ratings may be exceeded if the
input and output clamp current ratings are observed.
2. This value is limited to 6.5 maximum
3. The package thermal impedance is calculated in accordance with JESD 51.
Notes:
Stresses greater than those listed under MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
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A
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B
H
X
Z
Product Pin Description
Truth Table
(4)
Notes:
4. H = High Signal Level
L = Low Signal Level
X = Don't Care or Irrelevant
Z = High Impedance
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w
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P
PI74LVTC245
3.3V, 8-Bit Bi-Directional Tranceiver
with 3-State Outputs
3
PS8691 07/01/03
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Recommended Operating Conditions
(5)
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3
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C
V
7
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2
=
2
1
V
C
C
V
6
.
3
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V
0
.
3
=
4
2
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p
O
0
4
5
8
C
Notes:
5. All unused inputs must be held at V
CC
or GND to ensure proper device operation.
4
PS8691 07/01/03
PI74LVTC245
3.3V, 8-Bit Bi-Directional Tranceiver
with 3-State Outputs
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1
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2
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2
=
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5
DC Electrical Characteristics
(Over the Operating Range, T
A
= 40C to +85C)
Notes:
6. For I/O ports, Input Leakage Current (I
I
) includes the 3-state Output Leakage Current. Unused pins are at V
CC
or GND.
7. This applies in the disabled state only.
8. This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC
or GND.
PI74LVTC245
3.3V, 8-Bit Bi-Directional Tranceiver
with 3-State Outputs
5
PS8691 07/01/03
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3
3
Capacitance
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1
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5
.
0
Switching Characteristics Over Operating Range
Notes:
11.Skew between any two outputs, switching in the same direction.
Notes:
9. All typical values are measured at V
CC
= 3.3V, T
A
= 25C.
10. C
PD
is defined as the value of the internal equivalent capacitance withic is derived from dynamic operating current consumption (I
CCD
) at no
output loading and operating at 50% duty cycle, C
PD
is related to I
CCD
dynamic operating current by the expression: I
CCD
=
(C
PD
)(V
CC
)(f
IN
)+(I
CC
static).
6
PS8691 07/01/03
PI74LVTC245
3.3V, 8-Bit Bi-Directional Tranceiver
with 3-State Outputs
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PARAMETER MEASUREMENT INFORMATION
V
CC
= 2.7V and 3.3V 0.3V
Load Circuit
t
s
e
T
1
S
t
H
L
P
t/
L
H
P
t
Z
L
P
t/
L
Z
P
t
Z
H
P
t/
H
Z
P
n
e
p
O
V
6
D
N
G
Notes:
A. C
L
includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input impulses are supplied by generators having the following characteristics: PRR
10 MHz, Z
O
= 50ohm, t
R
2.5ns, t
F
2.5ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
Voltage Waveforms
Propagation Delay Times
Voltage Waveforms
Enable and Disable Times
Voltage Waveforms
Pulse Duration
t
PZL
Output
Control
(Low Level
Enabling)
0V
1.5V
1.5V
1.5V
1.5V
t
PLZ
t
PHZ
V
OL
3V
0V
t
PZH
+0.3V
0.3V
Output
Waveform 1
S1 at 6V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
V
OH
V
OH
V
OL
2.7V
500ohm
500ohm
6V
Open
GND
S1
From Output
Under Test
CL = 50pF
(See Note A)
Input
t
PLH
t
PHL
0V
Output
V
OH
V
OL
1.5V
1.5V
1.5V
2.7V
1.5V
Input
t
W
1.5V
2.7V
1.5V
0V
PI74LVTC245
3.3V, 8-Bit Bi-Directional Tranceiver
with 3-State Outputs
7
PS8691 07/01/03
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Packaging Mechanical: 20-pin SSOP (H)
Packaging Mechanical: 20-pin TSSOP (L)
.272
.295
.078
.002
SEATING
PLANE
.0098
Max.
.0256
BSC
.022
.037
.004
.009
.291
.322
1
20
.197
.220
0.25
X.XX
X.XX
DENOTES DIMENSIONS
IN MILLIMETERS
0.050
7.40
8.20
0.55
0.95
0.09
0.25
5.00
5.60
2.00
6.90
7.50
0.65
Max
Min
.252
.260
.047
1.20
.002
.006
SEATING
PLANE
.0256
BSC
.018
.030
.004
.008
.238
.269
1
20
.169
.177
X.XX
X.XX
DENOTES CONTROLLING
DIMENSIONS IN MILLIMETERS
0.05
0.15
6.1
6.7
0.45
0.75
0.09
0.20
4.3
4.5
6.4
6.6
0.65
0.19
0.30
.007
.012
Max
8
PS8691 07/01/03
PI74LVTC245
3.3V, 8-Bit Bi-Directional Tranceiver
with 3-State Outputs
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Pericom Semiconductor Corporation
2380 Bering Drive San Jose, CA 95131 1-800-435-2336 Fax (408) 435-1100 http://www.pericom.com
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4
7
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5
4
2
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4
7
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1
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S
5
4
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T
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4
7
I
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Ordering Information
Packaging Mechanical: 20-pin SOIC (S)
SEATING
PLANE
.050
BSC
1
20
0-8
.2914
.2992
X.XX
X.XX
DENOTES CONTROLLING
DIMENSIONS IN MILLIMETERS
7.40
7.60
.496
.511
12.60
12.99
1.27
.0926
.1043
2.35
2.65
.394
.419
10.00
10.65
.0040
.0118
0.10
0.30
.013
.020
0.33
0.51
.010
.029
0.254
0.737
.0091
.0125
0.23
0.32
0.41
1.27
.016
.050
x 45
.020
.030
0.508
0.762
REF
Notes:
1. Thermal characteristics can be found on the company web site at http://www.pericom.com/packaging/mechanicals.php
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