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Электронный компонент: 74ABT543AN

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Philips
Semiconductors
74ABT543A
Octal latched transceiver
with dual enable (3-State)
Product specification
Supersedes data of 1995 Apr 19
IC23 Data Handbook
1998 Sep 24
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74ABT543A
Octal latched transceiver with dual enable
(3-State)
2
1998 Sep 24
853-1794 20080
FEATURES
Combines 74ABT245 and 74ABT373 type functions in one device
8-bit octal transceiver with D-type latch
Back-to-back registers for storage
Separate controls for data flow in each direction
Output capability: +64mA/32mA
Live insertion/extraction permitted
Power-up 3-State
Power-up reset
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
DESCRIPTION
The 74ABT543A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT543A Octal Registered Transceiver contains two sets of
D-type latches for temporary storage of data flowing in either
direction. Separate Latch Enable (LEAB, LEBA) and Output Enable
(OEAB, OEBA) inputs are provided for each register to permit
independent control of data transfer in either direction. The outputs
are guaranteed to sink 64mA.
FUNCTIONAL DESCRIPTION
The 74ABT543A contains two sets of eight D-type latches, with
separate control pins for each set. Using data flow from A to B as an
example, when the A-to-B Enable (EAB) input and the A-to-B Latch
Enable (LEAB) input are Low the A-to-B path is transparent. A
subsequent Low-to-High transition of the LEAB signal puts the A
data into the latches where it is stored and the B outputs no longer
change with the A inputs. With EAB and OEAB both Low, the
3-State B output buffers are active and display the data present at
the outputs of the A latches.
Control of data flow from B to A is similar, but using the EBA, LEBA,
and OEBA inputs.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
T
amb
= 25
C; GND = 0V
TYPICAL
UNIT
t
PLH
t
PHL
Propagation delay
An to Bn or Bn to An
C
L
= 50pF; V
CC
= 5V
2.9
3.6
ns
C
IN
Input capacitance
V
I
= 0V or V
CC
4
pF
C
I/O
I/O capacitance
Outputs disabled;
V
O
= 0V or V
CC
7
pF
I
CCZ
Total supply current
Outputs disabled; V
CC
=5.5V
110
A
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
24-Pin Plastic DIP
40
C to +85
C
74ABT543A N
74ABT543A N
SOT222-1
24-Pin plastic SO
40
C to +85
C
74ABT543A D
74ABT543A D
SOT137-1
24-Pin Plastic SSOP Type II
40
C to +85
C
74ABT543A DB
74ABT543A DB
SOT340-1
24-Pin Plastic TSSOP Type I
40
C to +85
C
74ABT543A PW
7ABT543APW DH
SOT355-1
PIN CONFIGURATION
24
23
22
21
20
19
18
17
16
10
15
9
8
7
6
5
4
3
2
1
VCC
EBA
B0
B1
B2
B3
B4
B5
B6
B7
OEBA
A0
A1
A2
A3
A4
A5
A6
A7
LEBA
14
12
13
11
LEAB
OEAB
EAB
GND
SA00168
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
14, 1
LEAB / LEBA
A to B / B to A Latch Enable
input (active-Low)
11, 23
EAB / EBA
A to B / B to A Enable input
(active-Low)
13, 2
OEAB / OEBA
A to B / B to A Output Enable
input (active-Low)
3, 4, 5, 6,
7, 8, 9, 10
A0 A7
Port A, 3-State outputs
22, 21, 20, 19,
18, 17, 16, 15
B0 B7
Port B, 3-State outputs
12
GND
Ground (0V)
24
V
CC
Positive supply voltage
Philips Semiconductors
Product specification
74ABT543A
Octal latched transceiver with dual enable
(3-State)
1998 Sep 24
3
LOGIC SYMBOL
21
22
B0 B1 B2
19
20
B3
3
4
5
6
A0 A1 A2 A3
11
23
17
18
B4 B5 B6
15
16
B7
7
8
9
10
A4 A5 A6 A7
EAB
EBA
14
LEAB
1
LEBA
13
OEAB
2
OEBA
SA00169
LOGIC SYMBOL (IEEE/IEC)
3
24
22
13
1
23
2
(BA)
(AB)
22
3
4
21
5
20
6
19
7
18
8
17
10
15
9
16
5D
6D
2
1EN3
G1
1C5
2EN4
G2
2C6
SA00170
LOGIC DIAGRAM
D
LE
Q
D
LE
Q
DETAIL A
22
B0
21
B1
4
A1
20
B2
5
A2
19
B3
6
A3
18
B4
7
A4
17
B5
8
A5
16
B6
9
A6
15
B7
10
A7
DETAIL A X 7
13
OEAB
11
EAB
14
LEAB
2
OEBA
23
EBA
1
LEBA
3
A0
SA00171
Philips Semiconductors
Product specification
74ABT543A
Octal latched transceiver with dual enable
(3-State)
1998 Sep 24
4
FUNCTION TABLE
INPUTS
OUTPUTS
STATUS
OEXX
EXX
LEXX
An or Bn
Bn or An
H
X
X
X
Z
Disabled
X
H
X
X
Z
Disabled
L
L
L
L
h
l
Z
Z
Disabled + Latch
L
L
L
L
h
l
H
L
Latch + Display
L
L
L
L
L
L
H
L
H
L
Transparent
L
L
H
X
NC
Hold
H = High voltage level
h
= High voltage level one set-up time prior to the Low-to-High transition of LEXX or EXX (XX = AB or BA)
L
= Low voltage level
l
= Low voltage level one set-up time prior to the Low-to-High transition of LEXX or EXX (XX = AB or BA)
X = Don't care
= Low-to-High transition of LEXX or EXX (XX = AB or BA)
NC= No change
Z = High impedance or "off" state
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
0.5 to +7.0
V
I
IK
DC input diode current
V
I
< 0
18
mA
V
I
DC input voltage
3
1.2 to +7.0
V
I
OK
DC output diode current
V
O
< 0
50
mA
V
OUT
DC output voltage
3
output in Off or High state
0.5 to +5.5
V
I
OUT
DC output current
output in Low state
128
mA
T
stg
Storage temperature range
65 to 150
C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
Min
Max
V
CC
DC supply voltage
4.5
5.5
V
V
I
Input voltage
0
V
CC
V
V
IH
High-level input voltage
2.0
V
V
IL
Low-level input voltage
0.8
V
I
OH
High-level output current
32
mA
I
OL
Low-level output current
64
mA
t/
v
Input transition rise or fall rate
0
10
ns/V
T
amb
Operating free-air temperature range
40
+85
C
Philips Semiconductors
Product specification
74ABT543A
Octal latched transceiver with dual enable
(3-State)
1998 Sep 24
5
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25
C
T
amb
= 40
C
to +85
C
UNIT
Min
Typ
Max
Min
Max
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= 18mA
0.9
1.2
1.2
V
V
CC
= 4.5V; I
OH
= 3mA; V
I
= V
IL
or V
IH
2.5
3.2
2.5
V
V
OH
High-level output voltage
V
CC
= 5.0V; I
OH
= 3mA; V
I
= V
IL
or V
IH
3.0
3.7
3.0
V
V
CC
= 4.5V; I
OH
= 32mA; V
I
= V
IL
or V
IH
2.0
2.3
2.0
V
V
OL
Low-level output voltage
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
0.3
0.55
0.55
V
V
RST
Power-up output low
voltage
3
V
CC
= 5.5V; I
O
= 1mA; VI = GND or V
CC
0.13
.55
.55
V
I
I
Input leakage
Control pins
V
CC
= 5.5V; V
I
= GND or 5.5V
0.01
1.0
1.0
A
current
Data pins
V
CC
= 5.5V; V
I
= GND or 5.5V
5
100
100
A
I
OFF
Power-off leakage current
V
CC
= 0.0V; V
O
or V
I
4.5V
5.0
100
100
A
I
PU/PD
Power-up/down 3-State
output current
4
V
CC
= 2.1V; V
O
= 0.5V; V
I
= GND or V
CC
;
V
OE
= Don't care
5.0
50
50
A
I
IH
+ I
OZH
3-State output High current
V
CC
= 5.5V; V
O
= 2.7V; V
I
= V
IL
or V
IH
5.0
50
50
A
I
IL
+ I
OZL
3-State output Low current
V
CC
= 5.5V; V
O
= 0.5V; V
I
= V
IL
or V
IH
5.0
50
50
A
I
CEX
Output high leakage current
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
5.0
50
50
A
I
O
Output current
1
V
CC
= 5.5V; V
O
= 2.5V
40
65
180
40
180
mA
I
CCH
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
110
250
250
A
I
CCL
Quiescent supply current
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
20
30
30
mA
I
CCZ
V
CC
= 5.5V; Outputs 3-State;
V
I
= GND or V
CC
110
250
250
A
I
CC
Additional supply current per
input pin
2
V
CC
= 5.5V; one input at 3.4V,
other inputs at V
CC
or GND; V
CC
= 5.5V
0.3
1.5
1.5
mA
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any V
CC
between 0V and 2.1V, with a transition time of up to 10msec. From V
CC
= 2.1V to V
CC
= 5V
10%, a
transition time of up to 100
sec is permitted.