Philips
Semiconductors
74ALS74A
Dual D-type flip-flop with set and reset
Product specification
1996 Jul 01
INTEGRATED CIRCUITS
IC05 Data Handbook
Philips Semiconductors
Product specification
74ALS74A
Dual D-type flip-flop with set and reset
2
1996 Jul 01
8531278 01670
DESCRIPTION
The 74ALS74 is a dual positive edge-triggered D-type flip-flop
featuring individual data, clock, set, and reset inputs; also true and
complementary outputs. Set (SD) and reset (RD) are asynchronous
active-Low inputs and operate independently of the clock input.
When set and reset are inactive (High), data at the D input is
transferred to the Q and Q outputs on the Low-to-High transition of
the clock. Data must be stable just one setup time prior to the
Low-to-High transition of the clock for predictable operation. Clock
triggering occurs at a voltage level and is not directly related to the
transition time of the positive-going pulse. Following the hold time
interval, data at the D input may be changed without affecting the
levels of the output.
TYPE
TYPICAL f
MAX
TYPICAL
SUPPLY CURRENT
(TOTAL)
74ALS74A
150MHz
3.0mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
10%,
T
amb
= 0
C to +70
C
DRAWING
NUMBER
14-pin plastic DIP
74ALS74AN
SOT27-1
14-pin plastic SO
74ALS74AD
SOT108-1
14-pin plastic SSOP
Type II
74ALS74ADB
SOT337-1
PIN CONFIGURATION
14
13
12
11
10
9
8
7
6
5
4
3
2
1
GND
V
CC
SD1
Q1
Q1
CP1
RD1
D1
RD0
D0
Q0
CP0
SD0
Q0
SF00045
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74ALS (U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
D0, D1
Data inputs
1.0/2.0
20
A/0.2mA
CP0, CP1
Clock inputs (active rising edge)
1.0/2.0
20
A/0.2mA
SD0, SD1
Set inputs (active-Low)
2.0/4.0
40
A/0.4mA
RD0, RD1
Reset inputs (active-Low)
2.0/4.0
40
A/0.4mA
Q0, Q1, Q0, Q1
Data outputs
20/80
0.4mA/8mA
NOTE:
One (1.0) ALS unit load is defined as: 20
A in the High state and 0.1mA in the Low state.
LOGIC SYMBOL
Q0 Q0 Q1 Q1
5
6
9
8
V
CC
= Pin 14
GND = Pin 7
3
4
1
11
10
13
CP0
SD0
RD0
CP1
SD1
RD1
D0
D1
2
12
SF00046
IEC/IEEE SYMBOL
4
3
2
1
10
11
12
13
5
6
9
8
&
S
S
C1
C2
R
1D
2D
R
SF00047
Philips Semiconductors
Product specification
74ALS74A
Dual D-type flip-flop with set and reset
1996 Jul 01
3
LOGIC DIAGRAM
V
CC
= Pin 14
GND = Pin 7
5, 9
6, 8
Q
Q
4, 10
1, 13
3, 11
2, 12
SD
RD
CP
D
SF00048
FUNCTION TABLE
INPUTS
OUTPUTS
OPERATING
SD
RD
CP
D
Q
Q
MODE
L
H
X
X
H
L
Asynchronous set
H
L
X
X
L
H
Asynchronous reset
L
L
X
X
H
H
Undetermined*
H
H
h
H
L
Load "1"
H
H
l
L
H
Load "0"
H
H
X
NC
NC
Hold
H = High voltage level
h
= High state must be present one setup time prior to
Low-to-High clock transition
L
= Low voltage level
l
= Low state must be present one setup time prior to
Low-to-High clock transition
NC= No change from the previous setup
X = Don't care
= Low-to-High clock transition
= Not Low-to-High clock transition
*
= Both outputs will be High while both SD and RD are Low,
but the output states are unpredictable if SD and RD go
High simultaneously
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
RATING
UNIT
V
CC
Supply voltage
0.5 to +7.0
V
V
IN
Input voltage
0.5 to +7.0
V
I
IN
Input current
30 to +5
mA
V
OUT
Voltage applied to output in High output state
0.5 to V
CC
V
I
OUT
Current applied to output in Low output state
16
mA
T
amb
Operating free-air temperature range
0 to +70
C
T
stg
Storage temperature range
65 to +150
C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
MIN
NOM
MAX
UNIT
V
CC
Supply voltage
4.5
5.0
5.5
V
V
IH
High-level input voltage
2.0
V
V
IL
Low-level input voltage
0.8
V
I
Ik
Input clamp current
18
mA
I
OH
High-level output current
0.4
mA
I
OL
Low-level output current
8
mA
T
amb
Operating free-air temperature range
0
+70
C
Philips Semiconductors
Product specification
74ALS74A
Dual D-type flip-flop with set and reset
1996 Jul 01
4
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
LIMITS
UNIT
SYMBOL
PARAMETER
TEST CONDITIONS
1
MIN
TYP
2
MAX
UNIT
V
OH
High-level output voltage
V
CC
=
10%,
V
IL
= MAX, V
IH
= MIN
I
OH
= MAX
V
CC
2
V
V
O
Low level output voltage
V
CC
= MIN, V
IL
= MAX,
I
OL
= 4mA
0.25
0.40
V
V
OL
Low-level output voltage
CC
,
IL
,
V
IH
= MIN
I
OL
= 8mA
0.35
0.50
V
V
IK
Input clamp voltage
V
CC
= MIN, I
I
= I
IK
0.73
1.5
V
I
Input current at maximum input
Dn, CPn
V
CC
= MAX V = 7 0V
0.1
mA
I
I
voltage
SDn, RDn
V
CC
= MAX, V
I
= 7.0V
0.2
mA
I
High level input current
Dn, CPn
V
CC
= MAX V = 2 7V
20
A
I
IH
Highlevel input current
SDn, RDn
V
CC
= MAX, V
I
= 2.7V
40
A
I
Low level input current
Dn, CPn
V
CC
= MAX V = 0 4V
0.2
mA
I
IL
Lowlevel input current
SDn, RDn
V
CC
= MAX, V
I
= 0.4V
0.4
mA
I
O
Output current
3
V
CC
= MAX, V
O
= 2.25V
30
112
mA
I
CC
Supply current (total)
4
V
CC
= MAX
3.0
4.0
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25
C.
3. The output conditions have been chosen to produce a current that closely approximates one half of the true shortcircuit output current, I
OS
.
4. Measure I
CC
with the Dn, CPn, and SDn grounded, then with Dn, CPn, and RDn grounded.
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITION
T
amb
= 0
C to +70
C
V
CC
= +5.0V
10%
C
L
= 50pF, R
L
= 500
UNIT
MIN
MAX
f
max
Maximum clock frequency
Waveform 1
80
MHz
t
PLH
t
PHL
Propagation delay
CPn to Qn or Qn
Waveform 1
3.0
3.0
14.0
14.0
ns
t
PLH
t
PHL
Propagation delay
SDn or RD to Qn or Qn
Waveform 2, 3
1.0
3.0
8.0
10.0
ns
AC SETUP REQUIREMENTS
LIMITS
SYMBOL
PARAMETER
TEST CONDITION
T
amb
= 0
C to +70
C
V
CC
= +5.0V
10%
C
L
= 50pF, R
L
= 500
UNIT
MIN
MAX
t
su
(H)
t
su
(L)
Setup time, High or Low
Dn to CPn
Waveform 1
6.0
6.0
ns
t
h
(H)
t
h
(L)
Hold time, High or Low
Dn to CPn
Waveform 1
0.0
0.0
ns
t
w
(H)
t
w
(L)
CPn Pulse width
High or Low
Waveform 1
6.0
6.0
ns
t
w
(L)
SDn or RDn Pulse width, Low
Waveform 2, 3
6.0
ns
t
rec
Recovery time, SDn or RDn to CPn
Waveform 2, 3
6.0
ns
Philips Semiconductors
Product specification
74ALS74A
Dual D-type flip-flop with set and reset
1996 Jul 01
5
AC WAVEFORMS
For all waveforms, V
M
= 1.3V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
VM
VM
CPn
VM
VM
VM
VM
VM
VM
tsu(H)
th(H)
Dn
Qn
VM
tw(H)
1/fmax
tsu(L)
th(L)
VM
VM
tPLH
Qn
tw(L)
tPHL
tPHL
tPLH
SF00049
Waveform 1.
Propagation Delay for Data to Output,
Data Setup and Hold Times, Clock Width,
and Maximum Clock Frequency
VM
CPn
Qn
VM
VM
Qn
tPHL
tPLH
SDn
VM
VM
tw(L)
SC00040
Dn
tREC
Waveform 2.
Propagation Delay for Set to Output,
Set Pulse Width and Recovery Time for Set to Clock
VM
CPn
Qn
VM
VM
Qn
tPHL
tPLH
RDn
VM
VM
tw(L)
SC00041
Dn
tREC
Waveform 3.
Propagation Delay for Reset to Output,
Reset Pulse Width and Recovery Time for Reset to Clock
Philips Semiconductors
Product specification
74ALS74A
Dual D-type flip-flop with set and reset
1996 Jul 01
6
TEST CIRCUIT AND WAVEFORMS
tw
90%
VM
10%
90%
VM
10%
90%
VM
10%
90%
VM
10%
NEGATIVE
PULSE
POSITIVE
PULSE
tw
AMP (V)
0.3V
0.3V
tTHL (tf
f
)
INPUT PULSE REQUIREMENTS
Rep.Rate
t
w
t
TLH
t
THL
1MHz
500ns
2.0ns
2.0ns
Input Pulse Definition
VCC
Family
74ALS
D.U.T.
PULSE
GENERATOR
RL
CL
RT
VIN
VOUT
Test Circuit for Totem-pole Outputs
DEFINITIONS:
R
L
= Load resistor;
see AC electrical characteristics for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
tTHL (tf
)
tTLH (tr
)
tTLH (tr
)
AMP (V)
Amplitude
3.5V
1.3V
V
M
SC00005
Philips Semiconductors
Product specification
74ALS74A
Dual D-type flip-flop with set and reset
1991 Jul 01
7
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 940883409
Telephone 800-234-7381
DEFINITIONS
Data Sheet Identification
Product Status
Definition
Objective Specification
Preliminary Specification
Product Specification
Formative or in Design
Preproduction Product
Full Production
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Copyright Philips Electronics North America Corporation 1997
All rights reserved. Printed in U.S.A.
Philips
Semiconductors
Philips Semiconductors
Product specification
74ALS74A
Dual D-type flip-flop with set and reset
1996 Jul 01
8
DIP14:
plastic dual in-line package; 14 leads (300 mil)
SOT27-1
Philips Semiconductors
Product specification
74ALS74A
Dual D-type flip-flop with set and reset
1996 Jul 01
9
SO14:
plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
Philips Semiconductors
Product specification
74ALS74A
Dual D-type flip-flop with set and reset
1996 Jul 01
10
NOTES
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