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Электронный компонент: 74ALVT16260DGG

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Philips
Semiconductors
74ALVT16260
12-bit to 24-bit multiplexed D-type latches
(3-State)
Product specification
IC23 Data Handbook
1998 Jan 30
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74ALVT16260
2.5V/3.3V 12-bit to 24-bit multiplexed D-type latches
(3-State)
2
1998 Jan 30
853-2046-18918
FEATURES
ESD protection exceeds 2000V per Mil-Std-883C, Method 3015;
exceeds 200V using machine model
Latch-up protection exceeds 500mA per JEDEC Standard
JESD-17.
Distributed V
CC
and GND pin configuration minimizes high-speed
switching noise.
Output capability (32mA I
OH
, 64mA I
OL
).
Bus hold inputs eliminate the need for external pull-up resistors.
5V I/O compatible
Live insertion/extraction permitted
Power-up 3-State
Power-up Reset
DESCRIPTION
The 74ALVT16260 is a 12-bit to 24-bit multiplexed D-type latch used
in applications where two separate data paths must be multiplexed
onto, or demultiplexed from, a single data path. Typical applications
include multiplexing and/or demultiplexing of address and data
information in microprocessor or bus-interface applications. This
device is alto useful in memory-interleaving applications.
Three 12-bit I/O ports (A1A12, 1B11B12, and 2B12B12) are
available for address and/or data transfer. The output enable (OE1B,
OE2B, and OEA) inputs control the bus transceiver functions. The
OE1B and OE2B control signals also allow bank control in the A to
B direction.
Address and/or data information can be stored using the internal
storage latches. The latch enable (LE1B, LE2B, LEA1B, and
LEA2B) inputs are used to control data storage. When the latch
enable input is high, the latch is transparent. When the latch enable
input goes low, the data present at the inputs is latched and remains
latched until the latch enable input is returned high.
To ensure the high-impedance state during power-up or
power-down, OE should be tied to V
CC
through a pull-up resistor;
the minimum value of the resistor is determined by the current
sinking capability of the driver.
The 74ALVT16260 is available in a 56-pin Shrink Small Outline
Package (SSOP) and 56-pin Thin Shrink Small Outline Package
(TSSOP).
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
SYMBOL
PARAMETER
T
amb
= 25
C; GND = 0V
2.5V
3.3V
UNIT
t
PLH
Propagation delay
C = 50 pF
3.5
2.8
ns
t
PHL
nAx to nBx nBx to nAx
C
L
= 50 pF
3.3
2.6
ns
C
IN
Input capacitance
V
I
= 0 V or V
CC
4
4
pF
C
OUT
Output capacitance
V
I/O
= 0 V or 5.0 V
9
9
pF
I
CCZ
Total supply current
Outputs disabled
100
80
A
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
56-Pin Plastic SSOP Type III
40
C to +85
C
74ALVT16260 DL
AV16260 DL
SOT371-1
56-Pin Plastic TSSOP Type II
40
C to +85
C
74ALVT16260 DGG
AV16260 DGG
SOT364-1
Philips Semiconductors
Product specification
74ALVT16260
2.5V/3.3V 12-bit to 24-bit multiplexed D-type latches
(3-State)
1998 Jan 30
3
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
8, 9, 10, 12, 13, 14, 15, 16, 17, 19, 20, 21
An
Data inputs/outputs (A)
23, 24, 26, 31, 33, 34, 36, 37, 38, 40, 41, 42
1Bn
Data inputs/outputs (B1)
6, 5, 3, 54, 52, 51, 49, 48, 47, 45, 44, 43
2Bn
Data inputs/outputs (B2)
1, 29, 56
OEA, OE1B, OE2B
Output enable input (active low)
2, 27, 30, 55
LE1B, LE2B, LEA1B, LEA2B
Latch enable inputs
28
SEL
B1/B2 input select input
4, 11, 18, 25, 32, 39, 46, 53
GND
Ground (0V)
7, 22, 35, 50
V
CC
Positive supply voltage
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
45
46
47
48
49
50
51
52
53
54
55
56
OEA
2B3
GND
2B2
2B1
V
CC
A1
A2
A3
GND
OE2B
LEA2B
2B4
GND
2B5
2B6
V
CC
2B8
2B7
2B9
GND
2B10
A4
13
14
15
16
17
18
39
40
41
42
43
44
A5
A6
A7
A8
A9
2B11
1B12
2B12
1B11
1B10
GND
19
38
GND
A10
20
21
22
23
24
25
32
33
34
35
36
37
A11
A12
V
CC
1B1
1B2
1B9
V
CC
1B8
1B6
1B5
GND
GND
26
31 1B4
1B3
27
30 LEA1B
LE2B
28
29
SEL
OE1B
LE1B
1B7
SA00435
FUNCTION TABLES
B to A (OEB = H)
INPUTS
OUTPUT
1B
2B
SEL
LE1B
LE2B
OEA
A
H
X
H
H
X
L
H
L
X
H
H
X
L
L
X
X
H
L
X
L
A0
X
H
L
X
H
L
H
X
L
L
X
H
L
L
X
X
L
X
L
L
A0
X
X
X
X
X
H
Z
A to B (OEA = H)
INPUTS
OUTPUT
A
LEA1B
LEA2B
OE1B
OE2B
1B
2B
H
H
H
L
L
H
H
L
H
H
L
L
L
L
H
H
L
L
L
H
2B0
L
H
L
L
L
L
2B0
H
L
H
L
L
1B0
H
L
L
H
L
L
1B0
L
X
L
L
L
L
1B0
2B0
X
X
X
H
H
Z
Z
X
X
X
L
H
Active
Z
X
X
X
H
L
Z
Active
X
X
X
L
L
Active
Active
Philips Semiconductors
Product specification
74ALVT16260
2.5V/3.3V 12-bit to 24-bit multiplexed D-type latches
(3-State)
1998 Jan 30
4
LOGIC DIAGRAM (POSITIVE LOGIC)
G1
1
1
C1
1D
C1
1D
C1
1D
C1
1D
LE1B
LE2B
LEA1B
LEA2B
OE2B
OE1B
OEA
SEL
A1
2
27
30
55
56
29
1
28
8
2B1
1B1
23
6
TO 11 OTHER CHANNELS
SA00436
Philips Semiconductors
Product specification
74ALVT16260
2.5V/3.3V 12-bit to 24-bit multiplexed D-type latches
(3-State)
1998 Jan 30
5
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
0.5 to +4.6
V
I
IK
DC input diode current
V
I
< 0
50
mA
V
I
DC input voltage
3
0.5 to +7.0
V
I
OK
DC output diode current
V
O
< 0
50
mA
V
OUT
DC output voltage
3
Output in Off or High state
0.5 to +7.0
V
I
O
DC output current
Output in Low state
128
mA
I
OUT
DC output current
Output in High state
64
mA
T
stg
Storage temperature range
65 to +150
C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
2.5V RANGE LIMITS
3.3V RANGE LIMITS
UNIT
SYMBOL
PARAMETER
MIN
MAX
MIN
MAX
UNIT
V
CC
DC supply voltage
2.3
2.7
3.0
3.6
V
V
I
Input voltage
0
5.5
0
5.5
V
V
IH
High-level input voltage
1.7
2.0
V
V
IL
Input voltage
0.7
0.8
V
I
OH
High-level output current
8
32
mA
I
OL
Low-level output current
8
32
mA
I
OL
Low-level output current; current duty cycle
50%; f
1kHz
24
64
mA
t/
v
Input transition rise or fall rate; Outputs enabled
10
10
ns/V
T
amb
Operating free-air temperature range
40
+85
40
+85
C