Philips
Semiconductors
74ALVT16841
2.5V/3.3V ALVT 20-bit bus interface latch
(3-State)
Product specification
Supersedes data of 1996 Aug 28
IC23 Data Handbook
1998 Feb 13
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74ALVT16841
2.5V/3.3V 20-bit bus interface latch (3-State)
2
1998 Feb 13
853-1868 18961
FEATURES
High speed parallel latches
5V I/O Compatible
Live insertion/extraction permitted
Extra data width for wide address/data paths or buses carrying
parity
Power-up 3-State
Power-up reset
Ideal where high speed, light loading, or increased fan-in are
required with MOS microprocessors
Output capability: +64mA/32mA
Latch-up protection exceeds 500mA per Jedec Std 17
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The 74ALVT16841 Bus interface latch is designed to provide extra
data width for wider data/address paths of buses carrying parity. It is
designed for V
CC
operation at 2.5V or 3.3V with I/O compatibility to
5V.
The 74ALVT16841 consists of two sets of ten D-type latches with
3-State outputs. The flip-flops appear transparent to the data when
Latch Enable (nLE) is High. This allows asynchronous operation, as
the output transition follows the data in transition. On the nLE
High-to-Low transition, the data that meets the setup and hold time
is latched.
Data appears on the bus when the Output Enable (nOE) is Low.
When nOE is High the output is in the High-impedance state.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
SYMBOL
PARAMETER
T
amb
= 25
C
2.5V
3.3V
UNIT
t
PLH
t
PHL
Propagation delay
nDx to nQx
C
L
= 50pF
1.8
2.1
1.5
1.7
ns
C
IN
Input capacitance DIR, OE
V
I
= 0V or V
CC
3
3
pF
C
Out
Output pin capacitance
V
I/O
= 0V or V
CC
9
9
pF
I
CCZ
Total supply current
Outputs disabled
40
70
A
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
56-Pin Plastic SSOP Type III
40
C to +85
C
74ALVT16841 DL
AV16841 DL
SOT371-1
56-Pin Plastic TSSOP Type II
40
C to +85
C
74ALVT16841 DGG
AV16841 DGG
SOT364-1
Philips Semiconductors
Product specification
74ALVT16841
2.5V/3.3V 20-bit bus interface latch (3-State)
1998 Feb 13
3
LOGIC SYMBOL
1D0 1D1 1D2 1D3 1D4 1D5 1D6
1D7
1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6
1Q7
1D8
1D9
1Q8
1Q9
2D0 2D1 2D2 2D3 2D4 2D5 2D6
2D7
2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6
2Q7
2D8
2D9
2Q8
2Q9
55
54
52
51
49
48
47
45
44
43
56
1
29
28
2
3
5
6
8
9
10
12
13
14
42
41
40
38
37
36
34
33
31
30
15
16
17
19
20
21
23
24
26
27
SH00023
1LE
1OE
2LE
2OE
LOGIC SYMBOL (IEEE/IEC)
EN4
2
EN2
4
SA00077
1
56
28
29
55
54
52
51
49
48
47
45
44
43
42
41
40
38
37
36
34
33
31
30
2
3
5
6
8
9
10
12
13
14
15
16
17
19
20
21
23
24
26
27
1D
3D
C1
C3
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OE
1Q0
1Q1
GND
1Q2
1Q3
1Q4
1Q5
GND
1Q6
1Q7
1Q8
2Q2
1Q9
VCC
2Q3
VCC
2Q1
2Q4
2Q8
2OE
2Q7
1LE
1D0
1D1
GND
1D2
1D3
1D4
1D5
2D0
1D6
1D7
2D1
2D2
GND
2D4
VCC
2D5
VCC
2D3
2D6
GND
2D8
2LE
2D7
SA00076
2Q0
GND
2Q5
28
27
26
25
49
50
51
52
53
54
55
56
2D9
1D9
1D8
GND
2Q9
GND
2Q6
Philips Semiconductors
Product specification
74ALVT16841
2.5V/3.3V 20-bit bus interface latch (3-State)
1998 Feb 13
4
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
55, 54, 52, 51, 49,
48, 47, 45, 44, 43
42, 41, 40, 38, 37,
36, 34, 33, 31, 30
1D0 1D9
2D0 2D9
Data inputs
2, 3, 5, 6, 8, 9, 10,
12, 13, 14
15, 16, 17, 19, 20,
21, 23, 24, 26, 27
1Q0 1Q9
2Q0 2Q9
Data outputs
1, 28
1OE, 2OE
Output enable inputs
(active-Low)
56, 29
1LE, 2LE
Latch enable inputs
(active rising edge)
4, 11, 18, 25, 32,
39, 46, 53
GND
Ground (0V)
7, 22, 35, 50
V
CC
Positive supply
voltage
FUNCTION TABLE
INPUTS
OUTPUTS
OPERATING MODE
nOE
nLE
nDx
nQ0 nQ9
OPERATING MODE
L
L
H
H
L
H
L
H
Transparent
L
L
l
h
L
H
Latched
H
X
X
Z
High impedance
L
L
X
NC
Hold
H = High voltage level
h
= High voltage level one set-up time prior to the High-to-Low LE
transition
L
= Low voltage level
l
= Low voltage level one set-up time prior to the High-to-Low LE
transition
= High-to-Low LE transition
NC= No change
X = Don't care
Z = High impedance "off" state
LOGIC DIAGRAM
L
Q
D
nD0
nQ0
nLE
nOE
D
nD1
nQ1
D
nD2
nQ2
D
nD3
nQ3
D
nD4
nQ4
D
nD5
nQ5
D
nD6
nQ6
D
nD7
nQ7
D
nD8
nQ8
D
nD9
nQ9
SH00024
L
Q
L
Q
L
Q
L
Q
L
Q
L
Q
L
Q
L
Q
L
Q
Philips Semiconductors
Product specification
74ALVT16841
2.5V/3.3V 20-bit bus interface latch (3-State)
1998 Feb 13
5
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
0.5 to +4.6
V
I
IK
DC input diode current
V
I
< 0
50
mA
V
I
DC input voltage
3
1.2 to +7.0
V
I
OK
DC output diode current
V
O
< 0
50
mA
V
OUT
DC output voltage
3
Output in Off or High state
0.5 to +7.0
V
I
O
DC output current
Output in Low state
128
mA
I
OUT
DC output current
Output in High state
64
mA
T
stg
Storage temperature range
65 to 150
C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
2.5V RANGE LIMITS
3.3V RANGE LIMITS
UNIT
SYMBOL
PARAMETER
MIN
MAX
MIN
MAX
UNIT
V
CC
DC supply voltage
2.3
2.7
3.0
3.6
V
V
I
Input voltage
0
5.5
0
5.5
V
V
IH
High-level input voltage
1.7
2.0
V
V
IL
Input voltage
0.7
0.8
V
I
OH
High-level output current
8
32
mA
I
OL
Low-level output current
8
32
mA
I
OL
Low-level output current; current duty cycle
50%; f
1kHz
24
64
mA
t/
v
Input transition rise or fall rate; Outputs enabled
10
10
ns/V
T
amb
Operating free-air temperature range
40
+85
40
+85
C
Philips Semiconductors
Product specification
74ALVT16841
2.5V/3.3V 20-bit bus interface latch (3-State)
1998 Feb 13
6
DC ELECTRICAL CHARACTERISTICS (3.3V
"
0.3V RANGE)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40
C to +85
C
UNIT
MIN
TYP
1
MAX
V
IK
Input clamp voltage
V
CC
= 3.0V; I
IK
= 18mA
0.85
1.2
V
V
CC
= 3 0 to 3 6V; I
OH
= 100
A
V
CC
0 2
V
CC
V
OH
High-level output voltage
V
CC
= 3.0 to 3.6V; I
OH
= 100
A
V
CC
0.2
V
CC
V
V
OH
High-level out ut voltage
V
CC
= 3.0V; I
OH
= 32mA
2.0
2.3
V
V
CC
= 3.0V; I
OL
= 100
A
0.07
0.2
V
OL
Lowlevel output voltage
V
CC
= 3.0V; I
OL
= 16mA
0.25
0.4
V
V
OL
Lowlevel out ut voltage
V
CC
= 3.0V; I
OL
= 32mA
0.3
0.5
V
V
CC
= 3.0V; I
OL
= 64mA
0.4
0.55
V
RST
Power-up output low voltage
6
V
CC
= 3.6V; I
O
= 1mA; V
I
= V
CC
or GND
0.55
V
V
CC
= 3.6V; V
I
= V
CC
or GND
Control pins
0.1
1
I
I
Input leakage current
V
CC
= 0 or 3.6V; V
I
= 5.5V
0.1
10
A
I
I
In ut leakage current
V
CC
= 3.6V; V
I
= V
CC
Data pins
4
0.5
1
A
V
CC
= 3.6V; V
I
= 0V
Data ins
4
0.1
-5
I
OFF
Off current
V
CC
= 0V; V
I
or V
O
= 0 to 4.5V
0.1
100
A
Bus Hold current
V
CC
= 3V; V
I
= 0.8V
75
130
I
HOLD
Bus Hold current
Data inputs
7
V
CC
= 3V; V
I
= 2.0V
75
140
A
Data inputs
7
V
CC
= 0V to 3.6V; V
CC
= 3.6V
500
I
EX
Current into an output in the
High state when V
O
> V
CC
V
O
= 5.5V; V
CC
= 3.0V
10
125
A
I
PU/PD
Power up/down 3-State output
current
3
V
CC
1.2V; V
O
= 0.5V to V
CC
; V
I
= GND or V
CC
OE/OE = Don't care
1
100
A
I
OZH
3-State output High current
V
CC
= 3.6V; V
O
= 3.0V; V
I
= V
IL
or V
IH
0.5
5
A
I
OZL
3-State output Low current
V
CC
= 3.6V; V
O
= 0.5V; V
I
= V
IL
or V
IH
0.5
5
A
I
CCH
V
CC
= 3.6V; Outputs High, V
I
= GND or V
CC,
I
O =
0
0.07
0.1
I
CCL
Quiescent supply current
V
CC
= 3.6V; Outputs Low, V
I
= GND or V
CC,
I
O =
0
3.2
7
mA
I
CCZ
V
CC
= 3.6V; Outputs Disabled; V
I
= GND or V
CC,
I
O =
0
5
0.07
0.1
I
CC
Additional supply current per
input pin
2
V
CC
= 3V to 3.6V; One input at V
CC
0.6V,
Other inputs at V
CC
or GND
0.04
0.4
mA
NOTES:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25
C.
2. This is the increase in supply current for each input at the specified voltage level other than V
CC
or GND
3. This parameter is valid for any V
CC
between 0V and 1.2V with a transition time of up to 10msec. From V
CC
= 1.2V to V
CC
= 3.3V
0.3V a
transition time of 100
sec is permitted. This parameter is valid for T
amb
= 25
C only.
4. Unused pins at V
CC
or GND.
5. I
CCZ
is measured with outputs pulled up to V
CC
or pulled down to ground.
6. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
7. This is the bus hold overdrive current required to force the input to the opposite logic state.
Philips Semiconductors
Product specification
74ALVT16841
2.5V/3.3V 20-bit bus interface latch (3-State)
1998 Feb 13
7
AC CHARACTERISTICS (3.3V
"
0.3V RANGE)
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF; R
L
= 500
; T
amb
= 40
C to +85
C.
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= -40 to +85
o
C
V
CC
= +3.3V
0.3V
UNIT
MIN
TYP
MAX
t
PLH
t
PHL
Propagation delay
nDx to nQx
2
0.5
0.5
1.5
1.7
2.5
2.7
ns
t
PLH
t
PHL
Propagation delay
nLE to nQx
1
1.0
1.5
2.1
3.4
3.2
5.5
ns
t
PZH
t
PZL
Output enable time
to High and Low level
4
5
1.0
0.5
2.3
1.3
3.6
2.3
ns
t
PHZ
t
PLZ
Output disable time
from High and Low level
4
5
1.5
1.5
3.2
2.8
4.9
4.3
ns
NOTE:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25
C.
AC SETUP REQUIREMENTS (3.3V
"
0.3V RANGE)
GND = 0V, t
R
= t
F
= 2.5ns, C
L
= 50pF, R
L
= 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= -40 to +85
o
C
V
CC
= +3.3V
0.3V
UNIT
Min
Typ
t
s
(H)
t
s
(L)
Setup time, High or Low
nDx to nLE
3
1.0
1.0
0
0
ns
t
h
(H)
t
h
(L)
Hold time, High or Low
nDx to nLE
3
1.2
1.2
0.1
0.3
ns
t
w
(H)
nLE pulse width High
1
1.5
ns
Philips Semiconductors
Product specification
74ALVT16841
2.5V/3.3V 20-bit bus interface latch (3-State)
1998 Feb 13
8
DC ELECTRICAL CHARACTERISTICS (2.5V
"
0.2V RANGE)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40
C to +85
C
UNIT
MIN
TYP
1
MAX
V
IK
Input clamp voltage
V
CC
= 2.3V; I
IK
= 18mA
0.85
1.2
V
V
OH
High-level output voltage
V
CC
= 2.3 to 3.6V; I
OH
= 100
A
V
CC
0.2
V
CC
V
V
OH
High-level out ut voltage
V
CC
= 2.3V; I
OH
= 8mA
1.8
2.1
V
V
CC
= 2.3V; I
OL
= 100
A
0.07
0.2
V
OL
Low-level output voltage
V
CC
= 2.3V; I
OL
= 24mA
0.3
0.5
V
V
CC
= 2.3V; I
OL
= 8mA
0.4
V
RST
Power-up output low voltage
7
V
CC
= 2.7V; I
O
= 1mA; V
I
= V
CC
or GND
0.55
V
V
CC
= 2.7V; V
I
= V
CC
or GND
Control pins
0.1
1
I
I
Input leakage current
V
CC
= 0 or 2.7V; V
I
= 5.5V
0.1
10
A
I
I
In ut leakage current
V
CC
= 2.7V; V
I
= V
CC
Data pins
4
0.1
1
A
V
CC
= 2.7V; V
I
= 0
Data ins
4
0.1
-5
I
OFF
Off current
V
CC
= 0V; V
I
or V
O
= 0 to 4.5V
0.1
"
100
A
I
HOLD
Bus Hold current
V
CC
= 2.3V; V
I
= 0.7V
90
A
HOLD
Data inputs
6
V
CC
= 2.3V; V
I
= 1.7V
10
A
I
EX
Current into an output in the
High state when V
O
> V
CC
V
O
= 5.5V; V
CC
= 2.3V
10
125
A
I
PU/PD
Power up/down 3-State output
current
3
V
CC
1.2V; V
O
= 0.5V to V
CC
; V
I
= GND or V
CC
;
OE/OE = Don't care
1
"
100
A
I
OZH
3-State output High current
V
CC
= 2.7V; V
O
= 2.3V; V
I
= V
IL
or V
IH
0.5
5
A
I
OZL
3-State output Low current
V
CC
= 2.7V; V
O
= 0.5V; V
I
= V
IL
or V
IH
0.5
5
A
I
CCH
V
CC
= 2.7V; Outputs High, V
I
= GND or V
CC,
I
O =
0
0.04
0.1
I
CCL
Quiescent supply current
V
CC
= 2.7V; Outputs Low, V
I
= GND or V
CC,
I
O =
0
2.3
4.5
mA
I
CCZ
V
CC
= 2.7V; Outputs Disabled; V
I
= GND or V
CC,
I
O =
0
5
0.04
0.1
I
CC
Additional supply current per
input pin
2
V
CC
= 2.3V to 2.7V; One input at V
CC
0.6V,
Other inputs at V
CC
or GND
0.04
0.4
mA
NOTES:
1. All typical values are at V
CC
= 2.5V and T
amb
= 25
C.
2. This is the increase in supply current for each input at the specified voltage level other than V
CC
or GND
3. This parameter is valid for any V
CC
between 0V and 1.2V with a transition time of up to 10msec. From V
CC
= 1.2V to V
CC
= 2.5V
0.2V a
transition time of 100
sec is permitted. This parameter is valid for T
amb
= 25
C only.
4. Unused pins at V
CC
or GND.
5. I
CCZ
is measured with outputs pulled up to V
CC
or pulled down to ground.
6. Not guaranteed.
7. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
Philips Semiconductors
Product specification
74ALVT16841
2.5V/3.3V 20-bit bus interface latch (3-State)
1998 Feb 13
9
AC CHARACTERISTICS (2.5V
"
0.2V RANGE)
GND = 0V; t
R
= t
F
= 2.5ns; C
L
= 50pF; R
L
= 500
; T
amb
= 40
C to +85
C.
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= -40 to +85
o
C
V
CC
= +2.5V
0.2V
UNIT
MIN
TYP
MAX
t
PLH
t
PHL
Propagation delay
nDx to nQx
2
0.5
0.5
1.8
2.1
3.0
3.6
ns
t
PLH
t
PHL
Propagation delay
nLE to nQx
1
1.0
2.0
2.7
4.2
4.3
6.5
ns
t
PZH
t
PZL
Output enable time
to High and Low level
4
5
1.5
0.5
3.0
1.8
4.0
3.2
ns
t
PHZ
t
PLZ
Output disable time
from High and Low level
4
5
1.5
1.0
3.1
2.4
4.5
3.8
ns
NOTE:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25
C.
AC SETUP REQUIREMENTS (2.5V
"
0.2V RANGE)
GND = 0V, t
R
= t
F
= 2.5ns, C
L
= 50pF, R
L
= 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
T
amb
= -40 to +85
o
C
V
CC
= +2.5V
0.2V
UNIT
Min
Typ
t
s
(H)
t
s
(L)
Setup time, High or Low
nDx to nLE
3
0.5
1.5
0
0.2
ns
t
h
(H)
t
h
(L)
Hold time, High or Low
nDx to nLE
3
1.8
2.0
0
0.8
ns
t
w
(H)
nLE pulse width High
1
1.5
ns
Philips Semiconductors
Product specification
74ALVT16841
2.5V/3.3V 20-bit bus interface latch (3-State)
1998 Feb 13
10
AC WAVEFORMS
V
M
= 1.5V at V
CC
w
3.0V; V
M
= V
CC
/2 at V
CC
v
2.7V
V
X
= V
OL
+ 0.3V at V
CC
w
3.0V; V
X
= V
OL
+ 0.15V at V
CC
v
2.7V
V
Y
= V
OH
0.3V at V
CC
w
3.0V; V
Y
= V
OH
0.15V at V
CC
v
2.7V
t
w
(H)
t
PHL
t
PLH
nLE
nQx
SA00078
V
M
V
M
V
M
V
M
V
M
3.0V or V
CC
whichever
is less
0V
V
OH
V
OL
Waveform 1. Propagation Delay, Latch Enable Input to
Output, and Enable Pulse Width
nDx INPUT
V
M
t
PLH
t
PHL
nQx OUTPUT
V
M
V
M
V
M
SA00079
3.0V or V
CC
whichever
is less
0V
3.0V or V
CC
whichever
is less
0V
Waveform 2. Propagation Delay for Data to Outputs
NOTE: The shaded areas indicate when the input is
permitted to change for predictable output performance.
VM
nDx
VM
VM
VM
VM
nLE
ts(H)
th(H)
ts(L)
th(L)
SA00080
VM
0V
0V
3.0V or V
CC
whichever
is less
3.0V or V
CC
whichever
is less
Waveform 3. Data Setup and Hold Times
VY
VM
VM
VM
nQx
tPZH
tPHZ
SH00007
nOE
0V
VOH
0V
3.0V or V
CC
whichever
is less
Waveform 4. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
V
X
VM
VM
VM
nQx
tPZL
tPLZ
SH00008
nOE
VOL
0V
0V
3.0V or V
CC
3.0V or V
CC
whichever
is less
Waveform 5. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
Philips Semiconductors
Product specification
74ALVT16841
2.5V/3.3V 20-bit bus interface latch (3-State)
1998 Feb 13
11
TEST CIRCUIT AND WAVEFORM
PULSE
GENERATOR
VIN
VOUT
CL
VCC
RL
Test Circuit for 3-State Outputs
VM
VM
tW
NEGATIVE
PULSE
10%
10%
90%
90%
0V
VM
VM
tW
POSITIVE
PULSE
90%
90%
10%
10%
0V
tTHL (tF)
tTLH (tR)
tTHL (tF)
tTLH (tR)
DEFINITIONS
R
L
=
Load resistor; see AC CHARACTERISTICS for value.
C
L
=
Load capacitance includes jig and probe capacitance:
See AC CHARACTERISTICS for value.
R
T
=
Termination resistance should be equal to Z
OUT
of
pulse generators.
INPUT PULSE REQUIREMENTS
FAMILY
74ALVT16
SWITCH POSITION
TEST
SWITCH
t
PLZ/
t
PZL
6V or V
CC x 2
t
PLH/
t
PHL
Open
t
PHZ
/t
PZH
GND
6.0V or V
CC
x 2
R
T
RL
Open
GND
SW00025
D.U.T.
Amplitude
Rep. Rate
t
W
t
R
t
F
3.0V or V
CC
whichever
is less
v
10MHz
500ns
v
2.5ns
v
2.5ns
VIN
VIN
Philips Semiconductors
Product specification
74ALVT16841
2.5V/3.3V ALVT 20-bit bus interface latch (3-State)
1998 Feb 13
12
SSOP56:
plastic shrink small outline package; 56 leads; body width 7.5 mm
SOT371-1
Philips Semiconductors
Product specification
74ALVT16841
2.5V/3.3V ALVT 20-bit bus interface latch (3-State)
1998 Feb 13
13
TSSOP56:
plastic thin shrink small outline package; 56 leads; body width 6.1mm
SOT364-1
Philips Semiconductors
Product specification
74ALVT16841
2.5V/3.3V ALVT 20-bit bus interface latch (3-State)
yyyy mmm dd
14
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 940883409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code
Date of release: 05-96
Document order number:
9397-750-03578
Philips
Semiconductors
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
[1]
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
Data sheet status
[1]
Please consult the most recently issued datasheet before initiating or completing a design.
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