DATA SHEET
Product Specification
File under Integrated Circuits, IC24
2000 Mar 07
INTEGRATED CIRCUITS
74AVCH16244
16-bit buffer/line driver;
3.6 V tolerant; 3-state
2000 Mar 07
2
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant;
3-state
74AVCH16244
FEATURES
Wide supply voltage range from 1.2 to 3.6 V
Complies with JEDEC standard no. 8-1A/5/7
CMOS low power consumption
Input/output tolerant up to 3.6 V
Dynamic Controlled Output (DCO) circuit dynamically
changes the output impedance, resulting in noise
reduction without speed degradation
Low inductance multiple V
CC
and GND pins to minimize
noise and ground bounce
Supports Live Insertion
All data inputs have bus-hold.
DESCRIPTION
The 74AVCH16244 is a 16-bit non-inverting buffer/line
driver with 3-state outputs. The device can be used as four
4-bit buffers, two 8-bit buffers or one 16-bit buffer.
The 3-state outputs are controlled by the output enable
inputs nOE. A HIGH on nOE causes the outputs to assume
a high impedance OFF-state.
The 74AVCH16244 is designed to have an extremely fast
propagation delay and a minimum amount of power
consumption.
To ensure the high-impedance output state during
power-up or power-down, nOE should be tied to V
CC
through a pull-up resistor (Live Insertion).
A Dynamic Controlled Output (DCO) circuitry is
implemented to support termination line drive during
transient (see Figs 1 and 2).
The 74AVCH16244 has active bus-hold circuitry to hold
unused or floating data inputs at a valid logic level. This
feature eliminates the need for external pull-up or
pull-down resistors.
handbook, halfpage
0
1
2
4
0
-
200
-
300
-
100
MNA506
3
VOH (V)
IOH
(mA)
1.8 V
2.5 V
3.3 V
Fig.1
Output voltage as a function of the
HIGH-level output current.
Fig.2
Output voltage as a function of the
LOW-level output current.
handbook, halfpage
0
1
2
4
300
100
0
200
MNA507
3
VOL (V)
IOL
(mA)
1.8 V
2.5 V
3.3 V
2000 Mar 07
3
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant;
3-state
74AVCH16244
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
2.0 ns.
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W).
P
D
= C
PD
V
CC
2
f
i
+
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
(C
L
V
CC
2
f
o
) = sum of outputs.
2. The condition is V
I
= GND to V
CC
.
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don't care;
Z = high impedance OFF-state.
SYMBOL
PARAMETER
CONDITIONS
TYP.
UNIT
t
PHL
/t
PLH
propagation delay nA
n
to nY
n
V
CC
= 1.2 V
5.2
ns
V
CC
= 1.5 V
2.9
ns
V
CC
= 1.8 V
2.1
ns
V
CC
= 2.5 V
1.5
ns
V
CC
= 3.3 V
1.3
ns
C
I
input capacitance
5.0
pF
C
PD
power dissipation capacitance per buffer
notes 1 and 2
outputs enabled
34
pF
outputs disabled
1
pF
INPUTS
OUTPUTS
nOE
nA
n
nY
n
L
L
L
L
H
H
H
X
Z
2000 Mar 07
4
Philips Semiconductors
Product Specification
16-bit buffer/line driver; 3.6 V tolerant;
3-state
74AVCH16244
ORDERING AND PACKAGE INFORMATION
PINNING
TYPE NUMBER
PACKAGE
TEMPERATURE RANGE
PINS
PACKAGE
MATERIAL
CODE
74AVCH16244DGG
-
40 to +85
C
48
TSSOP
plastic
SOT362-1
PIN
SYMBOL
DESCRIPTION
1
1OE
output enable input (active LOW)
2, 3, 5 and 6
1Y
0
to 1Y
3
data outputs
4, 10, 15, 21, 28, 34, 39 and 45
GND
ground (0 V)
7, 18, 31 and 42
V
CC
positive supply voltage
8, 9, 11 and 12
2Y
0
to 2Y
3
data outputs
13, 14, 16 and 17
3Y
0
to 3Y
3
data outputs
19, 20, 22 and 23
4Y
0
to 4Y
3
data outputs
24
4OE
output enable input (active LOW)
25
3OE
output enable input (active LOW)
26, 27, 29 and 30
4A
3
to 4A
0
data inputs
32, 33, 35 and 36
3A
3
to 3A
0
data inputs
37, 38, 40 and 41
2A
3
to 2A
0
data inputs
43, 44, 46 and 47
1A
3
to 1A
0
data inputs
48
2OE
output enable input (active LOW)
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