2003 Jul 10
2
Philips Semiconductors
Product specification
Dual D-type flip-flop with set and reset;
positive-edge trigger
74HC74; 74HCT74
FEATURES
Wide supply voltage range from 2.0 to 6.0 V
Symmetrical output impedance
High noise immunity
Low power dissipation
Balanced propagation delays
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
GENERAL DESCRIPTION
The 74HC/HCT74 is a high-speed Si-gate CMOS device
and is pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT74 are dual positive-edge triggered, D-type
flip-flops with individual data (D) inputs, clock (CP) inputs,
set (SD) and reset (RD) inputs; also complementary
Q and Q outputs.
The set and reset are asynchronous active LOW inputs
and operate independently of the clock input. Information
on the data input is transferred to the Q output on the
LOW-to-HIGH transition of the clock pulse. The D inputs
must be stable one set-up time prior to the LOW-to-HIGH
clock transition for predictable operation.
Schmitt-trigger action in the clock input makes the circuit
highly tolerant to slower clock rise and fall times.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
= 6 ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W).
P
D
= C
PD
V
CC
2
f
i
N +
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = total load switching outputs;
(C
L
V
CC
2
f
o
) = sum of the outputs.
2. For 74HC74 the condition is V
I
= GND to V
CC
.
For 74HCT74 the condition is V
I
= GND to V
CC
-
1.5 V.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t
PHL
/t
PLH
propagation delay
C
L
= 15 pF; V
CC
= 5 V
nCP to nQ, nQ
14
15
ns
nSD to nQ, nQ
15
18
ns
nRD to nQ, nQ
16
18
ns
f
max
maximum clock frequency
76
59
MHz
C
I
input capacitance
3.5
3.5
pF
C
PD
power dissipation capacitance per flip-flop
notes 1 and 2
24
29
pF
2003 Jul 10
3
Philips Semiconductors
Product specification
Dual D-type flip-flop with set and reset;
positive-edge trigger
74HC74; 74HCT74
FUNCTION TABLES
Table 1
See note 1
Table 2
See note 1
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don't care;
= LOW-to-HIGH CP transition;
Qn+1 = state after the next LOW-to-HIGH CP transition.
ORDERING INFORMATION
INPUT
OUTPUT
SD
RD
CP
D
Q
Q
L
H
X
X
H
L
H
L
X
X
L
H
L
L
X
X
H
H
INPUT
OUTPUT
SD
RD
CP
D
Qn+1
Qn+1
H
H
L
L
H
H
H
H
H
L
TYPE NUMBER
PACKAGE
TEMPERATURE
RANGE
PINS
PACKAGE
MATERIAL
CODE
74HC74N
-
40 to +125
C
14
DIP14
plastic
SOT27-1
74HCT74N
-
40 to +125
C
14
DIP14
plastic
SOT27-1
74HC74D
-
40 to +125
C
14
SO14
plastic
SOT108-1
74HCT74D
-
40 to +125
C
14
SO14
plastic
SOT108-1
74HC74DB
-
40 to +125
C
14
SSOP14
plastic
SOT337-1
74HCT74DB
-
40 to +125
C
14
SSOP14
plastic
SOT337-1
74HC74PW
-
40 to +125
C
14
TSSOP14
plastic
SOT402-1
74HCT74PW
-
40 to +125
C
14
TSSOP14
plastic
SOT402-1
74HC74BQ
-
40 to +125
C
14
DHVQFN14
plastic
SOT762-1
74HCT74BQ
-
40 to +125
C
14
DHVQFN14
plastic
SOT762-1
2003 Jul 10
4
Philips Semiconductors
Product specification
Dual D-type flip-flop with set and reset;
positive-edge trigger
74HC74; 74HCT74
PINNING
PIN
SYMBOL
DESCRIPTION
1
1RD
asynchronous reset-direct input (active LOW)
2
1D
data input
3
1CP
clock input (LOW-to-HIGH, edge-triggered)
4
1SD
asynchronous set-direct input (active LOW)
5
1Q
true flip-flop output
6
1Q
complement flip-flop output
7
GND
ground (0 V)
8
2Q
complement flip-flop output
9
2Q
true flip-flop output
10
2SD
asynchronous set-direct input (active LOW)
11
2CP
clock input (LOW-to-HIGH, edge-triggered)
12
2D
data input
13
2RD
asynchronous reset-direct input (active LOW)
14
V
CC
positive supply voltage
handbook, halfpage
MNA417
74
1
2
3
4
5
6
7
8
14
13
12
11
10
9
1RD
1D
1CP
1SD
1Q
1Q
GND
2Q
2Q
2SD
2CP
2D
2RD
VCC
Fig.1
Pin configuration DIP14, SO14 and
(T)SSOP14.
handbook, halfpage
1
14
GND
(1)
1RD
VCC
7
2
3
4
5
6
1D
1CP
1SD
1Q
1Q
13
12
11
10
9
2RD
2D
2CP
2SD
2Q
8
GND
Top view
2Q
MNB038
Fig.2 Pin configuration DHVQFN14.
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
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