Document Outline
- FEATURES
- GENERAL DESCRIPTION
- QUICK REFERENCE DATA
- ORDERING INFORMATION
- PIN DESCRIPTION
- FUNCTION TABLE
- APPLICATIONS
- RATINGS
- RECOMMENDED OPERATING CONDITIONS
- DC CHARACTERISTICS FOR 74HC/HCT
- DC CHARACTERISTICS FOR 74HC
- AC CHARACTERISTICS FOR 74HC
- DC CHARACTERISTICS FOR 74HCT
- AC CHARACTERISTICS FOR 74HCT
- ADDITIONAL AC CHARACTERISTICS FOR 74HC/HCT
- Recommended conditions and typical values
- AC WAVEFORMS
- TEST CIRCUIT AND WAVEFORMS
- PACKAGE OUTLINES
DATA SHEET
Product specification
File under Integrated Circuits, IC06
December 1990
INTEGRATED CIRCUITS
74HC/HCT4353
Triple 2-channel analog
multiplexer/demultiplexer with latch
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
December 1990
2
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
FEATURES
Wide analog input voltage range:
5 V
Low "ON" resistance:
80
(typ.) at V
CC
-
V
EE
= 4.5 V
70
(typ.) at V
CC
-
V
EE
= 6.0 V
60
(typ.) at V
CC
-
V
EE
= 9.0 V
Logic level translation:
to enable 5 V logic to communicate with
5 V analog
signals
Typical "break before make" built in
Address latches provided
Output capability: non-standard
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT4353 are high-speed Si-gate CMOS
devices. They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT4353 are triple 2-channel analog
multiplexers/demultiplexers with two common enable
inputs (E
1
and E
2
) and a latch enable input (LE). Each
multiplexer has two independent inputs/outputs (nY
0
and
nY
1
), a common input/output (nZ) and select inputs (S
1
to
S
3
).
Each multiplexer/demultiplexer contains two bidirectional
analog switches, each with one side connected to an
independent input/output (nY
0
and nY
1
) and the other side
connected to a common input/output (nZ).
With E
1
LOW and E
2
HIGH, one of the two switches is
selected (low impedance ON-state) by S
1
to S
3
.
The data at the select inputs may be latched by using the
active LOW latch enable input (LE). When LE is HIGH, the
latch is transparent. When either of the two enable inputs,
E
1
(active LOW) and E
2
(active HIGH), is inactive, all
analog switches are turned off.
V
CC
and GND are the supply voltage pins for the digital
control inputs (S
1
to S
3
, LE, E
1
and E
2
). The V
CC
to GND
ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT.
The analog inputs/outputs (nY
0
and nY
1
, and nZ) can
swing between V
CC
as a positive limit and V
EE
as a
negative limit. V
CC
-
V
EE
may not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, V
EE
is
connected to GND (typically ground).
QUICK REFERENCE DATA
V
EE
= GND = 0 V; T
amb
= 25
C; t
r
= t
f
= 6 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t
PZH
/ t
PZL
turn "ON" time E
1
, E
2
or S
n
to V
os
C
L
= 50 pF; R
L
= 1 k
;
V
CC
= 5 V
29
21
ns
t
PHZ
/ t
PLZ
turn "OFF" time E
1
, E
2
or S
n
to V
os
20
22
ns
C
I
input capacitance
3.5
3.5
pF
C
PD
power dissipation capacitance per switch
notes 1 and 2
23
23
pF
C
S
max. switch capacitance
independent (Y)
5
5
pF
common (Z)
8
8
pF
Notes
1. C
PD
is used to determine the dynamic power
dissipation (P
D
in
W):
P
D
=
C
PD
V
CC
2
f
i
+
{(C
L
+ C
S
)
V
CC
2
f
o
} where:
f
i
= input frequency in MHz
C
L
= output load capacitance in pF
f
o
= output frequency in MHz
C
S
= max. switch capacitance in pF
{(C
L
C
S
)
V
CC
2
f
o
} = sum of outputs
V
CC
= supply voltage in V
2. For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
-
1.5 V
ORDERING INFORMATION
See
"74HC/HCT/HCU/HCMOS Logic Package
Information"
.
December 1990
3
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
2, 1
2Y
0
, 2Y
1
independent inputs/outputs
5
3Z
common input/output
6, 4
3Y
0
, 3Y
1
independent inputs/outputs
3, 14
n.c.
not connected
7
E
1
enable input (active LOW)
8
E
2
enable input (active HIGH)
9
V
EE
negative supply voltage
10
GND
ground (0 V)
11
LE
latch enable input (active LOW)
15, 13, 12
S
1
to S
3
select inputs
16, 17
1Y
0
, 1Y
1
independent inputs/outputs
18
1Z
common input/output
19
2Z
common input/output
20
V
CC
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
4
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
FUNCTION TABLE
Notes
1. Last selected channel "ON".
2. Selected channels latched.
H = HIGH voltage level
L = LOW voltage level
X = don't care
= HIGH-to-LOW LE transition
APPLICATIONS
Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating
INPUTS
CHANNEL
ON
E
1
E
2
LE
S
n
H
X
H
L
X
X
X
X
none
none
L
L
H
H
H
H
L
H
nY0
-
nZ
nY
1
-
nZ
L
X
H
X
L
X
X
(1)
(2)
Fig.4 Functional diagram.
Fig.5 Schematic diagram (one switch).
December 1990
5
Philips Semiconductors
Product specification
Triple 2-channel analog
multiplexer/demultiplexer with latch
74HC/HCT4353
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
Voltages are referenced to V
EE
= GND (ground = 0 V)
Note to ratings
1. To avoid drawing V
CC
current out of terminals nZ, when switch current flows in terminals nY
n
, the voltage drop across
the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminals nZ, no V
CC
current will flow
out of terminals nY
n
. In this case there is no limit for the voltage drop across the switch, but the voltages at nY
n
and
nZ may not exceed V
CC
or V
EE
.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
CONDITIONS
V
CC
DC supply voltage
-
0.5
+11.0
V
I
IK
DC digital input diode current
20
mA
for V
I
< -
0.5 V or V
I
>
V
CC
+ 0.5 V
I
SK
DC switch diode current
20
mA
for V
S
< -
0.5 V or V
S
>
V
CC
+ 0.5 V
I
S
DC switch current
25
mA
for
-
0.5 V
<
V
S
<
V
CC
+ 0.5 V
I
EE
DC V
EE
current
20
mA
I
CC
;
I
GND
DC V
CC
or GND current
50
mA
T
stg
storage temperature range
-
65
+150
C
P
tot
power dissipation per package
for temperature range:
-
40 to +125
C
74HC/HCT
plastic DIL
750
mW
above +70
C: derate linearly with 12 mW/K
plastic mini-pack (SO)
500
mW
above +70
C: derate linearly with 8 mW/K
P
S
power dissipation per switch
100
mW
SYMBOL PARAMETER
74HC
74HCT
UNIT
CONDITIONS
min.
typ.
max.
min.
typ.
max.
V
CC
DC supply voltage V
CC
-
GND
2.0
5.0
10.0
4.5
5.0
5.5
V
see Figs 6 and 7
V
CC
DC supply voltage V
CC
-
V
EE
2.0
5.0
10.0
2.0
5.0
10.0
V
see Figs 6 and 7
V
I
DC input voltage range
GND
V
CC
GND
V
CC
V
V
S
DC switch voltage range
V
EE
V
CC
V
EE
V
CC
V
T
amb
operating ambient temperature range
-
40
+85
-
40
+85
C
see DC and AC
CHARACTER-
ISTICS
T
amb
operating ambient temperature range
-
40
+125
-
40
+125
C
t
r
, t
f
input rise and fall times
6.0
1000
500
400
250
6.0
500
ns
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
CC
= 10.0 V
PDF 
ZIP