Philips Semiconductors
Product specification
74LV153
Dual 4-input multiplexer
2
1998 Apr 28
8531921 19309
FEATURES
Optimized for low voltage applications: 1.0 to 3.6 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Typical V
OLP
(output ground bounce) < 0.8 V at V
CC
= 3.3 V,
T
amb
= 25
C
Typical V
OHV
(output V
OH
undershoot) > 2 V at V
CC
= 3.3 V,
T
amb
= 25
C
Non-inverting outputs
Separate enable for each output
Common select inputs
Permits multiplexing from n lines to 1 line
Enable line provided for cascading (n lines to 1 line)
Output capability: standard
I
CC
category: MSI
DESCRIPTION
The 74LV153 is a low-voltage CMOS device that is pin and function
compatible with 74HC/HCT153.
The 74LV153 is a dual 4-input multiplexer which selects 2 bits of
data from up to four sources selected by common data select inputs
(S
0
, S
1
). The two 4-input multiplexer circuits have individual active
LOW output enable inputs (1E, 2E) which can be used to strobe the
outputs independently. The outputs (1Y, 2Y) are forced LOW when
the corresponding output enable inputs are HIGH. The 74LV153 is
the logic implementation of a 2-pole, 4-position switch, where the
position of the switch, is determined by the logic levels applied to S
0
and S
1
. The logic equations for the outputs are:
1Y=1E.(1l
0
.S
1
.S
0
+1l
1
.S
1
.S
0
+1l
2.
S
1.
S
0
+1l
3
.S
1
.S
0
)
2Y=2E.(2l
0
.S
1
.S
0
+2l
1
.S
1
.S
0
+2l
2
.S
1
.S
0
+2l
3
.S
1
.S
0
)
The 74LV153 can be used to move data to a common output bus
from a group of registers. The state of the select inputs would
determine the particular register from which the data came. An
alternative application is a function generator. The device can
generate two functions or three variables. This is useful for
implementing highly irregular random logic.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
1l
n
, 2l
n
to nY
Sn to nY
nE to nY
C
L
= 15 pF;
V
CC
= 3.3 V
14
14
10
ns
C
I
Input capacitance
3.5
pF
C
PD
Power dissipation capacitance per gate
V
I
= GND to V
CC
1
30
pF
NOTE:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W)
P
D
= C
PD
V
CC
2
f
i
)
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
(C
L
V
CC
2
f
o
) = sum of the outputs.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
16-Pin Plastic DIL
40
C to +125
C
74LV153 N
74LV153 N
SOT38-4
16-Pin Plastic SO
40
C to +125
C
74LV153 D
74LV153 D
SOT109-1
16-Pin Plastic SSOP Type II
40
C to +125
C
74LV153 DB
74LV153 DB
SOT338-1
16-Pin Plastic TSSOP Type I
40
C to +125
C
74LV153 PW
74LV153PW DH
SOT403-1
Philips Semiconductors
Product specification
74LV153
Dual 4-input multiplexer
1998 Apr 28
3
PIN CONFIGURATION
SV00538
1
2
3
4
5
6
1E
S
1
1I
3
1I
2
1I
1
1I
0
V
CC
2E
S
0
2I
3
2I
2
2I
1
16
15
14
13
12
11
7
8
1Y
GND
2I
0
2Y
10
9
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1, 15
1E, 2E
Output enable inputs (active LOW)
14, 2
S
0
, S
1
Common data select inputs
6, 5, 4, 3
1l
0
to 1l
3
Data inputs from source 1
7
1Y
Multiplexer output from source 1
8
GND
Ground (0 V)
9
2Y
Multiplexer output from source 2
10, 11, 12, 13
2l
0
to 2l
3
Data inputs from source 2
16
V
CC
Positive supply voltage
LOGIC SYMBOL
SV00537
6
5
4
3
2
1
10
11
12
13
14
15
7
9
1Y
2Y
2E
1E
S
1
S
0
1l
0
1l
1
1l
2
13
0
2l
0
2l
1
2l
2
2l
3
LOGIC SYMBOL (IEEE/IEC)
SV00539
G
0
3
1
0
2
14
7
9
4
4
12
5
6
1
MUX
0
1
2
3
3
13
15
10
11
EN4
FUNCTIONAL DIAGRAM
SV00540
1I 0
1Y
2Y
9
7
1
15
1I 1
1I 2
1I 3
S 0
S 1
2I 0
2I 1
2I 2
2I 3
2E
1E
6
5
4
3
14
2
10
11
12
13
MUX
MUX
Philips Semiconductors
Product specification
74LV153
Dual 4-input multiplexer
1998 Apr 28
5
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
V
CC
DC supply voltage
See Note 1
1.0
3.3
3.6
V
V
I
Input voltage
0
V
CC
V
V
O
Output voltage
0
V
CC
V
T
amb
Operating ambient temperature range in free air
See DC and AC
characteristics
40
40
+85
+125
C
t
r
, t
f
Input rise and fall times
V
CC
= 1.0V to 2.0V
V
CC
= 2.0V to 2.7V
V
CC
= 2.7V to 3.6V
500
200
100
ns/V
NOTE:
1. The LV is guaranteed to function down to V
CC
= 1.0V (input levels GND or V
CC
); DC characteristics are guaranteed from V
CC
= 1.2V to V
CC
= 3.6V.
ABSOLUTE MAXIMUM RATINGS
1, 2
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
0.5 to +4.6
V
"
I
IK
DC input diode current
V
I
< 0.5 or V
I
> V
CC
+ 0.5V
20
mA
"
I
OK
DC output diode current
V
O
< 0.5 or V
O
> V
CC
+ 0.5V
50
mA
"
I
O
DC output source or sink current
standard outputs
0.5V < V
O
< V
CC
+ 0.5V
25
mA
"
I
GND
,
"
I
CC
DC V
CC
or GND current for types with
standard outputs
50
mA
T
stg
Storage temperature range
65 to +150
C
P
TOT
Power dissipation per package
plastic DIL
plastic mini-pack (SO)
plastic shrink mini-pack (SSOP and TSSOP)
for temperature range: 40 to +125
C
above +70
C derate linearly with 12 mW/K
above +70
C derate linearly with 8 mW/K
above +60
C derate linearly with 5.5 mW/K
750
500
400
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
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