Philips
Semiconductors
74LV164
8-bit serial-in/parallel-out shift register
Product specification
Supersedes data of 1997 Mar 28
IC24 Data Handbook
1998 May 07
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74LV164
8-bit serial-in/parallel-out shift register
2
1998 May 07
8531961 19349
FEATURES
Wide operating voltage: 1.0 to 5.5V
Optimized for Low Voltage applications: 1.0 to 3.6V
Accepts TTL input levels between V
CC
= 2.7V and V
CC
= 3.6V
Typical V
OLP
(output ground bounce)
t
0.8V @ V
CC
= 3.3V,
T
amb
= 25
C
Typical V
OHV
(output V
OH
undershoot)
u
2V @ V
CC
= 3.3V,
T
amb
= 25
C
Gated serial data inputs
Asynchronous master reset
Output capability: standard
I
CC
category: MSI
DESCRIPTION
The 74LV164 is a low-voltage Si-gate CMOS device and is pin and
function compatible with the 74HC/HCT164.
The 74LV164 is an 8-bit edge-triggered shift register with serial data
entry and an output from each of the eight stages. Data is entered
serially through one of two inputs (D
sa
or D
sb
); either input can be
used as an active HIGH enable for data entry through the other
input. Both inputs must be connected together or an unused input
must be tied HIGH.
Data shifts one place to the right on each LOW-to-HIGH transition of
the clock (CP) input and enters into Q
0
, which is the logical AND of
the two data inputs (D
sa
, D
sb
) that existed one set-up time prior to
the rising clock edge.
A LOW on the master reset (MR) input overrides all other inputs and
clears the register asynchronously, forcing all outputs LOW.
QUICK REFERENCE DATA
GND = 0V; T
amb
= 25
C; t
r
=t
f
v
2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
CP to Q
n
MR to Q
n
C
L
= 15pF
V
CC
= 3.3V
12
12
ns
f
max
Maximum clock frequency
78
MHz
C
I
Input capacitance
3.5
pF
C
PD
Power dissipation capacitance per gate
V
CC
= 3.3V
Notes 1 and 2
40
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W)
P
D
= C
PD
V
CC
2
x f
i
)S
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacitance in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
S
(C
L
V
CC
2
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
14-Pin Plastic DIL
40
C to +125
C
74LV164 N
74LV164 N
SOT27-1
14-Pin Plastic SO
40
C to +125
C
74LV164 D
74LV164 D
SOT108-1
14-Pin Plastic SSOP Type II
40
C to +125
C
74LV164 DB
74LV164 DB
SOT337-1
14-Pin Plastic TSSOP Type I
40
C to +125
C
74LV164 PW
74LV164PW DH
SOT402-1
Philips Semiconductors
Product specification
74LV164
8-bit serial-in/parallel-out shift register
1998 May 07
3
PIN CONFIGURATION
SV00381
D
sa
D
sb
Q
0
Q
1
Q
2
Q
3
GND
V
CC
Q
7
Q
6
Q
5
Q
4
MR
CP
1
2
3
4
5
6
7
14
13
12
11
10
9
8
LOGIC SYMBOL
Q
0
CP
Q
1
Q
2
MR
Q
3
Q
4
Q
5
Q
6
Q
7
D
sa
D
sb
1
8
2
9
3
4
5
6
10
11
12
13
SV00382
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1,2
D
sa
, D
sb
Data inputs
3, 4, 5, 6,
10, 11,
12, 13
Q
0
to Q
7
Outputs
7
GND
Ground (0V)
8
CP
Clock input (LOW-to-HIGH, edge-trig-
gered)
9
MR
Master reset input (active LOW)
14
V
CC
Positive supply voltage
LOGIC SYMBOL (IEEE/IEC)
SV00383
SRG8
C1/
R
&
1D
8
9
1
2
3
4
5
6
10
11
12
13
Philips Semiconductors
Product specification
74LV164
8-bit serial-in/parallel-out shift register
1998 May 07
4
FUNCTIONAL DIAGRAM
Q
0
CP
Q
1
Q
2
Q
3
MR
8-BIT SERIAL-IN/PARALLEL-OUT
SHIFT REGISTER
Q
4
Q
5
Q
6
Q
7
8
9
3
4
5
6
10
11
12
13
D
sa
D
sb
1
2
SV00384
FUNCTION TABLE
OPERATING
INPUTS
OUTPUTS
MODES
MR
CP
D
sa
D
sb
Q
0
Q
1
Q
7
Reset (clear)
L
X
x
x
L
L L
Shift
H
H
H
H
l
l
h
h
l
h
l
h
L
L
L
H
q
0
q
6
q
0
q
6
q
0
q
6
q
0
q
6
H
= HIGH voltage level
h
= HIGH voltage level one set-up time prior to the
LOW-to-HIGH CP transition
L
= LOW voltage level
l
= LOW voltage level one set-up time prior to the
LOW-to-HIGH CP transition
q
= Lower case letter indicates the state of referenced input
one set-up time prior to the LOW-to-HIGH CP transition
= LOW-to-HIGH clock transition
ABSOLUTE MAXIMUM RATINGS
1, 2
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
0.5 to +7.0
V
I
IK
DC input diode current
V
I
< 0.5 or V
I
> V
CC
+ 0.5V
20
mA
I
OK
DC output diode current
V
O
< 0.5 or V
O
> V
CC
+ 0.5V
50
mA
I
O
DC output source or sink current
standard outputs
0.5V < V
O
< V
CC
+ 0.5V
25
mA
I
GND
,
I
CC
DC V
CC
or GND current for types with
standard outputs
50
mA
T
stg
Storage temperature range
65 to +150
C
P
TOT
Power dissipation per package
plastic DIL
plastic mini-pack (SO)
plastic shrink mini-pack (SSOP and TSSOP)
for temperature range: 40 to +125
C
above +70
C derate linearly with 12mW/K
above +70
C derate linearly with 8 mW/K
above +60
C derate linearly with 5.5 mW/K
750
500
400
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP.
MAX
UNIT
V
CC
DC supply voltage
See Note 1
1.0
3.3
5.5
V
V
I
Input voltage
0
V
CC
V
V
O
Output voltage
0
V
CC
V
T
amb
Operating ambient temperature range in free
air
See DC and AC
characteristics
40
40
+85
+125
C
t
r
, t
f
Input rise and fall times
V
CC
= 1.0V to 2.0V
V
CC
= 2.0V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 3.6V to 5.5V
500
200
100
50
ns/V
NOTES:
1. The LV is guaranteed to function down to V
CC
= 1.0V (input levels GND or V
CC
); DC characteristics are guaranteed from V
CC
= 1.2V to V
CC
= 5.5V.
Philips Semiconductors
Product specification
74LV164
8-bit serial-in/parallel-out shift register
1998 May 07
5
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
-40
C to +85
C
-40
C to +125
C
UNIT
MIN
TYP
1
MAX
MIN
MAX
V
CC
= 1.2V
0.9
0.9
V
IH
HIGH level Input
V
CC
= 2.0V
1.4
1.4
V
V
IH
voltage
V
CC
= 2.7 to 3.6V
2.0
2.0
V
V
CC
= 4.5 to 5.5V
0.7*V
CC
0.7*V
CC
V
CC
= 1.2V
0.3
0.3
V
IL
LOW level Input
V
CC
= 2.0V
0.6
0.6
V
V
IL
voltage
V
CC
= 2.7 to 3.6V
0.8
0.8
V
V
CC
= 4.5 to 5.5
0.3*V
CC
0.3*V
CC
V
CC
= 1.2V; V
I
= V
IH
or V
IL;
I
O
= 100
A
1.2
HIGH level output
V
CC
= 2.0V; V
I
= V
IH
or V
IL;
I
O
= 100
A
1.8
2.0
1.8
V
OH
HIGH level output
voltage; all outputs
V
CC
= 2.7V; V
I
= V
IH
or V
IL;
I
O
= 100
A
2.5
2.7
2.5
V
voltage all out uts
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 100
A
2.8
3.0
2.8
V
CC
= 4.5V;V
I
= V
IH
or V
IL;
I
O
= 100
A
4.3
4.5
4.3
V
OH
HIGH level output
voltage;
V
CC
= 3.0V;V
I
= V
IH
or V
IL;
I
O
= 6mA
2.40
2.82
2.20
V
V
OH
g
STANDARD
outputs
V
CC
= 4.5V;V
I
= V
IH
or V
IL;
I
O
= 12mA
3.60
4.20
3.50
V
V
CC
= 1.2V; V
I
= V
IH
or V
IL;
I
O
= 100
A
0
LOW level output
V
CC
= 2.0V; V
I
= V
IH
or V
IL;
I
O
= 100
A
0
0.2
0.2
V
OL
LOW level output
voltage; all outputs
V
CC
= 2.7V; V
I
= V
IH
or V
IL;
I
O
= 100
A
0
0.2
0.2
V
voltage all out uts
V
CC
= 3.0V;V
I
= V
IH
or V
IL;
I
O
= 100
A
0
0.2
0.2
V
CC
= 4.5V;V
I
= V
IH
or V
IL;
I
O
= 100
A
0
0.2
0.2
V
OL
LOW level output
voltage;
V
CC
= 3.0V;V
I
= V
IH
or V
IL;
I
O
= 6mA
0.25
0.40
0.50
V
V
OL
g
STANDARD
outputs
V
CC
= 4.5V;V
I
= V
IH
or V
IL;
I
O
= 12mA
0.35
0.55
0.65
V
I
I
Input leakage
current
V
CC
= 5.5V; V
I
= V
CC
or GND
1.0
1.0
A
I
CC
Quiescent supply
current; MSI
V
CC
= 5.5V; V
I
= V
CC
or GND; I
O
= 0
20.0
160
A
I
CC
Additional
quiescent supply
current per input
V
CC
= 2.7V to 3.6V; V
I
= V
CC
0.6V
500
850
A
NOTES:
1. All typical values are measured at T
amb
= 25
C.
PDF 
ZIP