Philips Semiconductors
Product specification
74LV574
Octal D-type flip-flop; positive edge-trigger (3-State)
2
1998 Jun 10
853-1990 19545
FEATURES
Wide operating voltage: 1.0 to 5.5V
Optimized for Low Voltage applications: 1.0 to 3.6V
Accepts TTL input levels between V
CC
= 2.7V and V
CC
= 3.6V
Typical V
OLP
(output ground bounce)
t
0.8V at V
CC
= 3.3V,
T
amb
= 25
C
Typical V
OHV
(output V
OH
undershoot)
u
2V at V
CC
= 3.3V,
T
amb
= 25
C
Common 3-State output enable input
Output capability: bus driver
I
CC
category: MSI
DESCRIPTION
The 74LV574 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT574.
The 74LV574 is an octal D-type flipflop featuring separate D-type
inputs for each flip-flop and non-inverting 3-state outputs for bus
oriented applications. A clock (CP) and an output enable (OE) input
are common to all flip-flops.
The eight flip-flops will store the state of their individual D-inputs that
meet the set-up and hold times requirements on the LOW-to-HIGH
CP transition.
When OE is LOW, the contents of the eight flip-flops is available at
the outputs. When OE is HIGH, the outputs go to the high
impedance OFF-state. Operation of the OE input does not affect the
state of the flip-flops.
QUICK REFERENCE DATA
GND = 0V; T
amb
= 25
C; t
r
=t
f
v
2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
CP to Q
n
C
L
= 15pF
V
CC
= 3.3V
13
ns
f
max
Maximum clock frequency
C
L
= 15pF, V
CC
= 3.3V
77
MHz
C
I
Input capacitance
3.5
pF
C
PD
Power dissipation capacitance per flip-flop
Notes 1 and 2
25
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W)
P
D
= C
PD
V
CC
2
x f
i
)S
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacity in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
S
(C
L
V
CC
2
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC
ORDERING AND PACKAGE INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH
AMERICA
NORTH AMERICA
PKG. DWG. #
20-Pin Plastic DIL
40
C to +125
C
74LV574 N
74LV574 N
SOT146-1
20-Pin Plastic SO
40
C to +125
C
74LV574 D
74LV574 D
SOT163-1
20-Pin Plastic SSOP Type II
40
C to +125
C
74LV574 DB
74LV574 DB
SOT339-1
20-Pin Plastic TSSOP Type I
40
C to +125
C
74LV574 PW
74LV574PW DH
SOT360-1
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
1
OE
Output enabled input (active LOW)
2, 3, 4, 5,
6, 7, 8, 9
D0D7
Data inputs
19, 18, 17, 16,
15, 14, 13, 12
Q0Q7
3-State flip-flop outputs
10
GND
Ground (0V)
11
CP
Clock input (LOW-to-HIGH,
edge-triggered)
20
VCC
Positive supply voltage
FUNCTION TABLE
OPERATING
INPUTS
INTERNAL
OUTPUTS
MODES
OE
CP
Dn
FLIP-FLOPS
Q0 to Q7
Load and read
register
L
L
l
h
L
H
L
H
Load register and
disable outputs
H
H
l
h
L
H
Z
Z
H
= HIGH voltage level
h
= HIGH voltage level one set-up time prior to the
LOW-to-HIGH CP transition
L
= LOW voltage level
l
= LOW voltage level one set-up time prior to the
LOW-to-HIGH CP transition
Z
= High impedance OFF-state
= LOWtoHIGH clock transition
Philips Semiconductors
Product specification
74LV574
Octal D-type flip-flop; positive edge-trigger (3-State)
1998 Jun 10
4
LOGIC DIAGRAM
SV00342
D
D0
Q0
D1
D2
D3
D4
D5
D6
D7
Q1
Q2
Q3
Q4
Q5
Q6
Q7
CP
OE
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
FF1
FF2
FF3
FF4
FF5
FF6
FF7
FF8
ABSOLUTE MAXIMUM RATINGS
1, 2
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
0.5 to +7.0
V
I
IK
DC input diode current
V
I
< 0.5 or V
I
> V
CC
+ 0.5V
20
mA
I
OK
DC output diode current
V
O
< 0.5 or V
O
> V
CC
+ 0.5V
50
mA
I
O
DC output source or sink current
bus driver outputs
0.5V < V
O
< V
CC
+ 0.5V
35
mA
I
GND
,
I
CC
DC V
CC
or GND current for types with
bus driver outputs
70
mA
T
stg
Storage temperature range
65 to +150
C
P
TOT
Power dissipation per package
plastic DIL
plastic mini-pack (SO)
plastic shrink mini-pack (SSOP and TSSOP)
for temperature range: 40 to +125
C
above +70
C derate linearly with 12mW/K
above +70
C derate linearly with 8 mW/K
above +60
C derate linearly with 5.5 mW/K
750
500
400
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP.
MAX
UNIT
V
CC
DC supply voltage
See Note
1
1.0
3.3
5.5
V
V
I
Input voltage
0
V
CC
V
V
O
Output voltage
0
V
CC
V
T
amb
Operating ambient temperature range in free
air
See DC and AC
characteristics
40
40
+85
+125
C
t
r
, t
f
Input rise and fall times
V
CC
= 1.0V to 2.0V
V
CC
= 2.0V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 3.6V to 5.5V
500
200
100
50
ns/V
NOTES:
1. The LV is guaranteed to function down to V
CC
= 1.0V (input levels GND or V
CC
); DC characteristics are guaranteed from V
CC
= 1.2V to V
CC
= 5.5V.
Philips Semiconductors
Product specification
74LV574
Octal D-type flip-flop; positive edge-trigger (3-State)
1998 Jun 10
5
DC CHARACTERISTICS FOR THE LV FAMILY
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
-40
C to +85
C
-40
C to +125
C
UNIT
MIN
TYP
1
MAX
MIN
MAX
V
CC
= 1.2V
0.9
0.9
V
IH
HIGH level Input
V
CC
= 2.0V
1.4
1.4
V
V
IH
voltage
V
CC
= 2.7 to 3.6V
2.0
2.0
V
V
CC
= 4.5 to 5.5V
0.7*V
CC
0.7*V
CC
V
CC
= 1.2V
0.3
0.3
V
IL
LOW level Input
V
CC
= 2.0V
0.6
0.6
V
V
IL
voltage
V
CC
= 2.7 to 3.6V
0.8
0.8
V
V
CC
= 4.5 to 5.5
0.3*V
CC
0.3*V
CC
V
CC
= 1.2V; V
I
= V
IH
or V
IL;
I
O
= 100
A
1.2
HIGH level output
V
CC
= 2.0V; V
I
= V
IH
or V
IL;
I
O
= 100
A
1.8
2.0
1.8
HIGH level output
voltage; all outputs
V
CC
= 2.7V; V
I
= V
IH
or V
IL;
I
O
= 100
A
2.5
2.7
2.5
V
OH
voltage all out uts
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 100
A
2.8
3.0
2.8
V
V
OH
V
CC
= 4.5V;V
I
= V
IH
or V
IL;
I
O
= 100
A
4.3
4.5
4.3
V
HIGH level output
voltage; BUS driver
V
CC
= 3.0V;V
I
= V
IH
or V
IL;
I
O
= 8mA
2.40
2.82
2.20
voltage; BUS driver
outputs
V
CC
= 4.5V;V
I
= V
IH
or V
IL;
I
O
= 16mA
3.60
4.20
3.50
V
CC
= 1.2V; V
I
= V
IH
or V
IL;
I
O
= 100
A
0
LOW level output
V
CC
= 2.0V; V
I
= V
IH
or V
IL;
I
O
= 100
A
0
0.2
0.2
LOW level output
voltage; all outputs
V
CC
= 2.7V; V
I
= V
IH
or V
IL;
I
O
= 100
A
0
0.2
0.2
V
OL
voltage all out uts
V
CC
= 3.0V;V
I
= V
IH
or V
IL;
I
O
= 100
A
0
0.2
0.2
V
V
OL
V
CC
= 4.5V;V
I
= V
IH
or V
IL;
I
O
= 100
A
0
0.2
0.2
V
LOW level output
voltage; BUS driver
V
CC
= 3.0V;V
I
= V
IH
or V
IL;
I
O
= 8mA
0.20
0.40
0.50
voltage; BUS driver
outputs
V
CC
= 4.5V;V
I
= V
IH
or V
IL;
I
O
= 16mA
0.35
0.55
0.65
I
I
Input leakage
current
V
CC
= 5.5V; V
I
= V
CC
or GND
1.0
1.0
A
I
OZ
3-State output
OFF-state current
V
CC
= 5.5V; V
I
= V
IH
or V
IL;
V
O
= V
CC
or GND
5
10
A
I
CC
Quiescent supply
current; MSI
V
CC
= 5.5V; V
I
= V
CC
or GND; I
O
= 0
20.0
160
A
I
CC
Additional
quiescent supply
current per input
V
CC
= 2.7V to 3.6V; V
I
= V
CC
0.6V
500
850
A
NOTE:
1. All typical values are measured at T
amb
= 25
C.
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