2003 Feb 25
2
Philips Semiconductors
Product specification
Hex buffer with open-drain outputs
74LVC07A
FEATURES
5 V tolerant inputs and outputs (open drain) for
interfacing with 5 V logic
Wide supply voltage range from 1.65 to 5.5 V
CMOS low power consumption
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Complies with JEDEC standard no. 8-1A
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
DESCRIPTION
The 74LVC07A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families. Inputs can be
driven from either 3.3 or 5 V devices. This feature allows
the use of these devices as translators in a mixed
3.3 to 5 V environment.
The 74LVC07A provides six non-inverting buffers.
The outputs of the 74LVC07A are open drain and can be
connected to other open-drain outputs to implement
active-LOW wired-OR or active-HIGH wired-AND
functions.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
2.5 ns.
Note
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W).
P
D
= C
PD
V
CC
2
f
i
N +
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = total load switching outputs;
(C
L
V
CC
2
f
o
) = sum of the outputs.
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level;
Z = high-impedance OFF-state.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PLZ
/t
PZL
propagation delay nA to nY
C
L
= 50 pF; V
CC
= 3.3 V
2.2
ns
C
I
input capacitance
5.0
pF
C
PD
power dissipation capacitance per gate
V
I
= GND to V
CC
; note 1
6.0
pF
INPUT
OUTPUT
nA
nY
L
L
H
Z
2003 Feb 25
3
Philips Semiconductors
Product specification
Hex buffer with open-drain outputs
74LVC07A
ORDERING INFORMATION
PINNING
TYPE NUMBER
PACKAGE
TEMPERATURE RANGE
PINS
PACKAGE
MATERIAL
CODE
74LVC07AD
-
40 to +85
C
14
SO14
plastic
SOT108-1
74LVC07APW
-
40 to +85
C
14
TSSOP14
plastic
SOT402-1
74LVC07ABQ
-
40 to +85
C
14
DHVQFN14
plastic
SOT762-1
PIN
SYMBOL
DESCRIPTION
1
1A
data input
2
1Y
data output
3
2A
data input
4
2Y
data output
5
3A
data input
6
3Y
data output
7
GND
ground (0 V)
8
4Y
data output
9
4A
data input
10
5Y
data output
11
5A
data input
12
6Y
data output
13
6A
data input
14
V
CC
supply voltage
handbook, halfpage
07
MNA531
1
2
3
4
5
6
7
1A
1Y
2A
2Y
3A
3Y
GND
VCC
6A
6Y
5A
5Y
4A
4Y
14
13
12
11
10
9
8
Fig.1 Pin configuration SO14 and TSSOP14.
handbook, halfpage
1
14
GND
(1)
1A
VCC
7
2
3
4
5
6
1Y
2A
2Y
3A
3Y
13
12
11
10
9
6A
6Y
5A
5Y
4A
8
GND
Top view
4Y
MBL760
Fig.2 Pin configuration DHVQFN14.
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
2003 Feb 25
5
Philips Semiconductors
Product specification
Hex buffer with open-drain outputs
74LVC07A
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. For SO14 packages: above 70
C derate linearly with 8 mW/K.
For TSSOP14 packages: above 60
C derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60
C derate linearly with 4.5 mW/K.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
CC
supply voltage
1.65
5.5
V
V
I
input voltage
0
5.5
V
V
O
output voltage
active mode
0
5.5
V
high-impedance mode
0
5.5
V
T
amb
operating ambient temperature
-
40
+85
C
t
r
, t
f
input rise and fall ratios
V
CC
= 1.65 to 2.7 V
0
20
ns/V
V
CC
= 2.7 to 5.5 V
0
10
ns/V
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
CC
supply voltage
-
0.5
+6.5
V
I
IK
input diode current
V
I
< 0
-
-
50
mA
V
I
input voltage
note 1
-
0.5
+6.5
V
I
OK
output clamping diode current
V
O
< 0
-
-
50
mA
V
O
output voltage
active mode; note 1
-
0.5
+6.5
V
high-impedance mode; note 1
-
0.5
+6.5
V
I
O
output source or sink current
V
O
= 0 to V
CC
-
50
mA
I
CC
, I
GND
V
CC
or GND current
-
100
mA
T
stg
storage temperature
-
65
+150
C
P
tot
power dissipation
T
amb
=
-
40 to +125
C; note 2
-
500
mW
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