Philips
Semiconductors
74LVC138A
3-to-8 line decoder/demultiplexer;
inverting
Product specification
1998 Apr 28
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74LVC138A
3-to-8 line decoder/demultiplexer; inverting
2
1998 Apr 28
8531943 19308
FEATURES
Wide supply voltage range of 1.2 to 3.6 V
In accordance with JEDEC standard no. 8-1A
Inputs accept voltages up to 5.5 V
CMOS lower power consumption
Direct interface with TTL levels
Demultiplexing capability
Multiple input enable for easy expansion
Ideal for memory chip select decoding
Active LOW mutually exclusive outputs
Output drive capability 50
W
transmission lines at 85
C
DESCRIPTION
The 74LVC138A is a low-voltage, low-power, high-performance
Si-gate CMOS device, superior to most advanced CMOS
compatible TTL families.
The 74LVC138A accepts three binary weighted address inputs (A
0
,
A
1
, A
2
) and when enabled, provides 8 mutually exclusive active
LOW outputs (Y
0
to Y
7
).
The 74LVC138A features three enable inputs: two active LOW (E
1
and E
2
) and one active HIGH (E
3
). Every output will be HIGH unless
E
1
and E
2
are LOW and E
3
is HIGH.
This multiple enable function allows easy parallel expansion of the
74LV138A to a 1-of-32 (5 lines to 32 lines) decoder with just four
74LV138A ICs and one inverter. The 74LV138A can be used as an
eight output demultiplexer by using one of the active LOW enable
inputs as the data input and the remaining enable inputs as strobes.
Unused enable inputs must be permanently tied to their appropriate
active HIGH or LOW state.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C; t
r
= t
f
2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
An to Yn,
E
3
to Yn, En to Yn
C
L
= 50 pF;
V
CC
= 3.3 V
3.5
3.5
ns
C
I
Input capacitance
5.0
pF
C
PD
Power dissipation capacitance per
package
V
CC
= 3.3 V
Notes 1 and 2
44
pF
NOTES:
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W)
P
D
= C
PD
V
CC
2
f
i
)
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacity in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
(C
L
V
CC
2
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
16-Pin Plastic SO
40
C to +85
C
74LVC138A D
74LVC138A D
SOT109-1
16-Pin Plastic SSOP Type II
40
C to +85
C
74LVC138A DB
74LVC138A DB
SOT338-1
16-Pin Plastic TSSOP Type I
40
C to +85
C
74LVC138A PW
74LVC138APW DH
SOT403-1
PIN CONFIGURATION
SV00553
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
GND
Y
7
Y
0
A
0
A
1
A
2
E
1
E
2
E
3
V
CC
Y
0
Y
0
Y
0
Y
0
Y
0
Y
0
LOGIC DIAGRAM
SV00554
Y
0
A
0
Y
1
A
1
Y
2
A
2
Y
3
Y
4
Y
5
Y
6
Y
7
15
14
13
12
11
10
E
1
E
2
E
3
9
7
4
1
5
2
6
3
Philips Semiconductors
Product specification
74LVC138A
3-to-8 line decoder/demultiplexer; inverting
1998 Apr 28
3
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND FUNCTION
1, 2, 3
A
0
to A
2
Address inputs
4, 5
E
1
, E
2
Enable inputs (active LOW)
6
E
3
Enable inputs (active HIGH)
15, 14, 13, 12,
11, 10, 9, 7
Y
0
to Y
7
Outputs
8
GND
Ground (0 V)
16
V
CC
Positive supply voltage
LOGIC SYMBOL (IEEE/IEC)
SV00555
1
2
3
4
5
6
7
9
10
11
12
13
14
15
0
1
2
3
4
5
6
7
(a)
(b)
&
EN
X/Y
DX
0
2
1
2
3
4
5
6
7
9
10
11
12
13
14
15
0
1
2
3
4
5
6
7
&
1
2
4
FUNCTIONAL DIAGRAM
SV00556
1
2
3
4
5
6
7
9
10
11
12
13
14
15
A
1
E
1
A
2
A
3
E
2
E
3
3-to-8
DECODER
ENABLE
EXITING
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
7
Y
6
FUNCTION TABLE
INPUTS
OUTPUTS
E
1
E
2
E
3
A
0
A
1
A
2
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
Y
7
H
X
X
X
X
X
H
H
H
H
H
H
H
H
X
H
X
X
X
X
H
H
H
H
H
H
H
H
X
X
L
X
X
X
H
H
H
H
H
H
H
H
L
L
H
L
L
L
L
H
H
H
H
H
H
H
L
L
H
H
L
L
H
L
H
H
H
H
H
H
L
L
H
L
H
L
H
H
L
H
H
H
H
H
L
L
H
H
H
L
H
H
H
L
H
H
H
H
L
L
H
L
L
H
H
H
H
H
L
H
H
H
L
L
H
H
L
H
H
H
H
H
H
L
H
H
L
L
H
L
H
H
H
H
H
H
H
H
L
H
L
L
H
H
H
H
H
H
H
H
H
H
H
L
NOTES:
H = HIGH voltage level
L = LOW voltage level
X = don't care
Philips Semiconductors
Product specification
74LVC138A
3-to-8 line decoder/demultiplexer; inverting
1998 Apr 28
4
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
LIMITS
UNIT
SYMBOL
PARAMETER
CONDITIONS
MIN
MAX
UNIT
V
CC
DC supply voltage (for max. speed performance)
2.7
3.6
V
V
CC
DC supply voltage (for low-voltage applications)
1.2
3.6
V
V
I
DC input voltage range
0
5.5
V
V
I/O
DC output voltage range; output HIGH or LOW state
0
V
CC
V
V
I/O
DC input voltage range; output 3-State
0
5.5
V
T
amb
Operating free-air temperature range
40
+85
C
t
r
, t
f
Input rise and fall times
V
CC
= 1.2 to 2.7V
V
CC
= 2.7 to 3.6V
0
0
20
10
ns/V
ABSOLUTE MAXIMUM RATINGS
1
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0V).
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
0.5 to +6.5
V
I
IK
DC input diode current
V
I
t
0
50
mA
V
I
DC input voltage
Note 2
0.5 to +6.5
V
I
OK
DC output diode current
V
O
u
V
CC
or V
O
t
0
"
50
mA
V
I/O
DC output voltage; output HIGH or LOW
Note 2
0.5 to V
CC
+0.5
V
V
I/O
DC input voltage; output 3-State
Note 2
0.5 to 6.5
V
I
O
DC output source or sink current
V
O
= 0 to V
CC
"
50
mA
I
GND
, I
CC
DC V
CC
or GND current
"
100
mA
T
stg
Storage temperature range
65 to +150
C
Power dissipation per package
P
TOT
plastic mini-pack (SO)
above +70
C derate linearly with 8 mW/K
500
mW
plastic shrink mini-pack (SSOP and TSSOP)
above +60
C derate linearly with 5.5 mW/K
500
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
Philips Semiconductors
Product specification
74LVC138A
3-to-8 line decoder/demultiplexer; inverting
1998 Apr 28
5
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40
C to +85
C
UNIT
MIN
TYP
1
MAX
V
HIGH level input voltage
V
CC
= 1.2V
V
CC
V
V
IH
HIGH level input voltage
V
CC
= 2.7 to 3.6V
2.0
V
V
LOW level input voltage
V
CC
= 1.2V
GND
V
V
IL
LOW level input voltage
V
CC
= 2.7 to 3.6V
0.8
V
V
CC
= 2.7V; V
I
= V
IH
or V
IL
; I
O
= 12mA
V
CC
*
0.5
V
O
HIGH level output voltage
V
CC
= 3.0V; V
I
= V
IH
or V
IL
; I
O
= 100
A
V
CC
*
0.2
V
CC
V
V
OH
HIGH level output voltage
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 12mA
V
CC
*
0.6
V
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 24mA
V
CC
*
1.0
V
CC
= 2.7V; V
I
= V
IH
or V
IL
; I
O
= 12mA
0.40
V
OL
LOW level output voltage
V
CC
= 3.0V; V
I
= V
IH
or V
IL
; I
O
= 100
A
GND
0.20
V
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 24mA
0.55
I
Input leakage current
V
CC
= 3 6V; V = 5 5V or GND
"
0 1
"
5
A
I
I
Input leakage current
V
CC
= 3.6V; V
I
= 5.5V or GND
"
0.1
"
5
A
I
CC
Quiescent supply current
V
CC
= 3.6V; V
I
= V
CC
or GND; I
O
= 0
0.1
10
A
I
CC
Additional quiescent supply current per
input pin
V
CC
= 2.7V to 3.6V; V
I
= V
CC
0.6V; I
O
= 0
5
500
A
NOTE:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25
C.
AC CHARACTERISTICS
GND = 0 V; t
r
= t
f
v
2.5 ns; C
L
= 50 pF; R
L
= 500
W
; T
amb
= 40
_
C to +85
_
C
LIMITS
SYMBOL
PARAMETER
WAVEFORM
V
CC
= 3.3V
0.3V
V
CC
= 2.7V
UNIT
MIN
TYP
1
MAX
MIN
MAX
t
PHL
/t
PLH
Propagation delay
A
n
to Y
n
Figure 1, 3
1.5
3.5
5.8
1.5
6.8
ns
t
PHL
/t
PLH
Propagation delay
E
3
to Y
n
Figure 1, 3
1.5
3.6
5.8
1.5
6.8
ns
t
PHL
/t
PLH
Propagation delay
E
n
to Y
n
Figure 2, 3
1.5
3.5
5.8
1.5
6.8
ns
NOTE:
1. These typical values are at V
CC
= 3.3V and T
amb
= 25
C.
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