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Электронный компонент: 74LVC2G07GV

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DATA SHEET
Product specification
Supersedes data of 2004 Mar 19
2004 Sep 08
INTEGRATED CIRCUITS
74LVC2G07
Buffers with open-drain outputs
2004 Sep 08
2
Philips Semiconductors
Product specification
Buffers with open-drain outputs
74LVC2G07
FEATURES
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8B/JESD36 (2.7 V to 3.6 V).
-
24 mA output drive (V
CC
= 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Multiple package options
ESD protection:
HBM EIA/JESD22-A114-B exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
Specified from
-
40
C to +85
C and
-
40
C to +125
C.
DESCRIPTION
The 74LVC2G07 is a high-performance, low-power,
low-voltage, Si-gate CMOS device superior to most
advanced CMOS compatible TTL families.
Input can be driven from either 3.3 V or 5 V devices. This
feature allows the use of this device in a mixed
3.3 V and 5 V environment.
Schmitt trigger action at all inputs makes the circuit tolerant
for slower input rise and fall time.
This device is fully specified for partial power-down
applications using I
off
. The I
off
circuitry disables the output,
preventing the damaging backflow current through the
device when it is powered down.
The 74LVC2G07 provides two non-inverting buffers.
The output of the device is an open drain and can be
connected to other open-drain outputs to implement
active-LOW wired-OR or active-HIGH wired-AND
functions.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
C.
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
W).
P
D
= C
PD
V
CC
2
f
i
N +
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = total load switching outputs;
(C
L
V
CC
2
f
o
) = sum of outputs.
2. The condition is V
I
= GND to V
CC
.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PLZ
/t
PZL
propagation delay input nA to output nY V
CC
= 1.8 V; C
L
= 30 pF; R
L
= 1 k
3.5
ns
V
CC
= 2.5 V; C
L
= 30 pF; R
L
= 500
2.4
ns
V
CC
= 2.7 V; C
L
= 50 pF; R
L
= 500
2.3
ns
V
CC
= 3.3 V; C
L
= 50 pF; R
L
= 500
2.6
ns
V
CC
= 5.0 V; C
L
= 50 pF; R
L
= 500
1.5
ns
C
I
input capacitance
2.5
pF
C
PD
power dissipation capacitance per gate
V
CC
= 3.3 V; notes 1 and 2
6.5
pF
2004 Sep 08
3
Philips Semiconductors
Product specification
Buffers with open-drain outputs
74LVC2G07
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level;
Z = high-impedance OFF-state.
ORDERING INFORMATION
PINNING
INPUT
OUTPUT
nA
nY
L
L
H
Z
TYPE NUMBER
PACKAGE
TEMPERATURE RANGE
PINS
PACKAGE
MATERIAL
CODE
MARKING
74LVC2G07GW
-
40
C to +125
C
6
SC-88
plastic
SOT363
V7
74LVC2G07GV
-
40
C to +125
C
6
SC-74
plastic
SOT457
V07
74LVC2G07GM
-
40
C to +125
C
6
XSON6
plastic
SOT886
V7
PIN
SYMBOL
DESCRIPTION
1
1A
data input
2
GND
ground (0 V)
3
2A
data input
4
2Y
data output
5
V
CC
supply voltage
6
1Y
data output
07
1A
1Y
GND
2A
2Y
001aab670
1
2
3
6
V
CC
5
4
Fig.1 Pin configuration SC-88 and SC-74.
07
GND
001aab671
1A
2A
V
CC
1Y
2Y
Transparent top view
2
3
1
5
4
6
Fig.2 Pin configuration XSON6.
2004 Sep 08
4
Philips Semiconductors
Product specification
Buffers with open-drain outputs
74LVC2G07
handbook, halfpage
MNB092
1A
1Y
1
6
2A
2Y
3
4
Fig.3 Logic symbol.
handbook, halfpage
6
1
1A
1Y
MNB093
4
3
2A
2Y
Fig.4 IEEE/IEC logic symbol.
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. When V
CC
= 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
CC
supply voltage
1.65
5.5
V
V
I
input voltage
0
5.5
V
V
O
output voltage
active mode
0
V
CC
V
V
CC
= 0 V; Power-down mode
0
5.5
V
T
amb
operating ambient temperature
-
40
+125
C
t
r
, t
f
input rise and fall times
V
CC
= 1.65 V to 2.7 V
0
20
ns/V
V
CC
= 2.7 V to 5.5 V
0
10
ns/V
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
CC
supply voltage
-
0.5
+6.5
V
I
IK
input diode current
V
I
< 0 V
-
-
50
mA
V
I
input voltage
note 1
-
0.5
+6.5
V
I
OK
output diode current
V
O
< 0 V
-
-
50
mA
V
O
output voltage
active mode; notes 1 and 2
-
0.5
+6.5
V
Power-down mode; notes 1 and 2
-
0.5
+6.5
V
I
O
output source or sink current
V
O
= 0 V to 6.5 V
-
50
mA
I
CC
, I
GND
V
CC
or GND current
-
100
mA
T
stg
storage temperature
-
65
+150
C
P
tot
power dissipation
T
amb
=
-
40
C to +125
C
-
300
mW
2004 Sep 08
5
Philips Semiconductors
Product specification
Buffers with open-drain outputs
74LVC2G07
DC CHARACTERISTICS
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
OTHER
V
CC
(V)
T
amb
=
-
40
C to +85
C; note 1
V
IH
HIGH-level input voltage
1.65 to 1.95
0.65
V
CC
-
-
V
2.3 to 2.7
1.7
-
-
V
2.7 to 3.6
2.0
-
-
V
4.5 to 5.5
0.7
V
CC
-
-
V
V
IL
LOW-level input voltage
1.65 to 1.95
-
-
0.35
V
CC
V
2.3 to 2.7
-
-
0.7
V
2.7 to 3.6
-
-
0.8
V
4.5 to 5.5
-
-
0.3
V
CC
V
V
OL
LOW-level output voltage V
I
= V
IH
or V
IL
I
O
= 100
A
1.65 to 5.5
-
-
0.1
V
I
O
= 4 mA
1.65
-
-
0.45
V
I
O
= 8 mA
2.3
-
-
0.3
V
I
O
= 12 mA
2.7
-
-
0.4
V
I
O
= 24 mA
3.0
-
-
0.55
V
I
O
= 32 mA
4.5
-
-
0.55
V
I
LI
input leakage current
V
I
= 5.5 V or GND
1.65 to 5.5
-
0.1
5
A
I
OZ
output OFF-state current V
I
= V
IH
or V
IL
;
V
O
= V
CC
or GND
5.5
-
0.1
10
A
I
off
power OFF leakage
current
V
I
or V
O
= 5.5 V
0
-
0.1
10
A
I
CC
quiescent supply current
V
I
= V
CC
or GND;
I
O
= 0 A
5.5
-
0.1
10
A
I
CC
additional quiescent
supply current per pin
V
I
= V
CC
-
0.6 V;
I
O
= 0 A
2.3 to 5.5
-
5
500
A
2004 Sep 08
6
Philips Semiconductors
Product specification
Buffers with open-drain outputs
74LVC2G07
Note
1. All typical values are measured at V
CC
= 3.3 V and T
amb
= 25
C.
T
amb
=
-
40
C to +125
C
V
IH
HIGH-level input voltage
1.65 to 1.95
0.65
V
CC
-
-
V
2.3 to 2.7
1.7
-
-
V
2.7 to 3.6
2.0
-
-
V
4.5 to 5.5
0.7
V
CC
-
-
V
V
IL
LOW-level input voltage
1.65 to 1.95
-
-
0.35
V
CC
V
2.3 to 2.7
-
-
0.7
V
2.7 to 3.6
-
-
0.8
V
4.5 to 5.5
-
-
0.3
V
CC
V
V
OL
LOW-level output voltage V
I
= V
IH
or V
IL
I
O
= 100
A
1.65 to 5.5
-
-
0.1
V
I
O
= 4 mA
1.65
-
-
0.70
V
I
O
= 8 mA
2.3
-
-
0.45
V
I
O
= 12 mA
2.7
-
-
0.60
V
I
O
= 24 mA
3.0
-
-
0.80
V
I
O
= 32 mA
4.5
-
-
0.80
V
I
LI
input leakage current
V
I
= 5.5 V or GND
1.65 to 5.5
-
-
20
A
I
OZ
output OFF-state current V
I
= V
IH
or V
IL
;
V
O
= V
CC
or GND
5.5
-
-
10
A
I
off
power OFF leakage
current
V
I
or V
O
= 5.5 V
0
-
-
20
A
I
CC
quiescent supply current
V
I
= V
CC
or GND;
I
O
= 0 A
5.5
-
-
40
A
I
CC
additional quiescent
supply current per pin
V
I
= V
CC
-
0.6 V;
I
O
= 0 A
2.3 to 5.5
-
-
5000
A
SYMBOL
PARAMETER
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
OTHER
V
CC
(V)
2004 Sep 08
7
Philips Semiconductors
Product specification
Buffers with open-drain outputs
74LVC2G07
AC CHARACTERISTICS
GND = 0 V.
Note
1. All typical values are measured at T
amb
= 25
C and at V
CC
= 1.8 V, 2.5 V, 2.7 V, 3.3 V and 5.0 V respectively.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
WAVEFORMS
V
CC
(V)
T
amb
=
-
40
C to +85
C; note 1
t
PLZ
/t
PZL
propagation delay input nA to
output nY
see Figs 5 and 6
1.65 to 1.95
1.0
3.5
6.7
ns
2.3 to 2.7
0.5
2.4
4.3
ns
2.7
1.0
2.3
4.2
ns
3.0 to 3.6
0.5
2.6
3.7
ns
4.5 to 5.5
0.5
1.5
2.9
ns
T
amb
=
-
40
C to +125
C
t
PLZ
/t
PZL
propagation delay input nA to
output nY
see Figs 5 and 6
1.65 to 1.95
1.0
3.5
8.4
ns
2.3 to 2.7
0.5
2.4
5.5
ns
2.7
1.0
2.3
5.3
ns
3.0 to 3.6
0.5
2.6
4.7
ns
4.5 to 5.5
0.5
1.5
3.7
ns
AC WAVEFORMS
mna528
t
PLZ
V
X
nY output
nA input
V
I
V
CC
V
M
V
OL
GND
t
PZL
V
M
Fig.5 Input nA to output nY propagation delays.
V
OL
and V
OH
are typical output voltage drop that occur with the output load.
V
CC
V
M
V
X
INPUT
V
I
t
r
= t
f
1.65 V to 1.95 V
0.5
V
CC
V
OL
+ 0.15 V
V
CC
2.0 ns
2.3 V to 2.7 V
0.5
V
CC
V
OL
+ 0.15 V
V
CC
2.0 ns
2.7 V
1.5 V
V
OL
+ 0.3 V
2.7 V
2.5 ns
3.0 V to 3.6 V
1.5 V
V
OL
+ 0.3 V
2.7 V
2.5 ns
4.5 V to 5.5 V
0.5
V
CC
V
OL
+ 0.3 V
V
CC
2.5 ns
2004 Sep 08
8
Philips Semiconductors
Product specification
Buffers with open-drain outputs
74LVC2G07
V
EXT
V
CC
V
I
V
O
mna616
D.U.T.
C
L
R
T
R
L
R
L
PULSE
GENERATOR
Fig.6 Load circuitry for switching times.
Definitions for test circuit:
R
L
= Load resistor.
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to the output impedance Z
o
of the pulse generator.
V
CC
V
I
C
L
R
L
V
EXT
t
PZL
/t
PLZ
1.65 V to 1.95 V
V
CC
30 pF
1 k
2
V
CC
2.3 V to 2.7 V
V
CC
30 pF
500
2
V
CC
2.7 V
2.7 V
50 pF
500
6 V
3.0 V to 3.6 V
2.7 V
50 pF
500
6 V
4.5 V to 5.5 V
V
CC
50 pF
500
2
V
CC
2004 Sep 08
9
Philips Semiconductors
Product specification
Buffers with open-drain outputs
74LVC2G07
PACKAGE OUTLINES
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
EIAJ
SOT363
SC-88
w
B
M
bp
D
e1
e
pin 1
index
A
A1
Lp
Q
detail X
HE
E
v
M
A
A
B
y
0
1
2 mm
scale
c
X
1
3
2
4
5
6
Plastic surface mounted package; 6 leads
SOT363
UNIT
A1
max
bp
c
D
E
e
1
HE
Lp
Q
y
w
v
mm
0.1
0.30
0.20
2.2
1.8
0.25
0.10
1.35
1.15
0.65
e
1.3
2.2
2.0
0.2
0.1
0.2
DIMENSIONS (mm are the original dimensions)
0.45
0.15
0.25
0.15
A
1.1
0.8
97-02-28
2004 Sep 08
10
Philips Semiconductors
Product specification
Buffers with open-drain outputs
74LVC2G07
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
EIAJ
SOT457
SC-74
w
B
M
bp
D
e
pin 1
index
A
A1
Lp
Q
detail X
HE
E
v
M
A
A
B
y
0
1
2 mm
scale
c
X
1
3
2
4
5
6
Plastic surface mounted package; 6 leads
SOT457
UNIT
A1
bp
c
D
E
HE
Lp
Q
y
w
v
mm
0.1
0.013
0.40
0.25
3.1
2.7
0.26
0.10
1.7
1.3
e
0.95
3.0
2.5
0.2
0.1
0.2
DIMENSIONS (mm are the original dimensions)
0.6
0.2
0.33
0.23
A
1.1
0.9
97-02-28
01-05-04
2004 Sep 08
11
Philips Semiconductors
Product specification
Buffers with open-drain outputs
74LVC2G07
terminal 1
index area
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
SOT886
MO-252
SOT886
04-07-15
04-07-22
DIMENSIONS (mm are the original dimensions)
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
D
E
e
1
e
A
1
b
L
L
1
e
1
0
1
2 mm
scale
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
UNIT
mm
0.25
0.17
1.5
1.4
0.35
0.27
A
1
max
b
E
1.05
0.95
D
e
e
1
L
0.40
0.32
L
1
0.5
0.6
A
(1)
max
0.5
0.04
1
6
2
5
3
4
6
(2)
4
(2)
A
2004 Sep 08
12
Philips Semiconductors
Product specification
Buffers with open-drain outputs
74LVC2G07
DATA SHEET STATUS
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
LEVEL
DATA SHEET
STATUS
(1)
PRODUCT
STATUS
(2)(3)
DEFINITION
I
Objective data
Development
This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
DEFINITIONS
Short-form specification
The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition
Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information
Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
DISCLAIMERS
Life support applications
These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status `Production'), relevant changes will be
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
Koninklijke Philips Electronics N.V. 2004
SCA76
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Philips Semiconductors a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
Printed in The Netherlands
R20/03/pp
13
Date of release:
2004 Sep 08
Document order number:
9397 750 13775