Philips
Semiconductors
74LVC377
Octal D-type flip-flop with data enable;
positive-edge trigger
Product specification
Supersedes data of 1996 Jun 06
IC24 Data Handbook
1998 Jul 29
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74LVC377
Octal D-type flip-flop with data enable;
positive-edge trigger
2
1998 Jul 29
FEATURES
Wide supply voltage range of 1.2V to 3.6V
Conforms to JEDEC standard 8-1A
Inputs accept voltages up to 5.5V
CMOS low power consumption
Direct interface with TTL levels
Output drive capability 50
transmission lines @ 85
C
DESCRIPTION
The 74LVC377 is a low-voltage Si-gate CMOS device, superior to
most advanced CMOS compatible TTL families.
The 74LVC377 has eight edge-triggered , D-type flip-flops with
individual D inputs and Q outputs. A common clock (CP) input loads
all flip-flops simultaneously when the data enable E is LOW. The
state of each D input, one set-up time before the LOW-to-HIGH
clock transition, is transferred to the corresponding output (Qn) of
the flip-flop. The E input must be stable only one set-up time prior to
the LOW-to-HIGH transition for predictable operation.
QUICK REFERENCE DATA
GND = 0V; T
amb
= 25
C; t
r
=t
f
v
2.5 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL
/t
PLH
Propagation delay
CP to Qn;
C
L
= 50pF
V
CC
= 3.3V
6.0
ns
f
Maximum clock frequency
230
MHz
f
max
Maximum clock frequency
230
MHz
C
I
Input capacitance
5.0
pF
C
PD
Power dissipation
capacitance per flip-flop
V
I
= GND to V
CC
1
22
pF
NOTES:
1
C
PD
is used to determine the dynamic power dissipation (P
D
in
W)
P
D
= C
PD
V
CC
2
x f
i
)S
(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz; C
L
= output load capacity in pF;
f
o
= output frequency in MHz; V
CC
= supply voltage in V;
S
(C
L
V
CC
2
f
o
) = sum of the outputs.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
20-Pin Plastic SO
40
C to +85
C
74LVC377 D
74LVC377 D
SOT163-1
20-Pin Plastic SSOP Type II
40
C to +85
C
74LVC377 DB
74LVC377 DB
SOT339-1
20-Pin Plastic TSSOP Type I
40
C to +85
C
74LVC377 PW
74LVC377PW DH
SOT360-1
PIN CONFIGURATION
14
13
12
11
10
9
8
7
6
5
4
3
2
1
GND
V
CC
15
16
17
18
19
20
E
Q0
D0
D1
Q1
Q2
D2
D3
Q3
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
SY00058
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1
E
Data enable input (active LOW)
2, 5, 6,
9, 12, 15,
16, 19
Q0 Q7
Flip-flop outputs
3, 4, 7,
8, 13, 14,
17, 18
D0 D7
Data inputs
10
GND
Ground (0V)
11
CP
Clock input (LOW-to-HIGH,
edge-triggered)
20
V
CC
Positive power supply
Philips Semiconductors
Product specification
74LVC377
Octal D-type flip-flop with data enable;
positive-edge trigger
1998 Jul 29
3
LOGIC SYMBOL
3
4
7
8
13
14
17
18
2
5
6
9
12
15
16
19
11
CP
E
D0
D1
D2
D3
D4
D5
D6
D7
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
1
SY00059
FUNCTION TABLE
OPERATING
INPUTS
OUTPUT
MODES
CP
E
Dn
Q
n
Load `1'
l
h
H
Load `0'
l
l
L
hold
(do nothing)
X
h
H
X
X
no change
no change
H = HIGH voltage level
h
= HIGH voltage level one set-up time
prior to the LOW-to-HIGH CP transition
L
= LOW voltage level
I
= LOW voltage level one set-up time
prior to the LOW-to-HIGH CP transition
= LOW-to-HIGH transition
X = Don't care
LOGIC SYMBOL (IEEE/IEC)
4
7
8
13
14
17
18
1C2
G1
2D
11
1
3
5
2
6
9
12
15
16
19
CP
E
D0
D1
D2
D3
D4
D5
D6
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
D7
SY00060
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
LIMITS
UNIT
SYMBOL
PARAMETER
CONDITIONS
MIN
MAX
UNIT
V
CC
DC supply voltage (for max. speed performance)
2.7
3.6
V
V
CC
DC supply voltage (for low-voltage applications)
1.2
3.6
V
V
I
DC Input voltage range
0
5.5
V
V
I/O
DC Input voltage range for I/Os
0
V
CC
V
V
O
DC output voltage range
0
V
CC
V
T
amb
Operating free-air temperature range
40
+85
C
t
r
, t
f
Input rise and fall times
V
CC
= 1.2 to 2.7V
V
CC
= 2.7 to 3.6V
0
0
20
10
ns/V
Philips Semiconductors
Product specification
74LVC377
Octal D-type flip-flop with data enable;
positive-edge trigger
1998 Jul 29
4
ABSOLUTE MAXIMUM RATINGS
1
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
0.5 to +6.5
V
I
IK
DC input diode current
V
I
t
0
50
mA
V
I
DC input voltage
Note 2
0.5 to +5.5
V
V
I/O
DC input voltage range for I/Os
0.5 to V
CC
+0.5
V
I
OK
DC output diode current
V
O
u
V
CC
or V
O
t
0
"
50
mA
V
OUT
DC output voltage
Note 2
0.5 to V
CC
+0.5
V
I
OUT
DC output source or sink current
V
O
= 0 to V
CC
"
50
mA
I
GND
, I
CC
DC V
CC
or GND current
"
100
mA
T
stg
Storage temperature range
60 to +150
C
Power dissipation per package
P
TOT
plastic mini-pack (SO)
above +70
C derate linearly with 8 mW/K
500
mW
plastic shrink mini-pack (SSOP and TSSOP)
above +60
C derate linearly with 5.5 mW/K
500
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40
C to +85
C
UNIT
MIN
TYP
1
MAX
V
HIGH level Input voltage
V
CC
= 1.2V
V
CC
V
V
IH
HIGH level Input voltage
V
CC
= 2.7 to 3.6V
2.0
V
V
LOW level Input voltage
V
CC
= 1.2V
GND
V
V
IL
LOW level Input voltage
V
CC
= 2.7 to 3.6V
0.8
V
V
CC
= 2.7V; V
I
= V
IH
or V
IL
; I
O
= 12mA
V
CC
*
0.5
V
O
HIGH level output voltage
V
CC
= 3.0V; V
I
= V
IH
or V
IL
; I
O
= 100
A
V
CC
*
0.2
V
CC
V
V
OH
HIGH level output voltage
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 12mA
V
CC
*
0.6
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 24mA
V
CC
*
1.0
V
CC
= 2.7V; V
I
= V
IH
or V
IL
; I
O
= 12mA
0.40
V
OL
LOW level output voltage
V
CC
= 3.0V; V
I
= V
IH
or V
IL
; I
O
= 100
A
0.20
V
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
I
O
= 24mA
0.55
I
Input leakage current
V
CC
= 3 6V; V = 5 5V or GND
Not for I/O pins
"
0 1
"
5
A
I
I
Input leakage current
V
CC
= 3.6V; V
I
= 5.5V or GND
Not for I/O pins
"
0.1
"
5
A
I
IHZ
/I
ILZ
Input current for common I/O pins
V
CC
= 3.6V; V
I
= V
CC
or GND
"
0.1
"
15
A
I
OZ
3-State output OFF-state current
V
CC
= 3.6V; V
I
= V
IH
or V
IL
; V
O
= V
CC
or GND
0.1
"
10
A
I
CC
Quiescent supply current
V
CC
= 3.6V; V
I
= V
CC
or GND; I
O
= 0
0.1
10
A
I
CC
Additional quiescent supply current
V
CC
= 2.7V to 3.6V; V
I
= V
CC
0.6V; I
O
= 0
5
500
A
NOTES:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25
C.
Philips Semiconductors
Product specification
74LVC377
Octal D-type flip-flop with data enable;
positive-edge trigger
1998 Jul 29
5
AC CHARACTERISTICS
GND = 0V; t
r
= t
f
= 2.5ns; C
L
= 50pF; R
L
= 500
; T
amb
= 40
C to +85
C.
LIMITS
SYMBOL
PARAMETER
WAVEFORM
V
CC
= 3.3V
0.3V
V
CC
= 2.7V
UNIT
MIN
TYP
1
MAX
MIN
TYP
MAX
t
PHL
t
PLH
Propagation delay
CP to Qn
1
6.0
10.2
6.6
11.2
ns
t
W
Clock pulse width
HIGH or LOW
1
4
1.0
5
1.6
ns
t
su
Set-up time
E to CP
2
4
2.3
5
2.9
ns
t
h
Hold time
E to CP
2
0
2.2
0
2.8
ns
t
su
Set-up time
D
n
to CP
3
2
1.3
3
1.8
ns
t
h
Hold time
D
n
to CP
3
0
1.2
0
1.6
ns
f
max
Maximum clock
pulse frequency
1
125
100
MHz
NOTE:
1. Unless otherwise stated, all typical values are at V
CC
= 3.3V and T
amb
= 25
C.
AC WAVEFORMS
V
M
= 1.5V at V
CC
w
2.7V.
V
M
= 0.5 V
CC
at V
CC
t
2.7V.
V
OL
and V
OH
are the typical output voltage drop that occur with the output load.
VM
VM
1/fMAX
tw
tPHL
tPLH
CP INPUT
Qn OUTPUT
SW00078
GND
V
OH
V
OL
V
I
Waveform 1. Clock (CP) to output (Qn) propagation delays the
clock pulse width and the maximum clock pulse frequency.
SY00061
NOTE: The shaded areas indicate when the input is permitted to change
for predictable output performance.
V
M
t
h
t
h
V
CC
E Input
GND
V
M
t
su
t
su
STABLE
t
su
t
h
V
M
t
W
V
CC
V
CC
D
n
Input
CP Input
GND
GND
Waveform 2. Data set-up and hold times from the data input
(Dn) and from the enable
input (E) to the clock (CP).
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