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Электронный компонент: NE83Q92A20

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Philips Semiconductors
Product specification
NE83Q92
Low-power coaxial Ethernet transceiver
1
1995 May 1
853-1737 15180
DESCRIPTION
The NE83Q92 is a low power BiCMOS coaxial transceiver interface
(CTI) for Ethernet (10base5) and Thin Ethernet (10base2) local area
networks. The CTI is connected between the coaxial cable and the
Data Terminal Equipment (DTE) and consists of a receiver,
transmitter, receive-mode collision detector, heartbeat generator and
jabber timer (see Block Diagram). The transmitter output connects
directly to a doubly terminated 50
cable, while the receiver output,
collision detector output and transmitter input are connected to the
DTE through isolation transformers. Isolation between the CTI and
the DTE is an IEEE 802.3 requirement that can be met on signal
lines by using a set of pulse transformers. Power isolation for the
CTI is achieved using DC-to-DC conversion through a power
transformer (see Figure 1, Connection Diagram).
The part is fully pin compatible with the industry standard 8392, but
has substantially lower current consumption, is fully compliant with
the IEEE802.3 standard, and has additional features such as
optional pull-down resistors (Figure 1, Note 4), and automatic
selection between AUI and coaxial connections.
The NE83Q92 is manufactured on an advanced BiCMOS process
and is available with PLCC and SOL packages which make it ideally
suited to lap-top personal computers or systems where low power
consumption, limited board space and jumperless design is
required. Refer to selection flow chart for optimal apllication.
FEATURES
Fully compliant with Ethernet II, IEEE 802.3 10BASE-5 and
10BASE-2, and ISO 8802/3 interface specifications
100% drop-in compatible with industry standard 8392 sockets
(N & A options)
Optimal implementation can use 1 Watt DC-DC converter and
reduces external part count by not requiring external pull-down
resistors
High efficiency AUI drivers automatically power-down under idle
conditions to minimize current consumption
Automatically disables AUI drivers when no coaxial cable is
connected, allowing hard-wiring of AUI connection and
local/integrated CTI connection
Smart squelch on data inputs eliminates false activations
Advanced BiCMOS process for extremely low power operation
Available in 16-pin DIP, 16-pin SOL and both 20- and 28-pin
PLCC packages
Expanded version (NE83Q93) with 5 LED status drivers is
available for repeater and advanced system applications
Full ESD protection
Power-on reset prevents glitches on coaxial cable
PIN CONFIGURATION
CD+ 1
CD 2
RX+ 3
VEE
4
VEE
5
RX 6
TX+ 7
TX 8
16 CDS
15 TXO
14 RXI
13 VEE
12 RR
11 RR+
10 GND
9 HBE
D, N Packages
1
2
3
4
5
6
7
8
9
10
11
12 13
14 15 16 17 18
19
20
21
22
23
24
25
26
27
28
V
EE
V
EE
V
EE
V
EE
V
EE
V
EE
V
EE
V
EE
V
EE
V
EE
V
EE
V
EE
RR
RX+
CD
CD+
CDS
TXO
N/C
RXI
RX
TX+
TX
HBE
GND
GND
RR+
A Packages
VEE
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CD
CD+
CDS
TXO
N/C
RXI
V
EE
V
EE
RR
RR+
TX+
TX
HBE
GND
GND
RX+
RX
V
EE
V
EE
V
EE
SD00302
ORDERING INFORMATION
DESCRIPTION
TEMPERATURE RANGE
ORDER CODE
DWG #
16-Pin Plastic Dual In-Line Package (DIP)
0 to +70
C
NE83Q92N
SOT28-4
16-Pin Plastic Small Outline Large (SOL) Package
0 to +70
C
NE83Q92D
SOT162-1
20-Pin Plastic Leaded Chip Carrier (PLCC) Package
0 to +70
C
NE83Q92A20
SOT380-1
28-Pin Plastic Leaded Chip Carrier (PLCC) Package
0 to +70
C
NE83Q92A
SOT261-3
Philips Semiconductors
Product specification
NE83Q92
Low-power coaxial Ethernet transceiver
1995 May 1
2
PIN DESCRIPTIONS
PIN NO.
N PKG
PIN NO.
PLCC-20
PIN NO.
PLCC-28
SYMBOL
DESCRIPTION
1
2
2
3
2
3
CD+
CD
Collision Outputs. Balanced differential line driver outputs which send a 10MHz signal to the
DTE in the event of a collision, jabber interrupt or heartbeat test. External pull-down resistors
are optional.
3
6
4
8
4
12
RX+
RX
Receiver Outputs. Balanced differential line driver outputs which send the received signal to
the DTE. External pull-down resistors are optional.
7
8
9
10
13
14
TX+
TX
Transmitter Inputs. Balanced differential line receiver inputs which accept the transmission
signal from the DTE and apply it to the coaxial cable at TXO, if it meets Tx squelch threshold.
9
12
15
HBE
Heartbeat Enable. The heartbeat function is disabled when this pin is connected to V
EE
and
enabled when connected to GND or left floating.
11
12
14
15
18
19
RR+
RR
External Resistor. A 1k
(1%) resistor connected between these pins establishes the
signaling current at TXO.
14
18
26
RXI
Receiver Input. This pin is connected directly to the coaxial cable. Received signals are
equalized, amplified, and sent to the DTE through the RX
pins, if it meets Rx squelch
threshold.
15
19
28
TXO
Transmitter Output. This pin is connected directly (Thin Ethernet) or through an external
isolating diode (Ethernet) to the coaxial cable.
16
20
1
CDS
Collision Detect Sense. Ground sense connection for the collision detection circuitry. This
pin should be connected directly to the coaxial cable shield for standard Ethernet operation.
10
11
13
16
17
GND
Positive Supply Pin.
4
5
13
5 7
16 17
5 to 11
20 to 25
V
EE
Negative supply pins.
1
N/C
Not used.
NOTE:
1. The IEEE 802.3 name for CD is CI; for RX is DI; for TX is DO.
Philips Semiconductors
Product specification
NE83Q92
Low-power coaxial Ethernet transceiver
1995 May 1
3
RECEIVER
ACDC SQUELCH
TRANSMITTER
TRANSMITTER
SQUELCH
COLLISION
COMPARATOR
&
HEARTBEAT
GENERATOR
JABBER
TIMER
RECEIVER
EQUALIZER
4POLE BESSEL
LOW PASS FILTER
SENSE
BUFFER
10MHz
OSC
LINE
DRIVER
COAX
CABLE
BUFFER
LINE
DRIVER
HEARTBEAT ENABLE
COLLISION
PAIR
(CD+, CD)
TRANSMIT
PAIR
(TX+, TX)
RECEIVE
PAIR
(RX+, RX)
DTE
INTERFACE
RXI
TXO
CDS
SD00274
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
RATING
UNIT
V
EE
Supply voltage
1
12
V
V
IN
Voltage at any input
1
0 to 12
V
T
STG
Storage temperature range
65 to +150
C
T
SOLD
Lead soldering temperature (10sec.)
+300
C
T
J
Recommended max junction temperature
2
+150
C
JA
Thermal impedance (N and A packages)
60
C/W
NOTE:
1. 100% measured in production.
2. The junction temperature is calculated from the following expression:
T
J
= T
A
+
JA
[(V
EE
x 0.015 x n
IDL
) + (V
EE
x 0.027 x n
RX
) + (V
EE
x 0.075 x n
TX
)]
where
T
A
= Ambient temperature in
C.
JA
= Thermal resistance of package.
V
EE
= Normal operating supply voltage in volts.
n
IDL
= Percentage of duty cycle idle
n
RX
= Percentage of duty cycle receiving
n
TX
= Percentage of duty cycle transmitting
Philips Semiconductors
Product specification
NE83Q92
Low-power coaxial Ethernet transceiver
1995 May 1
4
ELECTRICAL CHARACTERISTICS
V
EE
= 9V
6%; T
A
= 0
C to +70
C unless otherwise specified
1,2
. No external isolation
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
UVL
Under voltage lockout. Transceiver disabled for
|V
EE
| < |V
UVL
|
7.5
V
I
EE
Supply current idle
15
20
mA
I
EE
Supply current transmitting (without collision)
Without external
pull-down resistors
80
90
mA
I
RXI
Receive input bias current
V
RXI
= 0V
2
+25
A
I
CDS
Cable sense input bias current
V
CDS
= 0V
+1
+3
A
V
IH
HBE input HIGH voltage
V
EE
+2.4
V
V
IL
HBE input LOW voltage
V
EE
+1.6
V
I
IH
HBE input HIGH current
V
HBE
= 0V
+10
A
I
IL
HBE input LOW current
V
HBE
= V
EE
30
A
I
TDC
Transmit output DC current level
3
37
45
mA
I
TAC
Transmit output AC current level
3
28
I
TDC
mA
I
TX10
Transmit current
V
TXO
= 10V
250
+250
A
V
TCOM
Transmitter output voltage compliance
4
3.7
V
V
CD
Collision threshold
5
Measured by applying
DC voltage at RXI
(CDS = 0V)
1450
1530
1580
mV
V
DIS
AUI disable voltage at RXI
Measured as DC
voltage at RXI
3.5
V
V
OD
Differential output voltage non idle at RX+ and
CD
6
600
1100
mV
V
OB
Differential output voltage imbalance idle at
RX
and CD
7
40
mV
V
OC
Output common mode voltage at RX
and CD
RXI = 0V
4.0
5.5
7.0
V
V
RS
Receiver squelch threshold
V
RXI
average DC
(CDS = 0V)
150
250
350
mV
V
TS
Transmitter squelch threshold
(V
TX+
V
TX
) peak
175
225
275
mV
R
RXI
Shunt resistance at RXI nontransmitting
100
k
C
RXI
Input capacitance at RXI
8
1
2
pF
R
TXO
Shunt resistance at TXO transmitting
7.5
10
k
R
AUIZ
Differential impedance at RX
and CD
with no
coaxial cable connected
6
k
R
TX
Differential impedance at TX
20
k
NOTES:
1. Currents flowing into device pins are positive. All voltages are referenced to ground unless otherwise specified. For ease of interpretation,
the parameter limit that appears in the MAX column is the largest value of the parameter, irrespective of sign. Similarly, the value in the MIN
column is the smallest value of the parameter, irrespective of sign.
2. All typical values are for V
EE
= 9V and T
A
= 27
C.
3. I
TDC
is measured as (V
MAX
+ V
MIN
)/(2 x 25) where V
MAX
and V
MIN
are the max and min voltages at TXO with a 25
load between TXO and
GND. I
TAC
is measured as (V
MAX
V
MIN
)/(2 x 25).
4. The TXO pin shall continue to sink at least I
TDC
min when the idle (no signal) voltage on this pin is 3.7V.
5. Collision threshold for an AC signal is within 5% of V
CD
.
6. Measured on secondary side of isolation transformer (see Connection Diagram, Figure NO TAG). The transformer has a 1:1 turns ratio with
an inductance between 30 and 100
H at 5MHz.
7. Measured as the voltage difference between the RX pins or the CD pins with the transformer removed.
8. Not 100% tested in production.
Philips Semiconductors
Product specification
NE83Q92
Low-power coaxial Ethernet transceiver
1995 May 1
5
TIMING CHARACTERISTICS
V
EE
= 9V +6%; T
A
= 0 to 70
C, unless otherwise specified
1
. No external isolation diode on TXO.
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
t
RON
Receiver start up delay RXI to RX
(Figure 3)
First received bit on RX
V
RXI
= 2V peak
3
5
bits
First validly timed bit on RX
t
RON
+2
bits
t
RD
Receiver prop. delay RXI to RX
V
RXI
= 2V peak
20
50
ns
t
RR
Differential output rise time on RX
and CD
2,3
5
7
ns
t
RF
Differential output fall time on RX
and CD
2,3
5
7
ns
t
OS
Differential output settling time on RX
and CD
to V
OB
= 40mV
2
(see Figure 4)
1
s
t
RJ
Receiver and cable total jitter
2
6
ns
t
RHI
Receiver high to idle time
Measured to +210mV
200
850
ns
t
RM
Rise and fall time matching on RX+ and CD+
5
t
RF
t
RR
0.1
2
ns
t
TST
Transmitter startup delay TX
to TXO (Fig. 5)
First transmitted bit on TXO
V
TX
+ = 1V peak
1
2
bits
First validly timed bit
t
TST
+ 2
bits
t
TD
Transmitter prop delay TX
to TXO
(see Figure 5)
V
TX
+ = 1V peak
5
20
50
ns
t
TR
Transmitter rise time 10% to 90% (see Figure 5)
20
25
30
ns
t
TF
Transmitter fall time 10% to 90% (see Figure 5)
20
25
30
ns
t
TM
t
TF
t
TR
mismatch
5
0
2
ns
t
TS
Transmitter added skew
4,5
0
2
ns
t
TON
Transmitter turn on pulse width (see Figure 5)
V
TX
= 1V peak
10
35
ns
t
TOFF
Transmitter turn off pulse width (see Figure 5)
V
TX
+ = 1V peak
125
200
ns
t
CON
Collision turn on delay (see Figure 6)
0V to 2V step at RXI
13
bits
t
COFF
Collision turn off delay (see Figure 6)
2V to 0V step at RXI
16
bits
t
CHI
Collision high to idle time (see Figure 6)
Measured to +210mV
200
850
ns
f
CD
Collision frequency (see Figure 6)
8.5
10
11.5
MHz
t
CP
Collision signal pulse width (see Figure 6)
35
70
ns
t
HON
Heartbeat turn on delay (see Figure 7)
0.6
1.6
s
t
HW
Heartbeat test duration (see Figure 7)
0.5
1.5
s
t
JA
Jabber activation delay measured from TX
to
CD
(see Figure 8)
20
60
ms
t
JR
Jabber reset delay measured from TX
to CD
(see Figure 8)
250
650
ms
NOTES:
1. All typical values are for V
EE
= 9V and T
A
= 27
C.
2. Measured on secondary side of isolation transformer (see Figures NO TAG and 1, Connection Diagram). The transformer has a 1:1 turn
ratio with an inductance between 30 and 100
H at 5MHz.
3. The rise and fall times are measured as the time required for the differential voltage to change from 225mV to +225mV, or +225mV to
225mV, respectively.
4. Difference in propagation delay between rising and falling edges at TXO.
5. Not 100% tested in production.
Philips Semiconductors
Product specification
NE83Q92
Low-power coaxial Ethernet transceiver
1995 May 1
6
FUNCTIONAL DESCRIPTION
The NE83Q92 is a low power BiCMOS coaxial Ethernet transceiver
which complies with the IEEE 802.3 specification and offers the
following features:
1. Low current consumption of typically 15mA when idle and 80mA
while transmitting (without collision) allows smaller DC-DC
converter to be used for the isolated power supply, (no external
pull-down resistors).
2. Automatic selection between AUI cable and coaxial connections
by placing the AUI outputs in a high impedance state when the
coaxial cable is disconnected. This eliminates the need for
changing a jumper position on the Ethernet board when selecting
either Thin Ethernet or remote transceiver connections.
3. High efficiency AUI drivers for the RX
and CD
ports
automatically power down when idling and are powered-up when
a receive signal is detected. This is very important/useful for
power sensitive applications such as lap-top computers or
PCMCIA cards.
4. The NE83Q92 advanced AUI driver (RX
and CD
) design
requires no external pull-down resistors (500
) to drive a
terminated (78
) AUI cable and still meets the IEEE 802.3
specification. The drivers will also operate correctly if external
resistors are present, so that they can be retro-fitted into existing
8392 designs. However, an extra current of 7mA/output (for
500
resistors) would be generated, by these resistors,
regardless of whenther the transceiver is idle or responding to
traffic.
Receiver Functions
The receiver consists of an input buffer, a cable equalizer, a 4-pole
Bessel low pass filter, a squelch circuit and a differential line driver.
The buffer provides high input resistance and low input capacitance
to minimize loading and reflections on the coaxial cable.
The equalizer is a high pass filter that compensates for the low pass
effect of the coaxial cable and results in a flatband response over all
signal frequencies to minimize signal distortion.
The 4-pole Bessel low pass filter extracts the average DC voltage
level on the coaxial cable for use by the receiver squelch and
collision detection circuits.
The receiver squelch circuit prevents noise on the coaxial cable
from falsely triggering the receiver in the absence of a true signal.
At the beginning of a packet, the receiver turns on when the DC
level from the low pass filter exceeds the DC squelch threshold and
the received packet has started with a 01 bit sequence with
acceptable timing parameters. For normal signal levels this will take
less than 500ns, or 5 bits. However, at the end of a packet, a fast
receiver turn off is needed to reject both dribble bits on the coaxial
cable and spurious responses due to settling of the on-chip
bandpass filter. This is accomplished by an AC timing circuit that
disables the receiver if the signal level on the coaxial cable remains
high for typically 250ns and only enables the receiver again after
approximately .5
s. Figures 3 and 4 illustrate receiver timing.
The differential line drivers provide typically +900mV signals to the
DTE with less than 7ns rise and fall times. When in idle state (no
received signal) their outputs provide <20mV differential voltage
offset to minimize DC standing current in the isolation transformer.
Transmitter Functions
The transmitter has differential inputs and an open collector current
driver output. The differential input common mode voltage is
established by the CTI and should not be altered by external
circuitry. Controlled rise and fall times of 25ns (
5ns) minimize
higher harmonic components in the transmitted spectrum, while
matching of these rise and fall times to typically 2ns minimizes
signal jitter. The drive current levels of the CTI are set by an on-chip
bandgap voltage reference and an external 1% resistor. An on-chip
isolation diode is provided to reduce the transmitter's coaxial cable
load capacitance. For Thin Ethernet applications, no further external
isolation diode is required, since the NE83Q92 meets the capacitive
loading specifications. For Ethernet applications a further external
diode should be added to reduce loading capacitance.
The transmitter squelch circuit ensures that the transmitter can only
be enabled if the transmitted packet begins with a 01 bit sequence
where the negative-going differential signals are typically greater
than 225mV in magnitude and 25ns in duration.
The transmitter will be disabled at the end of a packet if there are no
negative going signals of greater than 225mV for more than typically
150ns. Figure 5 illustrates transmitter timing.
Collision Functions
The collision detection scheme implemented in the NE83Q92 is
receive mode detection, which detects a collision between any two
stations on the network with certainty at all times, irrespective of
whether or not the local DTE is producing one of the colliding
signals. This is the only detection scheme allowed by the IEEE
802.3 standard for both repeater and non-repeater nodes.
The collision circuitry consists of the 4-pole Bessel low pass filter, a
comparator, a precision voltage reference that sets up the collision
threshold, a heartbeat generator, a 10MHz oscillator, and a
differential line driver.
The collision comparator monitors the DC level at the output of the
low pass filter and enables the line driver if it is more negative than
the collision threshold. A collision condition is indicated to the DTE
by a 10MHz oscillation signal at the CD outputs and typically occurs
within 700ns of the onset of the collision. The collision signal begins
with a negative-going pulse and ends with a continuous high-to-idle
state longer than 170ns. Figure 6 illustrates collision timing.
At the end of every transmission, the heartbeat generator creates a
pseudo collision to ensure that the collision circuitry is properly
functioning. This pseudo collision consists of a 1
s burst of 10MHz
oscillation at the line driver outputs approximately 1
s after the end
of the transmission. The heartbeat function can be disabled
externally by connecting the HBE (heartbeat enable) to V
EE
. This
allows the CTI to be used in repeater applications. Figure 7
illustrates heartbeat timing.
Jabber Functions
The jabber timer monitors the transmitter and inhibits transmission if
it is active for longer than typically 30ms. The jabber circuit then
enables the collision outputs for the remainder of the data packet
and for typically 450ns (unjab time) after it has ended. At this point
the transmitter becomes uninhibited. Figure 8 illustrates jabber
timing.
Philips Semiconductors
Product specification
NE83Q92
Low-power coaxial Ethernet transceiver
1995 May 1
7
Power-On Reset/Under Voltage Lockout/AUI
Selection
The transmit and receive squelch circuits of the NE83Q92 remain
active if the absolute value of V
EE
is less than the threshold for
under voltage lockout, V
UVL
. This prevents glitches from appearing
on either the AUI or coaxial cable during power up and power down.
There is no collision announcement during power up and the
transceiver waits for 400ms before becoming enabled.
If RXI is disconnected from the coaxial cable after power up, its
voltage will fall towards V
EE
. If the absolute value of this voltage
exceeds the AUI disable voltage, V
DIS
, for longer than 800ms, the
transmit and receive squelch circuits remain active and, in addition,
the AUI drivers become high impedance. This permits AUI
connections to be hard wired together, e.g., the coaxial transceiver
and a 10BASE-T transceiver, with the signal path determined by
which transceiver is connected to its external cable.
There is a 400ms collision announcement on disconnecting RXI, but
there is no announcement on re-connection. This feature can be
disabled by pulling RXI up with a 200k
to ground.
Detection of Coaxial Cable Faults
In the NE83Q92 there is no internal loopback path from the TX
inputs to the RX outputs. This means that, when the local DTE is
transmitting, the signal will only be present at the receiver outputs
RX+ and RX if it appears on the coaxial cable and is larger than
the receiver squelch threshold V
RS
. If a short circuit fault condition
occurs at the cable connector to the CTI, then no signal will appear
at the receiver outputs.
In the case of an open circuit at the coaxial cable connector there
will also be no signal at the receiver outputs due to the AUI disabling
mode of the NE83Q92. However, a heartbeat signal will be present
following a transmission attempt for the short circuit condition, but
not for the open circuit.
A coaxial cable with only a single 50
termination will generate a
collision not only at every transmission attempt, but also for every
reception attempt due to the receive mode collision detection of the
NE83Q92.
CD+
CD
RX+
VEE
VEE
RX
TX+
TX
HBE
GND
RR+
VEE
RXI
TXO
CDS
RR
500
500
500
500
+
9V (ISOLATED)
DC TO DC
CONVERTER
<200mA
78
TRANSMIT
PAIR
RECEIVE
PAIR
COLLISION
PAIR
12 TO 15V DC
1k
1%
(NOTE 2)
NOTES:
1. T1 is a 1:1 pulse transformer, with an inductance of 30 to 100
H.
2. IN916 or equivalent for Ethernet, not required for Thin Ethernet.
3. 78
resistors not required if AUI cable not present.
4. Not required for optimal integrated/local MAU application (No AUI cable, see Note 3), minimum current consumption.
5. Install 200k
to disable the 400ms collision announcement when disconnecting cable.
78
78
NE83C92
CTI
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1
2
4
5
7
8
16
15
13
12
10
9
T1 (NOTE 1)
COAX
DTE
AUI
CABLE
(NOTE 3)
SD00309
(NOTE 4)
200k
(NOTE 5)
Figure 1. Connection Diagram for Standard 8392 Applications
Philips Semiconductors
Product specification
NE83Q92
Low-power coaxial Ethernet transceiver
1995 May 1
8
SERIAL
NETWORK
INTERFACE
NETWORK
INTERFACE
CONTROLLER
I
S
O
L
A
T
I
O
N
DTE
COAX
B
U
S
NE83Q92
COAX
TRANSCEIVER
INTERFACE
MAU
(OPTIONAL)
(AUI CABLE)
MAU = Medium Attachment Unit
AUI Cable = Attachment Unit Interface Cable (not used in Thin Ethernet applications)
SD00307
Figure 2. Interface Diagram for Ethernet/Thin Ethernet Local Area Network
10%
tRD
tRR
90%
tRON+2
tRON
PHASE VIOLATION
ALLOWED
VALID
TIMING
RXI
RX
+
1
2
3
4
5
6
7
8
9
10
11
5
6
7
8
9
10
11
tTR
tRF
tTF
SD00306
Figure 3. Receiver Timing
tOS
RXI
RX
+
tRHI
SD00279
Figure 4. Receiver EndofPacket Timing
10%
90%
tTD
tTON
tTST+2
tTST
tTOFF
TX
+
TXO
100ns
1
2
3
4
5
6
7
8
9
10
11
1
2
3
4
5
6
7
8
9
10
11
tRR
tTR
tRF
tTF
SD00305
Figure 5. Transmitter Timing
Philips Semiconductors
Product specification
NE83Q92
Low-power coaxial Ethernet transceiver
1995 May 1
9
tCON
tCP
RXI
CD+
tCOFF
tCHI
1/FCD
2V
0V
SD00280
Figure 6. Collision Timing
TX
+
CD
+
tHON
tHW
SD00281
Figure 7. Heartbeat Timing
TX
+
CD
+
tJA
tJR
TXO
SD00282
Figure 8. Jabber Timing