1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

CONTENTS

FEATURES

1.1

Servo control

1.2

Motor control

1.2.1

Spindle motor driver

1.2.2

Voice coil motor driver

1.3

Miscellaneous items

APPLICATIONS

GENERAL DESCRIPTION

3.1

Overview

3.2

Servo controller

3.3

Spindle and voice coil motor

3.4

Safety functions

QUICK REFERENCE DATA

ORDERING INFORMATION

BLOCK DIAGRAMS

PINNING

FUNCTIONAL DESCRIPTION

8.1

Serial interface

8.2

Commutation and sleep mode

8.3

Commutation control

8.3.1

Blanks, Watchdog and Start-up delays

8.3.2

Comdelim delay

8.4

10-bit ADC with 7 analog inputs

8.4.1

Input channels

8.4.2

Input ranges

8.4.3

Conversion modes

8.4.4

Programming register#0

8.4.5

Converter clock frequency values

8.5

10-bit VCM DAC

8.6

Reference voltage

8.7

Stand-alone op-amps

8.8

Analog switch

8.9

Charge pump voltage

8.10

Spindle driver

8.11

VCM driver

8.12

Park the VCM

8.13

Precharge the VCM

8.14

Brake the motor

8.15

Power-on reset

8.16

Thermal monitor and shutdown

8.17

Power supply isolation

8.17.1

External isolation diode

8.17.2

External power FET

8.18

Thermal behaviour

LIMITING VALUES

HANDLING

THERMAL CHARACTERISTICS

CHARACTERISTICS

APPLICATION INFORMATION

PACKAGE OUTLINE

SOLDERING

15.1

Introduction

15.2

Reflow soldering

15.3

Wave soldering

15.4

Repairing soldered joints

DEFINITIONS

LIFE SUPPORT APPLICATIONS

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

FEATURES

1.1

Servo control

�

10-bit VCM Digital-to-Analog Converter (DAC)

�

7-channel 10-bit Analog-to-Digital Converter (ADC)

�

Programmable spindle commutation control logic

�

3-wire serial interface

�

Two stand-alone operational amplifiers (op-amps) with
outputs connected to the ADC

�

Analog multiplexer with two inputs used to select VCM
seek mode or track-following mode.

1.2

Motor control

1.2.1

PINDLE MOTOR DRIVER

�

3-phase output motor driver

�

1.9 A maximum available start-up current

�

Total R

ds(on)

= 0.6

(typical) at 25

�

Back ElectroMotive Force (BEMF) processing for
sensorless motor commutation

�

Linear current control

�

External current sense resistor

�

External current control loop compensation

�

Adjustable slew rate control

�

Short-circuit brake

�

Adjustable brake-after-park delay time.

1.2.2

OICE COIL MOTOR DRIVER

�

1.5 A maximum current capability

�

Total R

ds(on)

= 0.8

(typical) at 25

�

Linear class AB output with low cross-over distortion
delay

�

Precision current control loop with external current
sense resistor

�

Programmable seek and track-following mode with
adjustable current loop gain

�

External current control loop compensation

�

Precharge during brake mode

�

20 kHz current control loop bandwidth

�

Parking function

�

Adjustable park voltage with limiter.

1.3

Miscellaneous items

�

Precision low voltage 5 and 12 V power monitor with
hysteresis

�

Precision internal voltage reference for servo and power
control circuits

�

Thermal sense circuit with over-temperature shutdown
sensor

�

Internal charge pump voltage generator

�

Automatic brake-after-park at power-down, thermal
shutdown or sleep mode

�

Sleep mode: low power consumption mode.

APPLICATIONS

�

12 V hard disk drive products.

GENERAL DESCRIPTION

3.1

Overview

The OM5193H is a combination of a voice coil motor and
a spindle motor driver with embedded servo controller
designed for use in disk drives. Configuration and control
registers are set via a 3-wire serial port running up to
30 MHz to interface commonly to a microcontroller or a
digital signal processor.

The device operates at 5 and 12 V power supplies and
integrates safety functions such as power stages
overvoltage protection, power and temperature monitor,
over-temperature shutdown and dynamic
brake-after-park.

The device is contained in a QFP80 package with 18 pins
connected to the leadframe thus providing low thermal
resistance.

3.2

Servo controller

The servo controller includes the following circuits:

�

3-wire serial interface

�

Spindle commutation logic

�

A 10-bit ADC with 7 inputs selected by an internal
multiplexer

�

A 10-bit VCM DAC with 1.5, 2.5 and 3.5 V voltage
references

�

Two low-offset stand-alone op-amps

�

Analog multiplexer with 2 inputs.

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

The serial interface is used:

�

To adjust the timing parameters for proper spindle
commutation sequence

�

To accurately adjust head positioning via the 10-bit VCM
DAC

�

To set VCM seek or track-following mode via the
low-impedance switch

�

To select and process analog signals via a 7-channel
multiplexer connected to the 10-bit ADC.

The spindle commutation logic circuit ensures proper
spindle start-up (no reverse rotation) and commutation
sequence for the spindle driver by processing BEMF
sensing circuit output signals.

The two stand-alone op-amps, with the inputs connected
to the read channel IC, provide servo track signals
processed by the microcontroller to perform accurate
track-following mode.

3.3

Spindle and voice coil motor

The OM5193H drives a 3-phase brushless, sensorless DC
spindle motor and a voice coil motor.

Spindle and voice coil motor power stages with low R

ds(on)

and high current capability are suitable for mid-end and
low-end 12 V disk drives. Power stages are designed in
such a way that external Schottky diodes are not needed.

Spindle current is sensed by an external resistor and
monitored by the external signal SPCC (SPindle Current
Control). Spindle speed is regulated by the microcontroller
via the ZCROSS signal (Zero CROSSing detection
frequency output). BEMF comparators provide the digital
zero crossing signals. These are processed by the
commutation logic circuit to properly switch-on and
switch-off spindle power drivers thus ensuring the rotation
of the motor.

The control of the heads positioning is accomplished by
the internal 10-bit VCM DAC. Seek and track-following
VCM current loop gain is set by external resistors. VCM
zero current is referenced to the 2.5 V internal voltage
reference.

An internal precharge of the actuator (magnetic latch)
during brake mode guarantees total control of the current
when VCM starts running without current spikes.

3.4

Safety functions

The OM5193H is protected against transient voltage
spikes that are generated by the inductive loads of spindle
and VCM.

Power supplies and temperature are monitored in order to
guarantee data reliability and self-protection of the device
in case of power loss or temperatures beyond maximum
rating.

Park and brake functions secure heads and disk media in
case of power-down or high temperature failure. This
function is also activated by the sleep mode.

An internal temperature monitor is available to monitor the
chip temperature and thus prevents over-temperature
shutdown. Internally connected to the ADC channel 4, it
can be used by the microcontroller as an early
`temperature-too-high' warning during a long VCM seek
sequence.

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

BLOCK DIAGRAMS

Figures 1, 2, 3 and 4 provide block diagrams of the OM5193H servo and motor control (top level diagram, servo
controller, spindle motor driver and voice coil motor driver).

Fig.1 Block diagram, top level.

handbook, full pagewidth

MGM972

7-CHANNEL

10-BIT ADC

SERIAL

INTERFACE

COMMUTATION

LOGIC

POWER

STAGE

SPINDLE

CONTROL

CLAMP1

CLAMP

COMA
COMB
COMC

ACROSS
BCROSS
CCROSS

MOTA

MOTB

MOTC

SLEW

SPCCOUT

SPCC

MOTSENSE3

CLOCK

SCLOCK

PESAMPN

PESAMP

SCANTEST

VDDA1

VDDA2

AGND

SDATA

ZCROSS

MOTSENSE2

MOTSENSE1/

SPSENSEH

GNDS/SPSENSEL

CLAMP2

CLAMP3

SDEN

ADC[1]/DIFOUT

INTINN

0.5VDDA1

NIVCM

IVCM

CPOR

CHK12

CHK5

CAPY

BSTCP2

BSTCP1

SWITCHGATE

DGND

VDDD

PWRBIAS1

PWRBIAS2

HEATSINK

1, 4 to 7,

58 to 61, 64 to 67,

70, 75, 78 to 80

INTIN

30 31 32 33

34 40 42 41

ADC[0]/INTOUT

ADC[2]/SOUT

ADC[3]

ADC[4]/TEMP

ADC[5]

THERMAL
MONITOR

THERMAL

SHUTDOWN

VCM

SWITCH

VCM

CONTROL

POWER

STAGE

BANDGAP

CLAMP

10-BIT

VCM DAC

POWER-ON

RESET

CHARGE

PUMP

PARK AND BRAKE

TRACKFWSELECT

SEEKSELECT

DACOUT

REF2V5

VCMSENSEL

VCMSENSEH

VCMIN

GNDV

GNDVCM1

GNDVCM2

GNDVCM3

OM5193H

PARKVOLT

BRAKEDELAY

BRAKEADJH

BRAKEPOWER

POR

1998

Nov

Philips Semiconductors

Product specification

Disk drive spindle and VCM with

servo controller

OM5193H

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ndbook, full pagewidth

MGM975

VCM

DAC

BRAKE

AFTER

PARK

PRE

DRIVER

PRE

DRIVER

GND

12 V

GNDVCM1

GNDVCM2

CLAMP3

SWITCHGATE

CLAMP2

CLAMP1

NIVCM

VCMSENSEL

RVCMSENSE

VCMSENSEH

IVCM

GNDVCM3

ERROR

SENSE

ERROR

PARK

REF2V5

RPARKVOLT

RVCMCOMPRC

RFEEDBACK

CVCMCOMPRC

ERROR

master

slave

SWITCH

BANDGAP

Vref
(to spindle)

Ibrake

(to spindle)

VCM switch

TRACKFWSELECT

SEEKSELECT

DACOUT

PRECHARGE

POWER-DOWN

VCMIN

BRAKEPOWER

CBRAKEP

RBRAKED

CBRAKED

BRAKEADJH

BRAKEDELAY

PARKVOLT

ADC[2]/SOUT

GNDV

RVCMSEEK

RVCMTRACKFW

OM5193H

VCAPY

Fig.4 Block diagram, voice coil motor driver.

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

PINNING

SYMBOL

PIN

I/O

DESCRIPTION

HEATSINK

dissipation pin; internally connected to the leadframe

MOTSENSE1/SPSENSEH

analog I/O

sense line of the spindle/spindle sense amplifier input

MOTC

analog output

spindle motor power output

HEATSINK

dissipation pin; internally connected to the leadframe

HEATSINK

dissipation pin; internally connected to the leadframe

HEATSINK

dissipation pin; internally connected to the leadframe

HEATSINK

dissipation pin; internally connected to the leadframe

SWITCHGATE

analog output

isolation FET driver

analog input

centre tap of the spindle

CLAMP1

supply

power stage supply voltage

GNDS/SPSENSEL

ground

spindle ground connection/spindle sense amplifier ground

SLEW

analog input

spindle motor slope control

SPCC

analog input

spindle current control

SPCCOUT

analog input

compensation point of the spindle current control loop

DDA2

supply

12 V analog supply voltage

BSTCP1

analog I/O

booster capacitor 1

BSTCP2

analog I/O

booster capacitor 2

CAPY

analog output

DC-to-DC converter output (19 V)

POR

digital I/O

power-on reset signal; active LOW

DDD

supply

5 V digital supply voltage

SDEN

digital input

serial interface data enable; active LOW

SDATA

digital I/O

serial interface data line

SCLOCK

digital input

serial interface clock line

CLOCK

digital input

clock input

ZCROSS

digital output

zero crossing detection signal

SCANTEST

digital input

scantest mode control; at LOW-level in normal conditions

DGND

ground

servo digital ground

ADC[0]/INTOUT

analog I/O

ADC channel 0 input/output of the A2 amplifier

ADC[1]/DIFOUT

analog I/O

ADC channel 1 input/output of the A1 amplifier

ADC[2]/SOUT

analog I/O

ADC channel 2 input/VCM sense amplifier output

ADC[3]

analog input

ADC channel 3 input

ADC[4]/TEMP

analog I/O

ADC channel 4 input/temperature monitor, thermal shutdown

ADC[5]

analog input

ADC channel 5 input

DACOUT

analog output

10-bit VCM DAC output

PESAMPN

analog input

inverting input of the A1 amplifier.

PESAMP

analog input

non-inverting input of the A1 amplifier

INTINN

analog input

inverting input of the A2 amplifier

INTIN

analog input

non-inverting input of the A2 amplifier

AGND

ground

servo analog ground

REF2V5

analog output

2.5 V bandgap reference voltage

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

SEEKSELECT

analog input

input for the seek mode

TRACKFWSELECT

analog input

input for the track-following mode

VCMIN

analog input

VCM control input

DDA1

supply

5 V analog supply voltage

CPOR

analog input

set the POR delay time

CHK5

analog output

set the V

DDA1

POR threshold

CHK12

analog output

set the V

DDA2

POR threshold

BRAKEPOWER

analog input

brake power capacitor

BRAKEADJH

analog input

adjust current consumption during park mode

BRAKEDELAY

analog input

set the brake-after-park delay time

PARKVOLT

analog input

set the park voltage

VCMSENSEH

analog input

positive input of the VCM sense amplifier

VCMSENSEL

analog input

negative input of the VCM sense amplifier

GNDV

ground

VCM ground connection

CLAMP2

supply

power stage supply voltage

CLAMP3

supply

power stage supply voltage

PWRBIAS1

analog input

power stages isolation bias; externally connected to the clamp

HEATSINK

dissipation pin; internally connected to the leadframe

HEATSINK

dissipation pin; internally connected to the leadframe

HEATSINK

dissipation pin; internally connected to the leadframe

HEATSINK

dissipation pin; internally connected to the leadframe

IVCM

analog output

inverted output of the VCM (master stage)

GNDVCM3

ground

VCM power stage ground

HEATSINK

dissipation pin; internally connected to the leadframe

HEATSINK

dissipation pin; internally connected to the leadframe

HEATSINK

dissipation pin; internally connected to the leadframe

HEATSINK

dissipation pin; internally connected to the leadframe

GNDVCM2

ground

VCM power stage ground

NIVCM

analog output

non-inverted VCM output (slave stage)

HEATSINK

dissipation pin; internally connected to the leadframe

GNDVCM1

ground

VCM power stage ground

MOTA

analog output

spindle motor power output

MOTSENSE3

analog output

sense line of the spindle

MOTB

analog output

spindle motor power output

HEATSINK

dissipation pin; internally connected to the leadframe

MOTSENSE2

analog output

sense line of the spindle

PWRBIAS2

analog input

power stages isolation bias; externally connected to the clamp

HEATSINK

dissipation pin; internally connected to the leadframe

HEATSINK

dissipation pin; internally connected to the leadframe

HEATSINK

dissipation pin; internally connected to the leadframe

SYMBOL

PIN

I/O

DESCRIPTION

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

Fig.5 Pin configuration.

handbook, full pagewidth

OM5193H

MGM976

HEATSINK

PWRBIAS1

CLAMP3

HEATSINK

GNDVCM3

IVCM

HEATSINK

CLAMP2

GNDV

VCMSENSEL

VCMSENSEH

PARKVOLT

BRAKEDELAY

BRAKEADJH

BRAKEPOWER

CHK12

CHK5

CPOR

VDDA1

VCMIN

TRACKFWSELECT

SEEKSELECT

HEATSINK

SWITCHGATE

HEATSINK

MOTSENSE1/

SPSENSEH

MOTC

HEATSINK

CLAMP1

GNDS/SPSENSEL

SLEW

SPCC

SPCCOUT

VDDA2

BSTCP1

BSTCP2

CAPY

POR

VDDD

SDEN

SDATA

SCLOCK

CLOCK

ZCROSS

SCANTEST

DGND

ADC[0]/INTOUT

ADC[1]/DIFOUT

ADC[2]/SOUT

ADC[3]

ADC[4]/TEMP

ADC[5]

DACOUT

PESAMPN

PESAMP

INTINN

INTIN

AGND

REF2V5

HEATSINK

PWRBIAS2

MOTSENSE2

HEATSINK

MOTB

MOTSENSE3

MOTA

GNDVCM1

HEATSINK

NIVCM

GNDVCM2

HEATSINK

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

FUNCTIONAL DESCRIPTION

8.1

Serial interface

The serial interface is a 3-wire bidirectional port for writing
and reading data to and from the internal registers of the
OM5193H. Each read or write will be composed of 16 bits.
For data transfer SDEN is brought LOW, serial data is
presented at the SDATA pin, and a serial clock is applied
to the SCLOCK pin. After the SDEN pin goes LOW, the
first 16 pulses applied to the SCLOCK pin shift the data
presented at the SDATA pin into an internal shift register
on the rising edge of each clock pulse. An internal counter
prevents more than 16 bits from being shifted into the
register. The data in the shift register is latched when
SDEN goes HIGH. If less than 16 clock pulses are
provided before SDEN goes HIGH, the data transfer is
aborted.

All transfers are shifted into the serial port with the MSB
first. The first 4 bits of the transfer contain address and
instruction information. The MSB is the R/W bit which

determines if the transfer is a read (logic 1) or a
write (logic 0).

The remaining 3 bits determine the internal register to be
accessed. The other 12 bits contain the programming
data. In the read mode (R/W = 1), the OM5193H outputs
the register contents of the selected address. In the write
mode (R/W = 0), the OM5193H loads the selected register
with the data presented on the SDATA pin. During sleep
mode, the serial port remains active and register
programmed data is retained.

SCLOCK is driven by the microcontroller. When the
microcontroller drives the SDATA line, the data is valid on
the rising edge of SCLOCK. When the OM5193H is driving
the SDATA line (in read mode after the R/W bit and 3 bits)
the data is valid on the falling edge of SCLOCK.

SDEN marks the end of the serial transfer. When the
SDEN pin goes HIGH, the shift register data is latched into
the addressed register of the OM5193H.

Fig.6 Serial port timing information.

handbook, full pagewidth

MGM977

SDEN

D11

D10

direction

tst

tren

tsu

tex

thd

R/W

D11

D10

R/W

SDATA

SCLOCK

Write to the OM5193H

SDATA

Write to, then read from the OM5193H

write registers

read back data

send/receive data

address

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

Table 1

Timing information for the serial interface

Table 2

Writeable registers of the serial interface

Table 3

Readable registers of the serial interface

SYMBOL

PARAMETER

MIN.

MAX.

UNIT

clk

clock frequency

MHz

chip select to first active clock edge

clk

data to clock set-up time

clock to data hold time

time data line is driven after 5th negative clock

ren

time from positive clock for data line to be driven

rhd

receive data hold time

rsu

receive data set-up time

exW

last active clock to chip select; inactive on write

exR

last active clock to chip select; inactive on read

bpa

time between successive serial port accesses

clock cycles

REG

BITS

not used

opamp

Select_N

increm.

Channel

auto

Conv.

select

range

Select

test

Mode_N

not used

ADC MUX address

reverse

break

not

used

seek/

trackfw

not used

sleep_N

spindiv

manual

run/

stop

comC comB

comA

not used

DAC

(9)

DAC

(8)

DAC

(7)

DAC

(6)

DAC

(5)

DAC

(4)

DAC

(3)

DAC

(2)

DAC

(1)

DAC

(0)

not used

Watchdog

Blank 1

high

Clock_N

Comdelim

Start-up

Blank 2

REG

BITS

ADC

status

ADC

(9)

ADC

(8)

ADC

(7)

ADC

(6)

ADC

(5)

ADC

(4)

ADC

(3)

ADC

(2)

ADC

(1)

ADC

(0)

Ccross

Bcross

Across

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

Table 4

Address of registers

R/W

REG.

DESCRIPTION

ADC channel and programmable options

ADC status and value

commutation, sleep, and VCM switch controls

commutation state in manual mode

10-bit DAC

not used

Blank 1 and Watchdog delays

commutation delay limit (11 bits), internal clock divider factor

Start-up and Blank 2 delays

8.2

Commutation and sleep mode

Spindle control and sleep mode are controlled by writing or
reading on register#1.

�

Register#1 (0, 1 and 2) control the spindle
commutations in manual mode when run/stop, manual
and sleep bits are correctly set. The commutation
sequence is described in Section "Spindle driver" (see
also Table 16 and Fig.12).

�

Register#1 (3) is the run/stop bit. After the power is
turned on and POR is HIGH, the motor will not start
spinning until register#1 (3) has been set to logic 1.
The motor stops spinning when this bit is set to logic 0.

�

Register#1 (4) is the manual commutation mode bit.
When this bit is set to logic 1 and register#1 (3) set to
logic 1, the commutation logic in the OM5193H will be
disabled so that the spindle will not automatically go to
the next commutation.

When register#1 (3 and 4) are set to logic 1, the
microcontroller is expected to generate the different
commutation states for the motor. The OM5193H will
still provide the coil status which will be available by
reading register#1. The different waveforms are shown
in Section "Spindle driver" (see also Fig.12). Note that
depending on the coil status acquisition moment,
transient states (due to the flyback pulses) can be read.

When register#1 (4) is set to logic 0, the manual mode
is disabled and the OM5193H will automatically
commutate the motor each time a zero crossing is
detected. The time between the zero crossing and the
next commutation is half the time between the two
preceding zero crossings. This is explained in the
detailed description in Section "Commutation control".

�

Register#1 (5) is the spindiv bit. This bit together with
register#6 (11) enables the selection of a divider factor
for both converter clock and spindle clock. Clock
configurations are described in Section "Commutation
control" (see also Table 6).

�

Register#1 (6) is the sleep mode bit. When it is set to
logic 0, the OM5193H will enter the low power mode.
Then the commutation control generates (101) output
codes on commutation signals to set spindle and VCM
head into sleep mode. This causes the OM5193H to go
into the brake-after-park mode. The only operating
circuits are the power monitor, the voltage reference
generator, the VCM precharge circuit and the serial
interface. The OM5193H is in sleep mode when POR is
LOW.

When the power is first turned on, the POR signal goes
HIGH after the POR delay. The OM5193H is then
automatically set in sleep mode and thus in low power
consumption mode. The VCM DAC output is in
high-impedance mode, the spindle is in the brake mode
and the VCM is in the precharge mode. Only after POR
is HIGH and register#1 (6) is set to logic 1, OM5193H is
ready to be functional. When register#1 (6) goes HIGH,
the VCM DAC outputs the 2.5 V reference voltage.

�

Register#1 (11) is dedicated to brake the spindle motor
without going in `brake-after-park' mode.
The commutation sequence is shifted in order to
efficiently brake the motor. This brake, called reverse
brake, is activated when register#1 (11) bit is set to
logic 1. Note that there is no action on the VCM input
signal when the reverse brake is used. When this bit is
set to logic 0, the spindle motor starts again with normal
spindle commutations.

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

Reading register#1 will read the state of the 3 coils coming
from the spindle control block (ACROSS, BCROSS and
CCROSS). The 3 input lines will be in bits 0, 1, and 2.
The different waveforms are shown in Section "Spindle

driver" (see also Fig.12). Note that depending on the coil
status acquisition moment, transient states (due to the
flyback pulses) can be read.

Table 5

Writing register#1

BIT

DEFAULT

VALUE

NAME

DESCRIPTION

comA

drives COMA when in manual commutation

comB

drives COMB when in manual commutation

comC

drives COMC when in manual commutation

run/stop

0 = motor to brake-after-park mode

1 = motor spinning; VCM active

manual

0 = automatic commutation mode with run/stop = 1

1 = manual commutation mode with run/stop = 1

spindiv

0 = the internal spindle clock frequency is controlled by register#6 (11)
(bit highClock_N)

1 = an additional divider by 4 is added on the internal spindle clock

sleep_N

0 = sleep mode: low power mode, serial interface active, power stages in
brake-after-park mode

1 = fully functional mode: sleep_N has higher priority than run/stop if both are
active

not used

seek/trackfw

0 = VCMIN connected to SEEKSELECT

1 = VCMIN connected to TRACKFWSELECT

not used

reverse break 1 = active brake control

0 = normal commutations as defined by bits above

8.3

Commutation control

The commutation logic block generates the six different
states to rotate the spindle motor. The spindle driver block
provides the BEMF zero crossing information.
The commutation block interprets the zero crossing
information and determines the commutation delay time
and the next coil state. The commutation block must take
into account the following situations:

�

Start-up

�

No start

�

Reverse rotating

�

Run

�

Manual commutation.

The commutation logic keeps the motor spinning by
commutating the motor after each detected zero crossing.
It measures the time between two successive BEMF zero
crossings and then determines the next commutation.
The delay (commutation delay) between a zero crossing
and the next commutation is half the time between the two
preceding zero crossings. The commutation delay
(Comdelim) can be limited to guarantee a faster lock after
the motor has gone out of lock. A maximum commutation
delay can be set via the serial port. The time is a function
of both the external clock frequency, the individual register
prescalers and the time programmed into the registers.
Figure 7 shows a typical motor commutation timing
diagram.

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

Fig.7 A typical motor commutation diagram.

handbook, full pagewidth

MGM978

centre tap

commutation

Blank 1

Zc1

Zc2

Zc3

flyback pulse

false zero crossings

true zero crossing

commutation

Commutation

delay

Blank 2

Start-up

Watchdog

�

Blank 1
After a commutation occurs, the leading edge of the
flyback pulse has a zero crossing (Zc

). Blank 1 timer is

used to ignore this zero crossing by masking it while the
timer initialized at Blank 1 value is counting. The state
associated to Blank 1 down-counter will end when the
counter reaches the zero value.

�

Blank 2
The Blank 2 timer starts counting as soon as the second
zero crossing occurs (Zc

). After the second flyback

pulse zero crossing, all extra zero crossings are ignored
during the Blank 2 time. This allows the ringing of the
coil voltage without causing a commutation advance.
The state associated to Blank 2 down-counter will end
when the counter reaches the zero value.

�

Watchdog
The Watchdog timer makes sure the motor is running in
forward direction. If the motor is rotating in reverse
direction, the BEMF voltage is inverted and the second
crossing of the flyback pulse (Zc

) will not occur until the

true BEMF zero crossing is detected. Therefore, if the
Watchdog timer expires before a zero crossing occurs,
the motor is assumed to be rotating backwards.
The commutation is advanced by one step to correct
this condition. The Watchdog time must be set to a value
that is greater than the flyback pulse duration, measured
when the spindle motor stands still.

The state associated to the Watchdog timer will start
when the one associated to Blank 1 timer is finished and
will end when Zc

occurs or when the Watchdog counter

expires.

�

Start-up
If the motor is not spinning, the BEMF zero crossings will
not occur. The Start-up timer detects this if it expires
before the true zero crossing (Zc

) has occurred. It will

advance the commutation by one step if this happens.
The state associated to Start-up timer will start when the
one associated to Blank 2 timer is finished and will end
when Zc

occurs or when Start-up expires.

�

Comdelim
The timer associated to Comdelim value allows to
control the maximum commutation delay (between zero
crossing and next commutation). When the true zero
crossing is detected (Zc

), the timer will count until it

expires and then will commutate the motor to the next
step. This commutation delay time is equal to half the
measured value between 2 zero crossings.
The Comdelim value should be set to the maximum
allowable delay value. If

meas

is lower than the

programmed Comdelim value, the next timer value will
be

meas

divided by 2. If

meas

is higher than the

programmed Comdelim value, the next timer value will
be the programmed Comdelim value divided by 2.

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

The clock used in the commutation logic block is obtained
by dividing the master clock of the chip (f

CLOCK

) by a clock

divider (Prescaler). This internal clock will be named
internalSpindleClock. Internal spindle clock configurations
are described in Table 6.

All the delays described above (Blank 1, Watchdog,
Blank 2, Start-up and Comdelim) are generated by one
down-counter (called TIMER 1), see Fig.8 and one
up-counter (called TIMER 2), see Fig.9. Each of them
uses internalSpindleClock signal.

Table 6

Spindle clock configurations

8.3.1

LANKS

, W

ATCHDOG AND

TART

UP DELAYS

An internal down-counter called TIMER 1 is used to generate Blank 1, Blank 2, Watchdog and Start-up delays. It loads
one of these programmed values and counts down till it reaches zero.

spindiv

REGISTER#1 (5)

highClock_N

REGISTER#6 (11)

internalSpindleClock

CLOCK

128

CLOCK

Fig.8 Down-counter TIMER 1.

handbook, full pagewidth

Start-up

Blank 1

Blank 2

Watchdog

MGL481

The actual delay time will be:

(1)

Value is the decimal representation of the binary code
programmed in one of the 6 bit registers.

(2)

Delay

value

step

�

Step

LSB

internalSpindleClock

---------------------------------------------------------------

(3)

We have to subtract (2

LSB

1) to obtain maxValue

because all the bits from 0 to (LSB

1) are set internally to

zero by design.

maxValue

MSB

(

)

�

LSB

�

internalSpindleClock

----------------------------------------------------------------------------

MSB

(

)

LSB

�

internalSpindleClock

------------------------------------------------------

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

Table 7

Delays used for TIMER 1

Table 8

Numerical application with f

CLOCK

= 30 MHz

Notes

1. The first zero crossing of the flyback should occur within this time.

2. The real zero crossing should not come within this time after the second zero crossing of the flyback pulse.

3. The time should be larger than the duration of the flyback pulse measured when the motor stands still.

4. The actual zero crossing should occur within this time after the Blank 2 time has expired.

8.3.2

OMDELIM DELAY

An internal up-counter called TIMER 2 is used to measure the time between two zero crossings and also to set the
maximum commutation delay through Comdelim delay.

DELAY

LSB

MSB

BITS

Blank 1

Blank 2

Watchdog

Start-up

DELAYS

internalSpindleClock

CLOCK

128

CLOCK

STEP

MAX.

STEP

MAX.

STEP

MAX.

STEP

MAX.

Blank 1; note 1

2.13

�

134

�

4.27

�

269

�

8.53

�

538 ms

17.1

�

1.08 ms

Blank 2; note 2

17.1

�

1.08 ms

34.1

�

2.15 ms

68.3

�

4.30 ms

137

�

8.60 ms

Watchdog; note 3

68.3

�

4.30 ms

137

�

8.60 ms

273

�

17.2 ms

546

�

34.4 ms

Start-up; note 4

8.74 ms

550 ms

17.5 ms

1.101 s

35 ms

2.202 s

70 ms

4.404 s

Fig.9 Up-counter TIMER 2.

handbook, full pagewidth

Comdelim

MGL482

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

Comdelim is the maximum value that can be reached by TIMER 2. So, this is the maximum time between 2 zero
crossings (

Zc). The maximum commutation delay (Comdelim delay) is then half this value.

The actual delay will be:

(4)

(5)

Value is the decimal representation of the binary code programmed in the 11-bit register.

(6)

(7)

(we have to add this offset because bits 0 and 1 are set internally to logic 1 by design).

(8)

(9)

Table 9

Delay used for TIMER 2

Table 10 Numerical application with f

CLOCK

= 30 MHz

The commutation delay counter, which starts counting at a zero crossing, has two operating modes:

�

In the adaptive mode, the next zero crossing is detected before the commutation delay counter has reached its
programmed value. In this mode, the next commutation will occur at the measured t

Zcross

divided by 2 after the last

zero crossing.

�

In the forced mode, the next zero crossing is detected after the commutation delay counter reaches its programmed
value. In this mode, the counter is stopped and the commutation logic block waits until the next zero crossing occurs.
After it occurs, the next commutation will be forced at the programmed commutation delay divided by 2.

DELAY

LSB

MSB

BITS

Comdelim

DELAYS

CLOCKOUT/PRESCALER

CLOCK

128

CLOCK

STEP

(

�

OFFSET

(

�

MAX.

(ms)

STEP

(

�

OFFSET

(

�

MAX.

(ms)

STEP

(

�

OFFSET

(

�

MAX.

(ms)

STEP

(

�

OFFSET

(

�

MAX.

(ms)

2.13

1.6

4.37

4.27

3.2

8.74

8.53

6.4

17.48 17.1

12.8

Comdelim
delay

1.07

0.8

2.18

2.13

1.6

4.37

4.27

3.2

8.74

8.53

6.4

17.48

value

step

�

Offset

ComdelimDelay

-----------

Step

LSB

internalSpindleClock

---------------------------------------------------------------

Offset

internalSpindleClock

---------------------------------------------------------------

maximum

MSB

(

)

�

internalSpindleClock

---------------------------------------------------------------

maximumComdelimDelay

MSB

(

)

1
2

---

�

internalSpindleClock

---------------------------------------------------------------

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

8.4

10-bit ADC with 7 analog inputs

The ADC is a signed 10-bit converter which uses the
successive approximation conversion technique.
The overall accuracy is 2% absolute error not including
contribution of the reference voltage and guaranteed
monotonicity.

8.4.1

NPUT CHANNELS

7 analog input channels can be sampled and converted:

�

Channel 0: conversion of the op-amp A2 output

�

Channel 1: conversion of the op-amp A1 output

�

Channel 2: conversion of the VCM sense amplifier
output

�

Channel 3: conversion of an analog external signal

�

Channel 4: conversion of the temperature
monitor + temperature shutdown signal

�

Channel 5: conversion of an analog external signal

�

Channel 6: conversion of an internal signal, controlling
analog supply voltage over two ranges.

Channels 0 and 1 can be used as external inputs by
deactivating the 2 stand-alone op-amps A1 and A2
(op-amps are put in sleep mode), that means by putting
register#0 (9) at logic 1.

The ADC does not include input filtering. If this is required
in the application then it must be implemented externally.

8.4.2

NPUT RANGES

Two analog input ranges are possible: either between
1.5 and 3.5 V or between 0 and 5 V. The input range is
selected with register#0 (6):

�

Table 11 Input analog voltage and corresponding output code

BIT

MIN. OUTPUT = 200H

MIDDLE OUTPUT = 000H

MAX. OUTPUT = 1FFH

minimum input value = 1.5 V

middle input value = 2.5 V

maximum input value = 3.5 V

minimum input value = 0 V

middle input value = 2.5 V

maximum input value = 5 V

8.4.3

ONVERSION MODES

Three different conversion modes are possible depending
on the states of register#0 (7) and register#0 (8):

�

Auto conversion and input channel auto incrementation
mode.

This mode is obtained with register#0 (7) = 1 and
register#0 (8) = 1. The conversion sequence works as
follows: the first A/D conversion is started by writing to
serial port register#0. The address of the channel is
decoded from the three LSBs in register#0 [2 to 0].
Then the OM5193H selects the addressed analog
channel, samples and holds the analog input and starts
the analog to digital conversion. The conversion result is
obtained by reading the serial port register#0.
Register#0 (10) provides the status of the conversion: it
is set to 0 as long as the conversion is running and
indicates that the low 10 bits of register#0 are invalid.
Register#0 (10) going HIGH means the conversion is
complete and guarantees the validity of the data in
register#0 [9 to 0].

�

Auto conversion on the same channel.

This input channel automatic incrementation option can
be deactivated by setting register#0 (8) to logic 0 with
register#0 (7) at logic 1. So the behaviour of the ADC is
the same as explained above, except that all the
conversions are made on the channel specified by the
last write access on register#0.

�

Single conversion mode.

The automatic conversion mode can also be
deactivated by setting register#0 (7) to logic 0. In this
mode, a write access on register#0 will start a
conversion on the specified channel and a read access
will not launch any other conversion.

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

8.4.4

ROGRAMMING REGISTER

Table 12 Writing register#0

Note

1. Possible addresses:

a) ADC MUX address = 000: channel 0 selected;

b) ADC MUX address = 001: channel 1 selected;

c) ADC MUX address = 010: channel 2 selected;

d) ADC MUX address = 011: channel 3 selected;

e) ADC MUX address = 100: channel 4 selected;

f) ADC MUX address = 101: channel 5 selected;

g) ADC MUX address = 110: channel 6 selected;

h) ADC MUX address = 111 is an illegal address. No analog input will be selected if a conversion is asked in this

channel and the ADC will convert a random analog value.

For a correct initialization of the converter just after power up, when POR is HIGH (before using the ADC or the DAC),
the register#0 has to be programmed as follows: write 020H and then write 000H. A read of register#0 between the
2 write accesses is not necessary.

BIT

DEFAULT VALUES

NAME

DESCRIPTION

ADC MUX address; note 1 ADC MUX address 0

ADC MUX address 1

ADC MUX address 2

not used

should be at logic 0 under normal operating
conditions

testMode_N

dedicated for test purposes of the DAC in ADC or
DAC mode; should be at logic 0 under normal
operating conditions

rangeSelect

selects the analog input range of the ADC:

0 = range 1.5 to 3.5 V

1 = range 0 to 5 V

autoConvSelect

selects the automatic conversion option; see details
in Table 13

incrementChannel

selects the automatic channel increment option; see
details in Table 13

opampSelect_N

selects the stand-alone op-amps:

0 = op-amps activated

1 = op-amps deactivated

not used

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

Table 13 Truth table for bits 7 and 8 on register#0 in write mode; conversion mode options; note 1

Note

1. The autoConvSelect bit has priority over the incrementChannel bit.

8.4.5

ONVERTER CLOCK FREQUENCY VALUES

The ADC internal clock named converterClock can have two different frequency values by programming register#6 (11)
(bit highClock_N):

CLOCK

) divided by 8 (clockDivider = 8)

CLOCK

) divided by 4 (clockDivider = 4)

(10)

Table 14 Numerical application

8.5

10-bit VCM DAC

The VCM DAC is a signed 10-bit digital-to-analog convertor. It will start the conversion when register#2 is written.
The lowest 10 bits contain the value to be converted.

Table 15 Input code and corresponding output analog voltage

The overall accuracy is 2% absolute error not including the contribution of the reference voltage and guaranteed
monotonicity.

autoConvSelect

REGISTER#0 (7)

incrementChannel

REGISTER#0 (8)

DESCRIPTION

Default state: no auto channel incrementation, no A/D
conversion started automatically after each read of the result.

Starts automatically an A/D conversion on the same channel
(no channel incrementation) after each read of the result.

Starts automatically an A/D conversion on the next channel
(increment the channel by 1) after each read of the result.

No auto channel incrementation, no A/D conversion started
automatically after each read of the result (similar to the default
state `00').

TIME

MASTER CLOCK = 10 MHz

MASTER CLOCK = 20 MHz

MASTER CLOCK = 30 MHz

DIVISION

BY 8

DIVISION

BY 4

DIVISION

BY 8

DIVISION

BY 4

DIVISION

BY 8

DIVISION

BY 4

Conversion time

10.4

�

5.2

�

5.2

�

2.6

�

3.4

�

1.7

�

INPUT CODE

OUTPUT VOLTAGE

200H

1.5 V

000H

2.5 V

1FFH

3.5 V

conversionTime

clockDivider

�

CLOCK

---------------------------------------------

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

8.6

Reference voltage

ref2V5

is a 2.5 V bandgap reference used as the reference

voltage for the VCM circuit. Stable voltages of
1.5 and 3.5 V are generated from the 2.5 V reference and
used as reference voltages for the VCM DAC and for the
ADC. The 1.5 and 3.5 V voltages are only available inside
the IC and are not connected to external pins.

8.7

Stand-alone op-amps

This block is composed of two low-offset stand-alone
op-amps (A1 and A2) with outputs connected to the ADC
channels 0 and 1.

The stand-alone op-amps can be deactivated if they are
not used in the application. When deactivated, they are put
in sleep mode and outputs are in high-impedance. In that
case, ADC channels 0 and 1 can be used as input signals.
The op-amps are controlled by writing to the serial port on
register#0 (9); bit opampSelect_N:

8.8

Analog switch

This block is composed of a 2 input analog multiplexer
used to select the seek mode or the track-following mode.

It is controlled by writing to serial port register#1 (9);
bit seek/trackfw:

8.9

Charge pump voltage

The charge pump voltage circuit (voltage doubler)
generates a power supply voltage higher than V

DDA2

(12 V) power supply. This voltage is used to:

�

Drive the upper N-channel FETs of the power stages

�

Drive an optional external FET (see Section 8.18)

�

Set a voltage independent of the power supply and
temperature for the functions BRAKEPOWER and
BRAKEDELAY.

Two external capacitors are used to generate the higher
voltage on pin CAPY. The capacitor between
BSTCP1 and BSTCP2 is charged and discharged with a
frequency, which is a function of the charge pump output
current and an internal oscillator frequency. The voltage
on pin CAPY is typically 19.2 V. Figure 10 illustrates the
charge pump block diagram.

Fig.10 Charge pump voltage generator.

handbook, full pagewidth

MGM979

COMPARATOR

OSCILLATOR

200 kHz

reference

BSTCP1

BSTCP2

CAPY

GNDS

CCAPX

CCAPY

VDDA2

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

8.10

Spindle driver

The spindle block contains both the low-side and high-side
drivers configured as a H-bridge for a 3-phase DC
brushless, sensorless motor. In each of the six possible
states, two outputs are active, one sourcing current and
one sinking current. The third output presents a high
impedance to the motor which enables measurement of
the BEMF in the corresponding motor coil. The BEMF zero
crossing comparator outputs (xCROSS) are processed by
the commutation logic circuit to calculate the correct
moment for the next commutation, so the change to the
next output state. The commutation logic circuit provides
proper commutation commands for the spindle drivers
thus ensuring the rotation of the motor. The commutation
logic circuit also controls the spindle motor driver during
start-up (no reverse rotation).

The spindle should be set in the high-impedance mode
(see Table 16) between the sleep mode (brake-after-park
mode) and the normal running mode. Register#1 should
be programmed as follows:

�

Write 00x001x11010 to activate the manual mode
during typically less than 1 ms (time discharge of
low-side power FETs)

�

Write 00x001x01xxx to activate the automatic running
mode. The `x' states concern the seek or track-following
mode register#1 (9) and the spindle prescaler value
used on the application register#1 (5). Their states are
specific to the application needs.

The ZCROSS signal is a combination of the xCROSS
signals. It can be used by the microcontroller as a tacho
information for the spindle speed control loop.

The external SPCC signal is used to control the spindle
current. The external SPCCOUT capacitor is connected to
the spindle current control amplifier to ensure the stability
of the spindle current control loop.

The short-circuit brake mode is entered if power-down,
thermal shutdown or sleep mode occurs.

A Miller network is used to obtain soft switching on the
low-side and high-side drivers.

The slew rate of the driver stage that is switched-off can be
controlled by means of a resistor connected to the pins
SLEW and GND. The slew rate is calculated using the
following equation:

(11)

�

2.55

1 k

SLEW

(

)

�

-------------------------------------------------------

20 pF

---------------------------------------------------------------------------

SLEW

is in

and SR in V/s. Without a resistor, SR is

typical 0.15 V/

�

s and with a resistor of 90 k

, the typical

value is 0.5 V/

�

s. The maximum slew rate depends on the

limit for stability of the spindle loop.

The spindle current I

SPRUN

is sensed by an external

resistor R

SPSENSE

connected to a sense amplifier

providing the internal signal SPOUT. The gain G

of the

sense amplifier is typical 10.

(12)

The transconductance gain of the spindle loop is given by
the following equation:

(13)

The control amplifier differentiates the control signal on
pin SPCC from the signal SPOUT. A 0.25 V offset is
subtracted from the input voltage on pin SPCC to ensure
that the current command includes the zero current. With
the spindle loop closed, the voltage SPOUT is given by the
following equation:

(14)

The control signal V

CONTROL

provided by the control

amplifier is then applied to the spindle drivers. The spindle
drivers control the voltage on the gate of the low-side
power drivers. One of the three high-side drivers is fully on.
The charge pump voltage is applied to the gate. One of the
three low-side drivers is controlled by the control amplifier.
Purpose is to adjust the voltage on the gate to adjust the
total output resistance R

ds(on)

at the specified running

current.

The current in the spindle loop is given by the following
formula:

(15)

With R

SPSENSE

= 0.25

(16)

The maximum start-up current is I

SPRUN

= 1.9 A with

SPCC signal at 5 V.

Figure 11 illustrates the spindle current control loop.

SPOUT

SPSENSE

SPRUN

�

SPSENSEH

�

SPRUN

SPOUT

---------------------

SPSENSE

---------------------------

SPSENSEH

SPOUT

-------------------------------

�

SPSENSE

�

-----------------------------------------

SPOUT

SPCC

OFFSET

�

SPRUN

SPCC

OFFSET

�

(

)

�

SPRUN

0.4

SPCC

0.25

�

(

)

�

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

The error amplifier (see Fig.14) compares the DACOUT input command and the output signal V

sout

of the sense amplifier

to generate the control voltage of the power drivers.

(18)

Finally, the transconductance gain of the VCM loop is given by the following equation:

(19)

Fig.13 VCM sense amplifier.

handbook, full pagewidth

MGM982

IVCMRUN

VCMSENSEH

RVCMSENSE

VCMSENSEL

NIVCM

REF2V5

ADC[2]/SOUT

ref2V5

DACOUT

�

--------------------------------------------------

sout

ref2V5

�

---------------------------------------

VCMSENSE

VCMRUN

�

---------------------------------------------------------------------------

Fig.14 VCM transconductance gain schematic.

handbook, full pagewidth

MGM983

SENSE
AMPLIFIER
Ga

ERROR
AMPLIFIER

IVCMRUN

VCMSENSEH

RVCMSENSE

VCMSENSEL

NIVCM

REF2V5

to power
drivers

VCMIN

DACOUT

ADC[2]/SOUT

VCMRUN

ref2V5

DACOUT

�

--------------------------------------------------

-------

VCMSENSE

�

---------------------------------------------

�

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

The VCM loop gain is set through external resistors. The seek (high gain) or the track-following (low gain) mode is
controlled with the serial bus. Purpose is to set the appropriate gain by selecting the R

resistor through the low

impedance analog 2 input switch.

Fig.15 VCM selectable loop gain.

handbook, full pagewidth

VCM DAC

VCM switch

to VCM
drivers

MGM984

VCMIN

(1)

(2)

SEEKSELECT

TRACKFWSELECT

Ri(TRACKFW)

Ri(SEEK)

DACOUT

ADC[2]/SOUT

(1) High gain.

(2) Low gain.

8.12

Park the VCM

A VCM park sequence is initiated any time a power-down,
a thermal shutdown and/or a sleep mode situation occurs.
The fault signal (FAULT) initiates the VCM park sequence.

This secure function is accomplished even in case of
power loss. In this case, the energy provided by the
rectified BEMF of the spindle motor coils is used to supply
the park circuit and park the heads above a landing area.
Otherwise, the energy is provided by the V

DDA2

power

supply through an external diode or power FET.

To accomplish this function, the spindle power stage is
automatically set in a high-impedance mode. The NIVCM
low-side power driver is fully on while the remaining power
drivers of the VCM power stage are off.

The current flowing in the PARKVOLT resistor sets the
voltage on the PARKVOLT pin. The voltage across the
VCM load is internally regulated by the voltage on the
PARKVOLT pin. An internal circuit clamps the voltage on
PARKVOLT at 3V

. Without resistor, the voltage on

PARKVOLT is 3V

. The park current I

coilpark

is applied to

the VCM coil. The I

coilpark

park current is given by the

following equation:

(20)

coilpark

PARKVOLT

VCMSENSE

coil

ds on

(

)

sin

(

)

-------------------------------------------------------------------------------------------

An RC network is connected to pin BRAKEDELAY. During
the normal functioning, the voltage on the BRAKEDELAY
pin is typically V

BDC

= 12.55 V. This value is independent

of the power supply and the temperature. During park
mode, the RC network discharges with a time constant

The park mode is activated as long as the voltage on the
BRAKEDELAY pin is greater than the internal brake delay
threshold voltage V

BDT

of typically 2.2 V.

The t

BDT

park time duration (or brake delay time duration)

is set by the following equation:

(21)

where

(22)

BRAKED

and R

BRAKED

are respectively the capacitor and

the resistor connected to the BRAKEDELAY pin.

Typically, with C

BRAKED

= 330 nF and R

BRAKED

= 650 k

BDT

= 400 ms.

Figure 16 shows the equivalent park circuit.

BDT

BDC

BDT

-------------

�

BRAKED

�

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

Fig.17 Precharge circuit.

handbook, full pagewidth

MGM986

external diode

ACTUATOR

GND

BRAKEDELAY

GND

NIVCM

IVCM

GNDVCM

GNDV

CLAMP

VCMIN

VDDA1

VDDA2POWER

RVCMSENSE

8.14

Brake the motor

A spindle brake sequence is initiated any time a
power-down, a thermal shutdown and/or a sleep mode
situation occurs. The fault signal activates the
brake-after-park sequence.

When the heads are parked, the motor has to be braked in
order to guarantee heads reliability. During the brake
sequence, the heads land on a dedicated area of the disk.

The OM5193H integrates a highly efficient, low cost brake
circuit. It is guaranteed to be functional in case of power
loss and thermal shutdown with a short time brake duration
thus minimizing friction of the heads on the landing zone.

The energy stored by an external capacitor connected to
the BRAKEPOWER pin supplies the brake circuit during
the brake-after-park sequence.

The brake of the motor is accomplished by turning on the
spindle low-side power components while high-side power
drivers are off. This causes a short-circuit of the spindle
motor coils and thus reversing the current and torque of
the motor.

During normal operation, the voltage V

BDC

on the

BRAKEPOWER pin is typically V

BDC

= 12.55 V. This value

is independent of the power supply and the temperature.
During the park sequence, the discharge of the
BRAKEPOWER capacitor is set by an internal resistor,
with or without an optional external resistor between
BRAKEPOWER and BRAKEADJUST. The typical value of
the internal resistor is 4 M

The brake sequence is started when the voltage on
BRAKEDELAY goes below the brake delay threshold
voltage V

BDT

of 2.2 V. The gates of the three spindle

low-side power drivers are charged by the energy stored in
the BRAKEPOWER capacitor and thus braking the motor.

The OM5193H will stay in the brake-after-park mode until
register#1 (3) bit run/stop is set to logic 1.

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

Fig.18 Brake circuit.

handbook, full pagewidth

CBRAKEP

RBRAKEP
(optional)

BRAKEDELAY

GNDV

GNDS/SPSENSEL

MOTSENSE/

SPSENSEH

GND

BRAKEADJH

BRAKEPOWER

CBRAKED

power-down

external

diode

CLAMP

VDDA2POWER

MOTx

RBRAKED

RSPSENSE

MGM987

The typical value for the BRAKEPOWER capacitor is 1

�

An optional resistance could be added between the
BRAKEPOWER and BRAKEADJUST pins. The values of
the capacitor and the resistor are depending on the
application.

Without resistor, the BRAKEADJH pin must be connected
to the BRAKEPOWER pin.

8.15

Power-on reset

The Power-On Reset (POR) circuit monitors the voltage
level of both 5 and 12 V supply voltages as shown in
Fig.19.

The POR active LOW logic line is set HIGH following the
5 and 12 V supply voltage rise above a specified voltage
threshold plus a hysteresis, and delayed by a time t

that

is determined by the external CPOR capacitor.

This POR output remains HIGH until either the 5 or 12 V
supplies drop below their voltage threshold, at which point
the POR output becomes LOW.

The C

CPOR

capacitor is charged with a typically 2.7

�

current. The voltage on CPOR is compared to the POR
circuit voltage reference of 2.55 V. The t

time is set by the

following equation:

(23)

where V

PORREF

= 2.55 V and I

CPOR

= 2.5

�

A typically.

The value of the t

time is set by the C

CPOR

capacitor

value.

CPOR

PORREF

�

CPOR

------------------------------------------------

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

Fig.21 Glitch detector timing.

handbook, full pagewidth

MGM990

minimum pulse

time = 10

�

Vref

VDD

POR

CHK signal

(with capacitor)

During a power-down situation, the POR circuit must not
only generate an output POR signal, but must also activate
the brake-after-park sequence. In doing so, the VCM
driver draws power from the BEMF of the motor coils
through the clamp line during spin-down, and uses this
power to bias the VCM against one of the hard stops of the
actuator. This prevents the heads from landing on data
zones.

POR also controls the digital part of the chip.

When POR is LOW, the chip is automatically set in the
brake-after-park mode.

When POR goes HIGH, the digital section is initialized
forcing the brake-after-park sequence until a normal start
is asked (by writing on register#1).

POR is considered as an asynchronous signal for the
digital part and default values are loaded when POR goes
HIGH. Default values for register#0 and register#1 are
shown in Section "Commutation and sleep mode" (see
also Table 5) and in Section "10-bit ADC with 7 analog
inputs" (see also Table 12).

If default values have to be loaded when POR is LOW, at
least one clock pulse is needed to load the registers with
default values.

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

Fig.22 Initialization of the registers when POR is LOW.

handbook, full pagewidth

MGM991

POR circuit controls the

brake-after-park mode

commutation logic controls the
brake-after-park mode until a
spindle start is asked.

CLOCK

If there is a CLOCK signal when POR signal is LOW,
default register values will be loaded on the rising edge.

POR

default values are automatically
loaded when POR goes
HIGH if there is no CLOCK
during LOW state.

8.16

Thermal monitor and shutdown

The OM5193H is provided with both a temperature
monitor and a thermal shutdown circuit.

The device is protected against over-temperature by the
thermal shutdown circuit. When the temperature of the
chip exceeds 150

�

C, the device is automatically set to the

brake-after-park mode. Furthermore, the voltage V

temp

pin ADC[4]/TEMP goes HIGH. It remains in this mode until
the temperature goes below the thermal shutdown
temperature minus typically 10

�

During the normal operation, the signal V

temp

provides a

voltage as a function of the chip temperature.
The equation of the voltage versus the temperature is the
following:

(24)

Figure 23 presents the voltage V

temp

on pin ADC[4]/TEMP

during normal operation and the voltage on thermal
shutdown with hysteresis.

temp

7.05

�

(

)

�

1.995

Fig.23 V

temp

behaviour versus temperature.

handbook, full pagewidth

Tj (

�

Vtemp

(V)

VDDA1

3.052

2.982

1.995

140

150

MGM992

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

The pin ADC[4]/TEMP is internally connected to channel 4
of the ADC. The data can be read and processed by the
microcontroller to control the temperature of the device
during the spindle start-up sequence and normal operation
and to create an early high-temperature warning.

8.17

Power supply isolation

In case of power-down, the brake-after-park sequence
must be supplied from the motor BEMF and the energy
stored in the CLAMP capacitor. When the supply voltage
for the spindle and the VCM is directly connected to the
V

DDA2

, the energy from the motor BEMF and the CLAMP

capacitor will be lost in the V supply system instead that it
is used for brake-after-park sequence. Therefore, the
motor and VCM supply must be isolated from the V

DDA2

This can be done by means of a diode or a power FET
between V

DDA2

and the power supply line for the spindle

and the VCM.

8.17.1

XTERNAL ISOLATION DIODE

A diode can be used when the motor current and the VCM
current are low and the voltage drop over the diode does
not limit the supply voltage range of the motor and the
VCM. The diode can be either a normal diode or a
Schottky diode. The type and electrical properties of the
diode are determined by the load characteristics.

8.17.2

XTERNAL POWER

FET

For higher current applications, the diode can be replaced
by a N-channel FET. The OM5193H contains an output to
drive this N-channel FET. To prevent the brake and park
currents from flowing back to V

DDA2

, the source of the FET

must be connected to V

DDA2

and the drain to the CLAMP

line. In this case, the back-gate diode of the FET is reverse
biased.

The gate is connected to the SWITCHGATE pin. During
normal operation, the voltage on the SWITCHGATE pin is
about 19 V and the isolation transistor is conducting.
When the brake-after-park sequence is activated, the gate
is short-circuited to ground. The recirculation diode is used
to isolate the power supply from the power stages.

8.18

Thermal behaviour

The OM5193H uses a dedicated leadframe to effectively
drain the heat from the chip. Therefore 18 pins are
connected to the leadframe and called HEATSINK.

These pins must be short-circuited together and
connected to a large dissipating copper area on the
printed-circuit board. The copper area has to be as thick as
possible. The thermal resistance can also be decreased
by placing the device close to a mounting screw used to
fasten the printed-circuit board to the bare casting
assembly.

Paths used to connect the power stages to the external
components, ground and V

DDA2

must be as large as

possible to guarantee a minimal extra thermal resistance
and a higher current capability.

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

LIMITING VALUES

In accordance with the Absolute Maximum System (IEC 134); note 1

Note

1. Stressing beyond these levels may cause permanent damage to the device. This is a stress rating only and functional

operation of the device under this condition is not implied.

a) OVS: one pin stressed by sample; square pulse time duration = 1 s, maximum current = 1 A.

b) ESD Human Body Model: JEDEC specification EIA/JESD22-A114 February 1996.

c) ESD Machine Model: JEDEC specification JC-14.1 July 07 1995.

10 HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices.

11 THERMAL CHARACTERISTICS

Note

1. This is obtained with a thermally enhanced printed-circuit board tied to the bare casting assembly.

SYMBOL

PARAMETER

MIN.

MAX.

UNIT

DDA1

5 V analog supply voltage

0.3

DDD

5 V digital supply voltage

0.3

DDA2

12 V analog supply voltage

0.3

+13.5

DDA2POWER

MOTA

output voltage

0.3

+18

MOTB

MOTC

NIVCM

output voltage

0.7

+18

IVCM

voltage on pins BSTCP1, BSTCP2, CAPY and SWITCHGATE

0.3

+20.5

ESD Human Body Model

2000

except for BRAKEDELAY

500

except for BRAKEPOWER

1500

ESD Machine Model

200

amb

operating ambient temperature

�

stg

storage temperature

+125

�

junction temperature

150

�

SYMBOL

PARAMETER

CONDITIONS

VALUE

UNIT

th(j-a)

thermal resistance from junction to ambient

note 1

K/W

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

12 CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supply; note 1

DDA1

5 V analog supply
voltage

4.5

5.0

5.5

DDD

5 V digital supply
voltage

4.5

5.0

5.5

DDA2

12 V analog supply
voltage

10.8

12.0

13.2

DDA2POWER

12 V analog supply
voltage

10.8

12.0

13.2

DDD

5 V supply current

normal mode

stand-alone op-amps
deactivated

sleep mode

DDA2

12 V supply current

normal mode

sleep mode

1.5

OWER BIAS VOLTAGE

L(PWRBIAS)

power bias leakage
current

PWRBIAS

= 20.5 V

200

Servo control; note 2

CHANNEL

10-

BIT

ADC

RES

ADC

resolution

note 3

bits

CONV

conversion time

including the sample and
hold time; relative to
CLOCK signal

104

clock
cycles

input voltage

ref2V5

= 2.5 V

1.5

3.5

ref2V5

= 2.5 V

OFF

MID

offsets for middle code

analog input at V

ref2V5

1.5 to 3.5 V range

LSB

0 to 5 V range

LSB

i(max)

input error for
maximum code

relative to 1.4V

at 00H

1.5 to 3.5 V range

+40

0 to 5 V range

+80

i(min)

input error for minimum
code

relative to 0.6V

at 00H

1.5 to 3.5 V range

+40

0 to 5 V range

+80

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

INL

end-point integral non-
linearity

note 4

1.5 to 3.5 V range

LSB

0 to 5 V range

LSB

DNL

differential non-linearity monotonic; no missing

codes; for both ranges;
note 4

LSB

CODE

code value on
channel 6

DDA1

(internal analog

value) is sampled and
converted in this channel

190

+190

LSB

code error on
channel 6

represents the
difference between an
external

DDA1

conversion result and a
conversion made in
channel 6

LSB

tot

absolute error

includes integral
non-linearity, offset and
gain error

input resistance

0 to 5 V range;
notes 5 and 6

input capacitance

1.5 to 3.5 V range;
note 6

temperature coefficient

combined temperature
coefficient of gain error,
integral non-linearity
and offset

T > 25

�

0.05

LSB/

�

T < 25

�

0.05

LSB/

�

MATCH

channel-to-channel
matching

the same analog voltage
is applied in each
channel; note 6

LSB

crosstalk attenuation

= 1 MHz; note 7

PSRR

power supply rejection
ratio

note 6

10-

BIT

VCM DAC

RES

DAC

resolution

bits

settling time

to within 0.5 LSB

2.0

�

DAC

dynamic range

0.6V

ref

2.5 (

�

1.0)

1.4V

ref

OO(MID)

offsets for middle code

measured at code 00H:
relative to V

ref2V5

+10

o(max)

maximum output error

relative to 1.4V

code 00H

+40

o(min)

minimum output error

relative to 0.6V

code 00H

+40

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

OO(max)

maximum output offset
voltage

relative to V

ref3V5(meas)

;

only tested on wafer

+10

OO(min)

minimum output offset
voltage

relative to V

ref1V5(meas)

;

only tested on wafer

+10

INL

end-point integral
non-linearity

note 4

LSB

DNL

differential non-linearity guaranteed monotonic;

note 4

LSB

tot

absolute error

includes integral
non-linearity, offset and
gain error

temperature
coefficient

combined temperature
coefficient of gain error,
integral non-linearity
and offset

T > 25

�

100

mV/

�

T < 25

�

100

mV/

�

PSRR

power supply rejection
ratio

note 6

EFERENCE VOLTAGES

ref1V5

1.5 V reference output
voltage

0.6V

ref2V5(meas)

;

only tested on wafer

1.414

1.504

1.596

ref2V5

2.5 V reference output
voltage

1 mA

ref

5 mA

2.397

2.507

2.617

ref3V5

3.5 V reference output
voltage

1.4V

ref2V5(meas)

;

only tested on wafer

3.332

3.510

3.690

1V5

value of the gain used
to generate V

ref1V5

ref1V5(meas)

divided by

ref2V5(meas)

;

only tested on wafer

0.59

0.6

0.61

3V5

value of the gain used
to generate V

ref3V5

ref3V5(meas)

divided by

ref2V5(meas)

;

only tested on wafer

1.39

1.4

1.41

temperature coefficient

note 6

200

�

PSRR

power supply rejection
ratio

note 6

load capacitance

note 6

0.01

0.1

NALOG SWITCH

switching time

note 6

0.5

�

ds(on)

total output resistance
(source + sink +
isolation)

switch closed; value at
25

�

C and nominal

supply voltages

100

temperature coefficient

T > 25

�

0.3

�

T < 25

�

0.3

�

off leakage current

100

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

TAND

ALONE OP

AMPS

input voltage

1.4

DDA1

0.5 V

i(bias)

input bias current

�

input offset voltage

relative to V

ref2V5

value

+10

input offset current

note 6

100

output voltage

= 10 k

to V

ref2V5

level

0.9

DDA1

0.5 V

slew rate

= 10 k

; C

= 20 pF

�

gain bandwidth product

0.75

1.0

MHz

v(ol)

open-loop voltage gain

f = 1 kHz; R

= 10 k

;

note 6

SVRR

supply voltage ripple
rejection

f = 100 kHz; R

= 10 k

;

< 20pF; note 6

power-on time

after sleep mode

�

CMRR

common mode
rejection ratio

note 6

IGITAL PINS

BIPIN

bidirectional pins
capacitance

CMOS level, high-drive,
output stage, 8 mA
3-state

input capacitance

maximum output load

100

INPIN

input pins capacitance

CMOS level, high-drive,
protection to V

DDD

and

DGND

OUTPIN

output pins
capacitance

2 mA push-pull

HIGH-level input
voltage

LOW-level input
voltage

0.8

HIGH-level output
voltage

= 2 mA

DDA1

0.5

LOW-level output
voltage

= 2 mA

0.5

Motor control; note 1

ENERAL

Thermal protection: thermal shutdown

sw(off)

switch-off temperature

note 8

143

150

157

�

hys

thermal hysteresis

note 6

�

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

Thermal monitor

O(LT)

output voltage at low
temperature

= 25

�

2.171

O(HT)

output voltage at high
temperature

= 150

�

3.052

temperature monitor
thermal gain

note 6

6.8

7.05

7.30

mV/

�

Charge pump generator: CAPY, BSTCP1 and BSTCP2

charge pump voltage

running mode

18.2

19.2

20.2

SWITCHGATE

switchgate voltage

running mode

17.6

OWER

ON RESET

Power monitor comparators: CHK12 and CHK5

th(12)

12 V threshold voltage

CHK12 open-circuit

9.05

9.40

9.75

hys(12)

hysteresis on V

DDA2

115

150

th(5)

5 V threshold voltage

CHK5 open-circuit

4.2

4.3

4.4

hys(5)

hysteresis on V

DDD

L12

low internal bridge
resistor on CHK12

CHK12 short-circuited to
2.55 V

27.5

H12

high internal bridge
resistor on CHK12

CHK12 short-circuited to
ground

100

low internal bridge
resistor on CHK5

CHK5 short-circuited to
V

DDA1

high internal bridge
resistor on CHK5

CHK5 short-circuited to
ground

Power-on reset generator: CPOR and POR

LOW-level output
voltage

= 1 mA

0.5

pull-up resistor

POR short-circuited to
ground

CPOR(source)

source current for
CPOR

3.5

2.5

1.5

�

th(CPOR)

CPOR threshold
voltage

functional test

2.55

PINDLE DRIVER

BEMF comparators: ACROSS, BCROSS and CCROSS

I(CM)

common mode input
voltage

running mode

0.7

DDA2

+ 0.7 V

I(bias)

input bias current

note 6

�

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

sw(comp)

comparator switching
level

only tested on wafer

+20

sw(tol)

tolerance on the
comparator switching
level

only tested on wafer

variation in comparator
switching levels for one
IC

note 6

4.2

+4.2

i(hys)

input voltage
hysteresis

note 6

0.5

LOW-level output
voltage

sink current =

�

only tested on wafer

0.45

HIGH-level output
voltage

source current = 40

�

only tested on wafer

DDA1

0.5

Output drivers: MOTA, MOTB and MOTC

ds(on)(source)

high-side driver output
resistance

= 1.0 A at

amb

= 25

�

0.36

0.45

= 1.0 A at

amb

= 125

�

0.56

0.65

ds(on)(sink)

low-side driver output
resistance

= 1.0 A at

amb

= 25

�

0.24

0.35

= 1.0 A at

amb

= 125

�

0.44

0.55

SLEW

slew rate voltage

SLEW

= 20

�

2.55

slew rate

open-loop; note 9

0.09

0.23

�

SLEW

= 30

�

A; note 9

0.32

0.87

�

SPRUN

spindle current control

SPCC

= 1.25 V;

SENSE

= 0.25

380

400

420

CLP

overvoltage protection
circuit

SVDMOS

> 10 mA

15.8

L(SP)

spindle power stage
leakage current

Sense amplifier: SPSENSEL and SPSENSEH

input current on
MOTSENSE

only tested on wafer

�

input offset voltage

note 6

sense amplifier gain

only tested on wafer

9.8

10.2

V/V

temperature
coefficient of sense
amplifier gain

note 6

200

ppm/

�

Control amplifier: SPCC and SPCCOUT

SPCC0

spindle zero-current
reference

only tested on wafer;
T

amb

= 25

�

230

250

270

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

cut(ol)

open-loop cut-off
frequency at 0 dB

SPCCOUT

minimum

value = 10 nF for stability
when closed loop;
note 10

kHz

Logic decoder: COMA, COMB and COMC

input leakage current

= 0 to V

; only tested

on wafer

�

OICE COIL MOTOR DRIVER

VCM preamplifiers: VCMIN and REF2V5

input current on VCMIN

�

input offset voltage

relative to V

ref2V5

for zero

output current

+10

unity gain frequency

note 6

3.5

MHz

VCM driver amplifiers

COD

cross-over distortion
delay

note 6

�

VCM

VCM slew rate

= 10 pF; note 6

�

unity gain frequency

note 6

1.5

MHz

v(SD)

slave driver voltage
gain

1.05

1.15

1.25

ds(on)(source)

high-side driver output
resistance

= 1.0 A at

amb

= 25

�

0.45

0.55

= 1.0 A at

amb

= 125

�

0.65

0.75

ds(on)(sink)

low-side driver output
resistance

= 1.0 A at

amb

= 25

�

0.35

0.45

= 1.0 A at

amb

= 125

�

0.55

0.65

CLP

overvoltage protection
circuit

SVDMOS

> 10 mA

15.1

LI(VCM)

VCM power stage
leakage current

VCM sense amplifier: VCMSENSEL and VCMSENSEH

input voltage

0.7

DDA2

+ 0.7 V

input current

ref2V5

= 2.5 V

100

+250

�

sense amplifier gain

under all conditions

3.8

4.0

4.2

O(sink)

output sink current

= 0 to 140

�

C; note 11

600

�

O(source)

output source current

= 0 to 140

�

C; note 12

500

�

output offset voltage

VCMSENSEH

VCMSENSEL

= 6 V

+35

gain-bandwidth product note 6

MHz

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

slew rate

= 10 k

; C

= 60 pF;

note 6

1.7

5.3

�

v(ol)

open-loop voltage gain

note 6

SVRR

supply voltage ripple
rejection

f = 100 Hz; R

= 10 k

;

< 60 pF; note 6

100

CMRR

common mode
rejection ratio

note 6

RAKE

AFTER

PARK DELAY MODE

Park and brake power

NMBP

normal mode voltage
on brake power

12.0

12.55

12.9

NMBD

normal mode voltage
on brake delay

12.0

12.55

12.9

BPR

brake power park
current

BRAKEPOWER

= 12 V;

BRAKEDELAY

> V

BDT

�

BPB

brake power brake
current

BRAKEPOWER

= 12 V;

BRAKEDELAY

= 0

�

Park

SWITCHGATE

voltage on
SWITCHGATE during
brake-after-park

brake-after-park mode

0.1

brake

park voltage current
source

BRAKEPOWER

= 12 V;

CLAMP

= 8 V;

BRAKEDELAY

> V

BDT

�

IVCM(max)

maximum park voltage

pin PARKVOLT
open-circuit;
V

CLAMP

= 8 V;

BRAKEDELAY

> V

BDT

;

amb

= 25

�

C; note 13

1.95

IVCM(park)

voltage on IVCM during
park

PARKVOLT

= 1 V;

BRAKEPOWER

= 12 V;

CLAMP

= 8 V;

BRAKEDELAY

> V

BDT

0.9

1.1

NIVCM(park)

voltage on NIVCM
during park

PARKVOLT

= 1 V;

BRAKEPOWER

= 12 V;

CLAMP

= 8 V;

BRAKEDELAY

> V

BDT

MOTx(park)

voltage on MOTx
during park (high
impedance state)

BRAKEDELAY

> V

BDT

;

note 14

ds(on)(park)

switch park resistor

= 20.2

;

amb

= 25

�

0.35

Rds(on)(park)

temperature coefficient

note 15

�

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

Notes

1. V

DDD

= 5 V

�

10%; V

DDA2

= V

DDA2POWER

= 12 V

�

10%; T

amb

= 0 to 70

�

C; unless otherwise specified.

2. V

DDD

= V

DDA1

= 5 V

�

10%; T

amb

= 0 to 70

�

3. LSB on the 1.5 to 3.5 V range is equal to

512

V; LSB on the 0 to 5 V range is equal to

2.5

512

4. Integral non-linearity means the deviation of a code from a straight line passing through an actual end-point and the

actual centre. INL and DNL are calculated by dividing the output transfer function in 2 parts: minimum value to centre
value and centre value to maximum value.

5. The temperature dependency of the resistance is expressed as follows:

where R

(T) = resistance at desired temperature; R

ref

) = resistance at reference temperature;

T = desired temperature and T

ref

= 27

�

6. Guaranteed by design.

7. Channel-to-channel crosstalk is measured while driving one input and measuring the other open inputs.

8. In any case, it allows to go beyond the rated 150

�

C limit.

9. The description of the spindle driver circuit is given in Section 8.10.

10. R

SENSE

= 0.25

. Model for a motor phase: RLC network in parallel (L

= 1.5 mH, C

= 100 pF, R

= 4.6 k

) in

series with a resistor R

= 3.2

. Guaranteed by design.

11. V

VCMSENSEL

= 0.4 V, V

VCMSENSEH

= 0 V, measured V

sout

= V

, force V

sout

= V

+ 10 mV.

12. V

VCMSENSEL

= 0 V, V

VCMSENSEH

= 0.4 V, measured V

sout

= V

, force V

sout

= V

10 mV.

13. V

PARKVOLT(max)

= 3

�

, V

PARKVOLT

= 3

�

0.70

�

25) without resistor.

14. Brake-after-park mode when in sleep, POR or over-temperature mode.

15. R

ds(on)T(park)

= R

ds(on)(park)

+ T

Rds(on)(park)

�

25).

16. R

ds(on)T(break)

= R

ds(on)(break)

+ T

Rds(on)(break)

�

25).

17. V

= 0.65 + 2e

�

25).

Brake

BDT

brake delay time
threshold voltage

BRAKEPOWER

= 12 V

1.1

2.1

3.1

brake delay leakage
current

500

+500

ds(on)(brake)

lower DMOS resistor
during a brake

MOTx

= 200 mA;

amb

= 25

�

0.24

0.5

Rds(on)(brake)

temperature coefficient

note 16

�

Precharge

IVCM

voltage on pin IVCM

BRAKEPOWER

= 12 V;

BRAKEDELAY

= 0;

note 17

DDD

NIVCM

voltage on pin NIVCM

BRAKEPOWER

= 12 V;

BRAKEDELAY

= 0;

note 17

DDD

VCMIN

voltage on pin VCMIN

BRAKEPOWER

= 12 V;

BRAKEDELAY

= 0

0.2

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

(T)

ref

(

)

(

1.1e

ref

�

(

)

+ 1.1e

ref

�

(

)

�

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

13 APPLICATION INFORMATION

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Power supplies monitor

CPOR

POR time capacitor (time t

)

note 1

100

CHK5

analog 5 V filter

between CHK5 and ground

CHK12

analog 12 V filter

between CHK12 and ground

Spindle driver

SPCCOUT

spindle current control loop
capacitor

function of the motor
characteristics

SLEW

slew up and down resistor

note 2

200

SPSENSE

spindle sense resistor

0.25

VCM driver

VCMCOMPRC

resistor of compensation
RC network

function of the VCM
characteristics

130

VCMCOMPRC

capacitor of compensation
RC network

function of the VCM
characteristics

VCMSENSE

VCM sense resistor

0.33

FEEDBACK

feedback resistor

function of the VCM
characteristics

2.67

VCMSEEK

seek mode resistor

function of the VCM
characteristics

2.43

VCMTRACKFW

track-following mode resistor

function of the VCM
characteristics

input voltage controlling the
current

1.5

3.5

ref2V5

2.5 V reference voltage

2.5

Clamp line

CLAMP

clamp capacitor between
CLAMP line and ground

�

Charge pump generator

CAPX

pump capacitor between
pins BSTCP1 and BSTCP2

CAPY

storage capacitor between
pin CAPY and ground

Park and brake functions

BRAKEP

BRAKEPOWER capacitor

brake time = 10 s;
speed = 5400 RPM;
R

coil

= 5

; BEMF = 8.2 V

�

BRAKEP

resistor between BRAKEADJH
and BRAKEPOWER

brake time = 10 s;
speed = 5400 RPM;
R

coil

= 5

; BEMF = 8.2 V

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

Fig.24 Application diagram.

handbook, full pagewidth

MGM993

CPOR

CLOCK

SPCC

SDEN

SDATA

SCLOCK

POR

ZCROSS

DDA2

12 V

5 V

DDD

DDA1

CAPY

CCAPY

CCAPX

BSTCP1

BSTCP2

(1)

microcontroller

SLEW

SPCCOUT

BRAKEPOWER

BRAKEADJH

PARKVOLT

BRAKEDELAY

CHK5

CCHK5

MOTSENSE3

MOTSENSE2

MOTSENSE1/

SPSENSEH

GNDS/SPSENSEL

MOTB

MOTC

MOTA

spindle
motor

OM5193H

CLAMP1

CLAMP2

CLAMP3

PWRBIAS1

PWRBIAS2

AGND

DGND

GNDV

1, 4 to 7,
58 to 61,
64 to 67,

70, 75,

78 to 80

HEATSINK

SCANTEST

GNDVCM1

GNDVCM2

GNDVCM3

DACOUT

SEEKSELECT

TRACKFWSELECT

VCMIN

INTIN

REF2V5

ADC[0]/INTOUT

ADC[1]/DIFOUT

INTINN

PESAMP

read

channel

PESAMPN

(1)

ADC[2]/SOUT

SWITCHGATE

two different

options

ADC[3]

ADC[4]/TEMP

ADC[5]

VDDA2POWER

CCPOR

RSLEW

CSPCCOUT

CBRAKEP

CCLAMP

RBRAKEP

RPARKVOLT

CBRAKED

RBRAKED

RVCMTRACKFW

RFEEDBACK

RVCMSEEK

12 V

CHK12

CCHK12

RH5

RL5

RH12

RL12

(1)

RSPSENSE

RVCMSENSE

RVCMCOMPRC

CVCMCOMPRC

NIVCM

IVCM

voice

coil

motor

VCMSENSEH

VCMSENSEL

(1) Optional components.

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

15 SOLDERING

15.1

Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

"Data Handbook IC26; Integrated Circuit Packages"

(order code 9398 652 90011).

15.2

Reflow soldering

Reflow soldering techniques are suitable for all QFP
packages.

The choice of heating method may be influenced by larger
plastic QFP packages (44 leads, or more). If infrared or
vapour phase heating is used and the large packages are
not absolutely dry (less than 0.1% moisture content by
weight), vaporization of the small amount of moisture in
them can cause cracking of the plastic body. For details,
refer to the Drypack information in the

"Data Handbook

IC26; Integrated Circuit Packages; Section: Packing
Methods".

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 50 and 300 seconds depending on heating
method. Typical reflow peak temperatures range from
215 to 250

�

15.3

Wave soldering

Wave soldering is not recommended for QFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

CAUTION

Wave soldering is NOT applicable for all QFP
packages with a pitch (e) equal or less than 0.5 mm.

If wave soldering cannot be avoided, for QFP
packages with a pitch (e) larger than 0.5 mm, the
following conditions must be observed:

�

A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.

�

The footprint must be at an angle of 45

�

to the board

direction and must incorporate solder thieves
downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260

�

C, and

maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150

�

C within

6 seconds. Typical dwell time is 4 seconds at 250

�

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

15.4

Repairing soldered joints

Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300

�

C. When

using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320

�

1998 Nov 02

Philips Semiconductors

Product specification

Disk drive spindle and VCM with
servo controller

OM5193H

16 DEFINITIONS

17 LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

Data sheet status

Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification

This data sheet contains preliminary data; supplementary data may be published later.

Product specification

This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

Internet: http://www.semiconductors.philips.com

Philips Semiconductors � a worldwide company

� Philips Electronics N.V. 1998

SCA60

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
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Printed in The Netherlands

295102/750/01/pp56

Date of release: 1998 Nov 02

Document order number:

9397 750 03031

Электронный компонент: OM5193H

Document Outline