1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

FEATURES

Line interface with:

Voltage regulator with programmable DC voltage

drop

Programmable set impedance

Output to control an external switching MOS

transistor for pulse dialling

Programmable DC voltage during pulse dialling

Circuitry for short DC settling time

Interface to peripheral circuits with:

Supply for microcontroller and DTMF diallers

Input to sense supply voltage of microcontroller and

output for reset of microcontroller

C-bus (programming of parameters, control of all

logic signals)

High impedance DTMF signal input

Input for external oscillator signal with on-chip DC

blocking

Power-down via the I

C-bus

Stabilized supply for electret microphone

Microphone and DTMF amplifiers:

Low-noise microphone preamplifier suitable for

various types of microphones

Symmetrical high impedance microphone

preamplifier inputs

Programmable gain for microphone and DTMF

channels

Sending mute via the I

C-bus to disable microphone

amplifier and enable DTMF amplifier

Sending mute also to be used as privacy switch

Dynamic limiting (speech controlled) to prevent

distortion of line signal and sidetone; programmable
maximum sending level

Receiving amplifier:

Suitable for various types of earpieces (including

piezo)

Programmable gain and hearing protection level

Receiving mute via the I

C-bus to disable receiving

amplifier and enable DTMF confidence tone

On-chip anti-sidetone circuit with programmable

sidetone balance

Confidence tone in the earpiece during DTMF dialling

Facility to regulate parameters with line current:

Value of DC line current (bit code) readable via the

C-bus

Line loss compensation with fully software

programmable characteristics (control range, stop
current) of microphone/earpiece/DTMF amplifiers

Fully software programmable control of sidetone

balance and DC voltage drop as a function of line
length.

APPLICATIONS

Wired telephony (basic till feature phones)

Combi-terminals (e.g. telephone and answering
machine or FAX)

Modems and base units of cordless telephones.

GENERAL DESCRIPTION

The PCA1070 is a CMOS integrated circuit performing all
speech and line interface functions in fully electronic
telephone sets. The device requires a minimum of external
components. The transmission parameters are
programmable via the I

C-bus. This makes the IC

adaptable to nearly all worldwide country requirements
and to a various range of speech transducers, without
changing the (few) external components.

The parameters are stored in the EEPROM of a
microcontroller and are loaded into the PCA1070 during
the start-up phase of the transmission IC after hook-off.

The PCA1070 also allows adaptation to the connected
telephone line by reading the line current via the I

C-bus

and processing it in the microcontroller.

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

ORDERING INFORMATION

BLOCK DIAGRAM

TYPE NUMBER

PACKAGE

NAME

DESCRIPTION

VERSION

PCA1070P

DIP24

plastic dual in-line package; 24 leads (600 mil)

SOT101-1

PCA1070T

SO24

plastic small outline package; 24 leads; body width 7.5 mm

SOT137-1

Fig.1 Block diagram.

(1) Test pins.

(2) Default value.

handbook, full pagewidth

MLA944

LINE INTERFACE

POWER CONTROL

BTL RECEIVE

OUTPUT

RECEIVE

PROG-AMP

(-6 dB)

(2)

CLOCK

INTERFACE

BIAS

AND

REFERENCE

SEND

PROG-AMP

(15 dB)

(2)

ANTI

SIDETONE

GAIN

CONTROL

DYNAMIC

LIMITER

TEST

CONTROL

MICROPHONE

SUPPLY

MICROPHONE

PREAMPLIFIER

(20 dB)

SLPE LN

REG

LSI

DOC

positive line

V DD

VMC

RMC

peripheral supply

SCR 6

VSS 13

VSLPE
Zset
DST

sidetone

balance

Iline

line current

PRES

PD
DPI
RRG

OREC

(1)

receive mute

Vref
7

maximum level

load select

gain Gra

gain Gma

17 DTMF

MIC

I C-BUS

INTERFACE

threshold

send mute

(0 dB)

(

25 dB)

(0 dB)

PCA1070

OMIC

(1)

CLK

SDA

SCL

TST

(1)

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

PINNING

SYMBOL

PIN

DESCRIPTION

drive output

REG

voltage regulator decoupling

DOC

dial output connection

LSI

line signal input

positive line terminal

SCR

sending current resistor

ref

voltage reference decoupling

OREC

output receiving preamplifier; to be
left open-circuit in application

OMIC

output microphone preamplifier;
to be left open-circuit in application

supply for electret microphones

MIC

inverting input microphone
preamplifier

MIC+

non-inverting input microphone
preamplifier

negative line terminal

QR+

non-inverting output of receiving
amplifier

inverting output of receiving
amplifier

TST

test pin; to be connected to V

application

DTMF

dual tone multi-frequency input

RMC

reset output for microcontroller

CLK

clock signal input

SCL

serial clock line input; I

C-bus

SDA

serial data line input/output; I

C-bus

VMC

input to sense supply voltage
microcontroller

positive supply decoupling

SLPE

slope (DC resistance) adjustment

Fig.2 Pin configuration.

handbook, halfpage

REG

DOC

LSI

SCR

Vref

OREC

OMIC

MIC

SLPE

VDD

VMC

SDA

CLK

RMC

SCL

DTMF

TST

VSS

PCA1070

MGE338

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

FUNCTIONAL DESCRIPTION

All values in the Chapter "Functional description" are
typical unless stated otherwise.

Line interface

VOLTAGE DROP

Power for the PCA1070 and its peripheral circuits is
obtained from the telephone line. The IC develops its own
supply voltage at V

and regulates its DC voltage drop

between pins SLPE and V

. This voltage (V

SLPE

) can be

programmed via the I

C-bus interface between

3.1 to 5.9 V and is default at 4.7 V (see Table 8).

The DC line voltage at pin LN can be calculated using the
following equation:

= V

SLPE

+ (I

line

)

LN-SLPE

where:

= DC bias current flowing into pin LN

(

3 mA if I

line

> 17 mA)

LN-SLPE

= external 20

resistor between

LN and SLPE.

At line currents below 6 mA the DC voltage V

SLPE

automatically adjusted to a lower value. This means that
the operation of more sets, connected in parallel, is
possible with reduced sending and receiving levels and
relaxed performance. At line currents below 16 mA the DC
bias current I

is reduced from

3 mA to a lower value to

ensure maximum possible transmit level capability under
all line current conditions.

ET IMPEDANCE

In normal conditions I

line

>> I

and the static behaviour is

equivalent to a voltage regulator diode with a series
resistor R

LN-SLPE

. In the audio frequency range the

dynamic impedance Z

is determined mainly by the

internal component Z

set

= R

+ (R

// C). The equivalent

impedance Z

is shown in Fig.3. The values of R

, R

and C can be programmed via the I

C-bus interface

(see Tables 9, 10 and 11).

where:

= DC blocking capacitor (influence negligible at

300 Hz for given value of C

LSI

)

LSI

= capacitor at pin LSI (100 nF)

= internal capacitor (12 nF)

REG

= capacitor at pin REG (470 nF)

= artificial inductor

(= R

LN-SLPE

REG

= 10.1 H at V

SLPE

= 4.7 V)

LN-SLPE

= DC slope resistance (20

)

= internal resistor (1075 k

at V

SLPE

= 4.7 V)

LSI

= internal resistor (240 k

UPPLY FOR PERIPHERAL CIRCUITS

The supply voltage V

can be used for peripheral

circuitry. The supply capabilities depend on the
programmed DC voltage drop V

SLPE

and on several other

parameters as given in the following equation:

= V

SLPE

+ I

)

SLPE

VDD

where:

= internal current consumption PCA1070 (2.3 mA)

= current to peripheral circuitry

= current taken from V

for electret microphone

SLPE

VDD

= external resistor between SLPE and V

Fig.3 Equivalent impedance Z

handbook, halfpage

MGE342

VSS

VSLPE

SLPE

RLN-SLPE

Zset

Leq

REG

LSI

CREG

CLSI

RLSI

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

STARTING AND SETTLING TIME

The IC is equipped with circuitry for fast DC start-up. This
circuit is automatically activated as soon as V

reaches

3 V after hook-off, and is deactivated when V

SLPE

drops

below 5.9 V. This ensures that only a relatively short time
is needed to reach the default DC setting (V

SLPE

) of the

circuit and that V

will not exceed the maximum permitted

voltage of 6 V.

The start-up circuit can also be activated under software
control by setting bit code DST to logic 1 via the I

C-bus.

The start-up time can be optimized by programming the bit
code DST to logic 1 during the start-up procedure.
In practice this is possible as soon as the microcontroller
has become operational. The DST bit can also be used to
quickly restore the DC settings (V

SLPE

) after long line

breaks or during reprogramming of V

SLPE

It should be noted that the AC impedance into pin LN is
reduced considerably when DST = 1.

Power control

NTERNAL RESET

PCA1070

The PCA1070 has an internal reset circuit that monitors
the supply voltage V

. If V

is below the threshold level

(1.2 V) then the circuit is in reset-mode. In this mode the
current consumption is low and the internal reset is active
and writes the default values into all registers. The status
bit PRES will be set to logic 1. The microcontroller can
read this bit via the I

C-bus interface; once read it will be

set to logic 0 again.

When V

passes the threshold (increasing V

), the

circuit becomes partly active and the internal ring/speech
detector will be activated (see Section "Start-up and
switch-off behaviour").

ESET OUTPUT FOR MICROCONTROLLER

The voltage at pin VMC (microcontroller supply voltage) is
monitored by a reset circuit. If V

VMC

is below the threshold

level the output RMC is set to logic 1. This threshold level
is 2 V in the normal operating and power-down mode and
2.1 V in the standby mode (see Fig.4).

OWER

DOWN

STANDBY MODES

The circuit can be set in power-down or standby mode.
These modes are intended for use with pulse dialling
during long line breaks and applications with memory
retention.

With control bits PDx = 01, the circuit is in the power-down
mode; the typical current consumption at pin V

reduced from I

= 2.3 mA to 30

A; the typical current

consumption at pin VMC is 4

A. When PDx = 11 the

circuit is in the standby mode and I

and I

VMC

are

reduced to 2

A. In both conditions (power-down and

standby) the voltage stabilizer will be disabled.

TART

UP AND SWITCH

OFF BEHAVIOUR

This description refers to the basic application where V

and VMC are connected together and one supply
capacitor is used (see Fig.8).

Fig.4 VMC timing diagram.

handbook, halfpage

MGE339

VVMC

RMC

logic 1

low voltage

condition

VRESET

logic 0

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

Speech condition

After hook-off, line current will be applied to the line input
LN and the supply capacitor connected to V

and VMC

will be charged.

The internal reset signal will change from logic 1 to logic 0
when V

passes the threshold level (1.2 V) and the circuit

becomes partly active [the line interface part is kept in
power-down mode, so that all of the line current is
available to charge the supply capacitor(s)];
The PCA1070 can receive data via the I

C-bus (standard

C specifications are fulfilled for V

2.5 V; relaxed

performance for V

= 1.8 to 2.5 V).

When V

VMC

passes the microcontroller reset level of 2 V

(2.1 V in standby mode) the output RMC changes from
logic 1 to logic 0 and the circuit is switched to the normal
operating mode.

After hook-on V

VMC

decreases and the output RMC will

change from logic 0 to logic 1 when V

VMC

passes the

threshold level, however the PCA1070 will stay in the
normal operating mode until the internal reset at 1.2 V
takes place.

By decreasing V

the internal reset signal will change

from logic 0 to logic 1 when V

passes 1.2 V and the

circuit will go into the reset mode (line interface part in
power-down and all programmable parameters reset to
default values).

Ringer condition

In this condition the supply capacitor connected to V

and

VMC is charged by the rectified ringer signal; no line
current is applied to pin LN.

and V

VMC

are increasing and when V

passes the

internal reset threshold level (1.2 V), the internal
ring/speech-detector will be activated and the circuit will
switch to the standby condition (I

< 5

A; I

VMC

< 5

before the voltage at VMC reaches the threshold level for
microcontroller reset. When V

VMC

passes this threshold

level (2.1 V) output RMC changes from logic 1 to logic 0
and the circuit will stay in the standby mode until line
current is applied to pin LN. By setting the `Reset Ring'
control bit (RRG) to logic 1 via the I

C-bus interface, the

ring/speech detector will be disabled.

IAL

ULSE

NPUT

(DPI)

The DPI bit controls output DOC (open-drain) that drives
the gate of an external MOS interrupter transistor. DPI is
controlled via the I

C-bus interface.

If DPI is set to logic 1, pin DOC will be pulled down to
switch-off the MOSFET to generate a line break. If DPI = 0
pin DOC is high-ohmic and the interrupter transistor will
conduct the line current.

Sending channel

The PCA1070 has symmetrical microphone inputs and
accepts input signals of maximum 70 mV (peak) for
THD = 2% (V

2.5 V). Its input impedance is 100 k

and its gain is default 41 dB. Dynamic, magnetic,
piezoelectric and electret (with built-in FET source
follower) microphones can be used. Some possible
microphone arrangements are shown in Fig.5.

The gain of the sending channel can be programmed
between 30 dB and 51 dB in 1 dB steps using bit code
GMAx (6 bits). The gain of the microphone preamplifier is
20 dB (with dynamic limiter not active) and GMAx sets the
gain of the `sending prog-amp' (allowed range
G

= 4 to 25 dB). The gain of the line interface is 6 dB.

Thus the total gain of the sending channel (G

) is as

follows:

= 20 + G

+ 6 (dB)

Default: G

= 20 + 15 + 6 = 41 dB

Where G

= `gain sending prog-amp'.

Programming the gain of the `sending prog-amp' is given
in Table 13.

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

Fig.5 Microphone arrangements.

handbook, full pagewidth

(a)

(b)

VSS

MIC

(c)

VSS

MIC

(d)

VSS

MIC

MGE341

(a) Dynamic or piezo.

(b) Low impedance electret with built-in pre-amplifier.

(d) Symmetrical connection of electret.

Dynamic limiter

To prevent distortion of the transmitted speech signal, the
gain of the microphone amplifier is reduced rapidly when
signal peaks on the line exceed an internally determined
threshold level. The time in which the gain is reduced, the
attack time, is very short. The circuit stays in this
gain-reduced condition until the peaks of the sending
signal remain below the threshold level. The sending gain
then returns to normal after a time also determined on the
chip, the release time. The threshold level of the AC
peak-to-peak line voltage on pin LN is default at
3.5 V (p-p). A level of 2.6 V (p-p) can be programmed by
setting bit code DLT to logic 1.

The internal threshold level is lowered automatically if the
DC voltage setting of the circuit (V

SLPE

) is not high enough

to reach the programmed level. Also when the DC current
in the transmit output stage is insufficient to drive the line
load, the internal threshold level is lowered automatically.

Dynamic limiting considerably improves sidetone
performance in over-drive conditions (less distortion and
limited sidetone level).

DTMF channel

The PCA1070 has an asymmetrical DTMF input. Its input
impedance is 200 k

// 45 pF and its gain is default at

21 dB. DTMF signals can be sent to the line by setting
control bit `Sending Mute' (SM) to logic 1 (default SM = 0);
by setting `Receiving Mute' (RM) also to logic 1 (default
RM = 0), the dialling tones are also sent to the receiving
output to generate a confidence tone in the earpiece.

The gain between the DTMF input and the line LN can be
programmed between 1 dB and 21 dB in 1 dB steps using
bit code GMAx (6 bits). The confidence tone gain
(between DTMF input and earpiece outputs QR) can be
programmed between

40 dB and

19 dB (symmetrical

drive of earpiece) using bit code GRAx (6 bits). GMAx sets
the gain of the `sending prog-amp' (recommended range in
DTMF mode for G

5 to 15 dB) and GRAx sets the

gain of the `rec prog-amp' (allowed range
G

25 to 0 dB).

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

The total gain of the DTMF channel between the DTMF
input and the line LN is as follows:

DTMF

= G

+ 6 (dB)

Default G

DTMF

= 15 + 6 = 21 dB

The confidence tone gain (DTMF to QR outputs) is:

With symmetrical drive of earpiece G

CTs

= G

19 (dB)

Default G

CTss

19 =

25 dB.

At low gain settings (G

10 dB), the confidence tone

gain will be slightly higher than the calculated value. This
is caused by a residual signal.

Programming the gain of the `sending prog-amp' and the
`rec prog-amp' is given in Table 13.

Receiving channel

The gain of the receiving channel is defined between the
line connection LN and the earpiece outputs QR+ and
QR

. Its voltage gain is default

6 dB (differential drive).

The LN terminal accepts receiving signals up to 1 V (RMS)
for THD = 2%. The outputs may be used to connect
dynamic, magnetic or piezoelectric earpieces with
single-ended or differential drive. The load select bit RFC
is set default to logic 1 to guarantee stable operation in
case of a capacitive load (piezoelectric earpiece). With a
resistive load (dynamic capsule) RFC should be set to
logic 0 via the I

C-bus interface to obtain optimum

performance with respect to distortion and bandwidth.

Two levels for hearing protection can be selected via the
I

C-bus interface with control bit HPL.

The earpiece arrangements are illustrated in Fig.6.

Fig.6 Earpiece arrangements.

handbook, halfpage

MGE340

(a)

symmetrical

(b)

single-ended

VSS

The gain of the receiving channel can be programmed
between

19 dB and +11 dB (symmetrical drive) in 1 dB

steps using bit code GRAx (6 bits).

GRAx sets the gain of the `rec prog-amp' (allowed range
G

19 dB to +11 dB; default G

6 dB).

The total gain of the receiving channel is as follows:

Symmetrical drive G

= G

(dB)

Default G

6 dB.

Asymmetrical or single-ended drive G

= G

6 (dB)

Default G

6 (dB) =

12 dB.

Programming the gain G

of the `rec prog-amp' is given in

Table 13.

Sidetone balance

The PCA1070 has an on-chip anti-sidetone circuit.
An internal balance impedance Z

oss

can be programmed

via the I

C-bus interface to match the external line

impedance Z

line

to give optimum sidetone suppression.

oss

= R

+ (R

// C

Programming the sidetone balance impedance is given in
Tables 14, 15 and 16.

Line current control

The DC line current can be read via the I

C-bus interface.

This information can be used for the adaptation of
transmission parameters (for example line loss
compensation, sidetone balance and DC characteristic).

The bit code LCx as a function of line current is given in
Table 17.

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

C-BUS PROGRAMMING

Table 1

Programmable parameters

The following parameters (see Fig.1) can be programmed by means of a bit code via the I

C-bus:

Table 2

Readable parameters

The following parameters (see also Fig.1) can be read as a bit code via the I

C-bus:

C interface

The I

C-bus interface (see

"The I

C-bus and how to use it" 12NC: 9398 393 40011) is used to program the transmission

parameters and control functions.

Table 3

Device address

All functions can be accessed by writing an 8-bit word to the PCA1070. In order to set up the PCA1070, a control
message consisting of the device address, a R/W bit, a subaddress byte and one or more data bytes must be written to
the PCA1070. If more than one data byte follows the subaddress, these bytes are stored in the successive registers by
the automatic increment feature.

SYMBOL

PARAMETER

BLOCK

BITS

DESCRIPTION

VDCx

SLPE

line interface

DC voltage SLPE-V

ZSAx

set impedance

line interface

of set impedance

ZSBx

line interface

of set impedance

ZSPx

line interface

(pole frequency) of set impedance

DST

line interface

DC Start Time

PDx

power control

Power-Down

DPI

power control

Dial Pulse Input

RRG

power control

Reset RinG detector

HPL

maximum receiving level

BTL receiving output

Hearing Protection Level

RFC

load select

BTL receiving output

Resistive/Capacitive load

ZOSAx

sidetone impedance

anti-sidetone

of sidetone impedance

ZOSBx

anti-sidetone

of sidetone impedance

ZOSPx

anti-sidetone

of sidetone impedance

receiving mute

Receiving Mute

GRAx

gain G

receiving prog-amp

Gain receiving prog-amp

GMAx

gain G

sending prog-amp

Gain sending prog-amp

sending mute

Sending Mute

DLT

threshold

dynamic limiter

Dynamic Limiter Threshold

SYMBOL

PARAMETER

BLOCK

BITS

DESCRIPTION

PRES

power control

PCA1070 Reset

LCx

line current

gain control

Line Current

R/W

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

Table 4

The control word format for the slave receiver

Note

1. This bit is R/W.

Table 5

Bit arrangement of each data byte used in the control word: PCA1070 receive (see note 1)

Note

1. The bits that are not indicated must be set to logic 0.

Table 6

The control word format for the slave transmitter

Note

1. Change in direction of R/W bit.

Table 7

PCA1070 send

Notes

1. Indicates if PCA1070 has received internal reset; PRES will be set to logic 1 with internal reset and is set to logic 0

after reading the register via the I

C-bus.

2. Information about value of line current.

DEVICE ADDRESS

SUB ADDRESS

DATA/CONTROL BYTE

0 0 0 1 0

(1)

I0 A D7 D6 D5 D4 D3 D2 D1 D0 A P

FUNCTION

SUB

ADDRESS

DC voltage

H00

VDC2

VDC1

VDC0

DST

Sidetone and set
impedance

H01

ZOSB3

ZOSB2

ZOSB1

ZOSB0

ZOSA3

ZOSA2

ZOSA1

ZOSA0

H02

ZOSP3

ZOSP2

ZOSP1

ZOSP0

ZSA2

ZSA1

ZSA0

H03

ZSB2

ZSB1

ZSB0

ZSP3

ZSP2

ZSP1

ZSP0

Sending channel

H04

DLT

GMA5

GMA4

GMA3

GMA2

GMA1

GMA0

Receiving
channel

H05

RFC

HPL

GRA5

GRA4

GRA3

GRA2

GRA1

GRA0

Control

H06

PD1

PD0

RRG

DPI

DEVICE ADDRESS

DATA/STATUS BYTE

(1)

FUNCTION

PCA1070 status

PRES

(1)

LC4

(2)

LC3

(2)

LC2

(2)

LC1

(2)

LC0

(2)

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

Table 10 Programming R

Notes

1. For Z

set

combinations where R

= 0 only R

= 600

is allowed. If R

500

it is obligatory that R

= 0. This is to

safeguard stable operation of the line interface under all practical conditions. If Z

ref

requires R

= 0 and R

600

use R

= 100

instead and reduce the original R

by 100

2. X = don't care.

Table 11 Programming pole frequency:

Notes

2. X = don't care.

Reset functions

Monitoring of internal reset PCA1070.

Table 12 Status bit PRES

ZSB2

ZSB1

ZSB0

(

)

REMARK

note 1

600

700

800

default

900

note 2

1000

note 2

ZSP3

ZSP2

ZSP1

ZSP0

(Hz)

CORRESPONDING VALUE OF C (nF)

(1)

REMARK

(600

)

(700

)

(800

)

(900

)

(1000

)

828

320

275

240

214

192

1095

242

207

182

161

145

1448

183

157

137

122

110

1915

139

119

104

default

2533

105

3350

4430

5859

12000

note 2

PRES

DESCRIPTION

internal reset has occurred; default values in all registers

C-bus interface

-------------------------------

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

Programmable amplifier (prog-amp)

An identical programmable amplifier called `prog-amp' is used both in the sending and receiving channel. The bit codes
GMAx and GRAx are given in Table 13. The permitted adjustment range differs for the two amplifiers and is also different
for DTMF and speech mode. This is indicated in the corresponding sections.

Table 13 Bit code prog-amp

GAIN

(dB)

GMA5 GMA4 GMA3 GMA2 GMA1 GMA0

GRA5 GRA4 GRA3 GRA2 GRA1 GRA0

(1)

Notes

1. Default value `rec prog-amp' GRAx.

2. Default value `sending prog-amp' GMAx.

+10

+11

+12

+13

+14

+15

(2)

+16

+17

+18

+19

+20

+21

+22

+23

+24

+25

GAIN

(dB)

GMA5 GMA4 GMA3 GMA2 GMA1 GMA0

GRA5 GRA4 GRA3 GRA2 GRA1 GRA0

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

Sidetone balance impedance

Internal balance impedance Z

oss

to match the external line

impedance Z

line

to give optimum sidetone suppression.

oss

= R

+ (R

// C

The optimum setting of R

depends on the value of the set

impedance. To safeguard stable operation of the
anti-sidetone circuit under all practical conditions, the
following condition must be fulfilled: R

0.5R

Table 14 Programming R

Note

1. Default value.

ZOSA3 ZOSA2 ZOSA1 ZOSA0

(

)

134

153

193

221

246

277

295

341

369

443

492

(1)

Table 15 Programming R

Note

1. Default value.

Table 16 Programming C

Note

1. Default value.

ZOSB

(

)

MSB

LSB

465

637

710

803

893

1003

1259

(1)

1410

1572

1773

1978

2216

ZOSP

(nf)

MSP

LSP

105

121

134

(1)

145

166

186

207

232

259

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

CHARACTERISTICS

All parameters are measured in the test circuit of Fig.7 under the conditions specified in Tables 18 and 19; unless
otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

DC line interface: LN, TX, SLPE and REG

line

line current operating
range

140

reduced sending level

SLPE

DC voltage at SLPE

with or without clock

4.3

4.7

5.1

SLPE(min)

minimum selectable value

VDCx = 000

2.8

3.1

3.4

SLPE(max)

maximum selectable value VDCx = 111

5.4

5.9

6.4

SLPE(step)

step resolution

0.4

SLPE

DC voltage at SLPE

with or without clock;
fast start-up; DST = 1

4.7

SLPE(min)

minimum selectable value

fast start-up; DST = 1;
VDCx = 000

3.1

SLPE(max)

maximum selectable value fast start-up; DST = 1;

VDCx = 111

5.9

SLPE(step)

step resolution

fast start-up; DST = 1

0.4

SLPE

variation with temperature

at T

amb

C to +60

C with

respect to 25

DC line voltage at LN

with or without clock

4.6

5.0

5.4

line

= 12 mA

4.83

line

= 120 mA

6.5

7.0

7.5

DC line voltage at LN at
low line current

with or without clock;
I

line

= 0.25 mA

line

= 2 mA

1.9

line

= 4 mA

3.4

line

= 7 mA

4.73

5.2

DC start-up time

VDD

= 470

F; no clock; note 1

145

TX:

DRIVE OUTPUT FOR EXTERNAL

PNP

output voltage at TX

external PNP disconnected;
V

SLPE

= 2 V; V

REG

= 1.5 V;

= V

VMC

= 2.5 V; I

= 0 mA

1.45

SLPE

= 3 V; V

REG

= 2.5 V;

= V

VMC

= 2.5 V; I

= 1.6 mA

2.2

switching time DC voltage
at SLPE

SLPE

steps from 3.1 V to 5.9 V;

note 2

SLPE

steps from 5.9 V to 3.1 V;

note 2

fast start-up; DST = 1; V

SLPE

steps

from 3.1 V to 5.9 V; note 2

0.5

fast start-up; DST = 1; V

SLPE

steps

from 5.9 V to 3.1 V; note 2

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

Supplies: V

, VMC, V

and SLPE

operating supply voltage

note 3

2.5

relaxed performance; note 4

1.8

2.5

;

SUPPLY PIN

internal current
consumption

= 2.5 V

2.3

power-down; PDx = 01; SCL = 1;
SDA = 1

100

standby; PDx = 11; SCL = 1;
SDA = 1

PERIPHERAL SUPPLY

current available for
peripheral circuitry

= 2.9 V; RM = 1; SM = 1

4.9

= 2.5 V; RM = 1; SM = 1

6.5

VMC:

SENSE INPUT MICROCONTROLLER SUPPLY VOLTAGE

VMC

input current

VMC

= 2.5 V

power-down; PDx = 01;
V

VMC

= 2.5 V; SCL = 1; SDA = 1

standby; PDx = 11; V

VMC

= 2.5 V;

SCL = 1; SDA = 1

SUPPLY OUTPUT FOR ELECTRET MICROPHONE

output voltage

= 500

1.6

1.9

output impedance

f = 300 Hz

PSR

power supply rejection

f = 300 Hz; note 5

Reset functions: V

, VMC and RMC

NTERNAL RESET

DD(sw)

switching level of V

below which internal reset
is active

amb

10 to +60

C; note 6

1.0

1.2

1.4

RMC:

RESET OUTPUT FOR MICROCONTROLLER

VMC(sw)

voltage level at pin VMC
where RMC changes state

note 7

1.8

2.0

2.2

power-down; PDx = 01; note 7

1.8

2.0

2.2

standby; PDx = 11; note 7

1.8

2.1

2.4

VMC

voltage variation with
ambient temperature

amb

10 to +60

mV/

power-down; PDx = 01;
T

amb

10 to +60

mV/

standby; PDx = 11;
T

amb

10 to +60

mV/

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

Sending channel: MIC+, MIC

, DTMF, OMIC, LN, SCR, REG and LSI

MIC+

AND

MIC

MICROPHONE INPUTS

MIC

input impedance

differential

100

single-ended

CMRR

MIC

common mode rejection
ratio

note 8

MIC(peak)

allowed input signal
voltage level (peak value)

gain MIC+/MIC

to LN

39.5

42.5

M(min)

minimum selectable gain

GMAx = 000100

28.5

31.5

M(max)

maximum selectable gain

GMAx = 011001

49.5

52.5

(

step)

step resolution

gain variation with
frequency

at f = 300 Hz and 3400 Hz with
respect to 1 kHz; note 9

+0.3/

0.7

gain variation with ambient
temperature

at T

amb

10 to +60

C with

respect to 25

0.2

gain variation with line
current

at I

line

= 100 mA with respect to

20 mA; note 9

0.5

ACM

AC start-up time

VDD

= 470

F; note 10

150

Sending mute/privacy switch

reduction of G

SM = 1

100

DTMF:

DUAL TONE MULTI

FREQUENCY INPUT

DTMF

parallel input resistance

SM = 1

100

200

DTMF

parallel input capacitance

SM = 1

DTMF

gain from DTMF to LN

SM = 1

DTMF(min)

minimum selectable gain

SM = 1; GMAx = 100101

DTMF(max)

maximum selectable gain

SM = 1; GMAx = 001111

DTMF(step

)

step resolution

SM = 1

DTMF

gain variation with
frequency

SM = 1; at f = 300 Hz and 3400 Hz
with respect to 1 kHz; note 9

+0.3/

0.7

gain variation with ambient
temperature

SM = 1; at T

amb

10 to +60

with respect to 25

0.2

gain variation with line
current

SM = 1; at I

line

= 100 mA with

respect to 20 mA; note 9

0.5

Confidence tone

CTS

gain from DTMF to
QR+/QR

;

RM = 1; SM = 1; notes 11 and 12

CTS(min)

minimum selectable gain

RM = 1; SM = 1; GRAx = 111001

CTS(max)

maximum selectable gain

RM = 1; SM = 1; GRAx = 100000

CTS(step

)

step resolution

RM = 1; SM = 1

0.5 to 1

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

OMIC:

MICROPHONE PREAMPLIFIER OUTPUT

OMIC

output impedance

400

OMIC

gain from MIC+/MIC

OMIC

dynamic limiter not active; note 13

LN:

SENDING CHANNEL OUTPUT

; notes 14 and 15

BRL

balance return loss Z

with Z

ref

= 220

(820

// 115 nF)

line

; f = 300 Hz

line

; f = 1 kHz

line

; f = 3.4 kHz

Selectable values for Z

set

= R

+ (R

// C) with C = 1/(2

); note 16

non-shunted resistance of
Z

set

200

a(min)

minimum selectable value
for R

ZSAx = 001; note 17

a(max)

maximum selectable
value for R

ZSAx = 11x

600

a(step)

step resolution for R

100

shunted resistance of Z

set

800

b(min)

minimum selectable value
for R

ZSBx = 001; notes 17 and 18

600

b(max)

maximum selectable
value for R

ZSBx = 1x1

1000

b(step)

step resolution for R

100

pole frequency
determining shunt
capacitance C

1915

p(min)

minimum selectable f

ZSPx = 0000

828

p(max)

maximum selectable f

ZSPx = 0111; note 19

5859

multiplication factor for f

(x + 1) = n

(x)]

1.322

LN(noise)

noise output voltage

psophometrically weighted
(O41 curve)

dBmp

Dynamic limiter

LN(p-p)

threshold of dynamic
limiter (peak-to-peak)

3.1

3.5

3.9

DLT = 1

2.2

2.6

3.0

low voltage condition;
V

SLPE

= 3.1 V

2.4

low current condition; I

line

= 9 mA

2.6

THD

total harmonic distortion

= 12 mV (RMS) + 10 dB

2.5

5.0

Dynamic behaviour of limiter; note 20

att

attack time

steps from 12 to 38 mV (RMS)

1.5

rel

release time

steps from 38 to 12 mV (RMS)

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

SCR:

PIN FOR SENDING CURRENT RESISTOR

SCR

voltage at pin SCR

0.28

reduced sending gain;
G

= 30 dB; GMAx = 000100

0.26

line

= 12 mA

0.22

line

= 7 mA

0.13

Receiving channel: LN, LSI, OREC, QR+ and QR

QR+, QR

RECEIVING AMPLIFIER OUTPUTS

QR+,

QR-

output impedance

single-ended

gain from LN to QR+/QR-

note 21

7.5

-6

4.5

RS(min)

minimum selectable gain

GRAx = 110011

20.5

17.5

RS(max)

maximum selectable gain

GRAx = 001011

9.5

11.0

12.5

RS(step)

gain step resolution

gain variation with
frequency

at f = 300 Hz and 3400 Hz with
respect to 1 kHz; note 9

0.5

gain variation with
temperature

at T

amb

10 to +60

C with

respect to 25

0.2

gain variation with line
current

at I

line

= 100 mA with respect to

20 mA; note 9

0.5

ACR

AC start-up time

VDD

= 470

F; note 10

140

QR(p-p)

maximum output voltage
swing (peak-to-peak)

= 5 V; GRAx = 001011;

; RFC = 1;

= 2 V (RMS)

2.3

HPL = 1; V

= 5 V;

GRAx = 001011; R

;

RFC = 1; V

= 2 V (RMS)

5.9

QR(rms)

output voltage (RMS
value); THD = 2%

HPL = 1; GRAx = 000011; note 22

0.45

HPL = 1; R

= 450

;

GRAx = 000011; note 22

0.84

RFC = 1; C

= 80 nF; f = 3.4 kHz;

GRAx = 000011; note 22

0.9

single-ended; HPL = 1;
Z

= 150

+ 100

F at QR

;

GRAx = 001001; note 22

0.45

QR(noise

)

noise output voltage

psophometrically weighted
(O41 curve)

dBmp

QR(offset)

DC offset voltage between
QR+/QR

100

OREC:

OUTPUT RECEIVE PREAMPLIFIER

OREC

output impedance

1000

OREC

gain from LN to OREC

note 13

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

Selectable values for Z

oss

= R

// C

); note 23

non-shunted resistance of
Z

oss

492

sa(min)

minimum selectable value
R

ZOSAx = 0000

134

sa(max)

maximum selectable
value for R

ZOSAx = 1010; note 24

492

shunted resistance of Z

oss

1259

sb(min)

minimum selectable value
for R

ZOSBx = 0000

465

sb(max)

maximum selectable
value for R

ZOSBx = 1011; note 24

2216

shunt capacitance of Z

oss

134

s(min)

minimum selectable value
for C

ZOSPx = 0001; note 25

s(max)

maximum selectable
value for C

ZOSPx = 1111; note 24

259

Sidetone suppression; note 26

STS

gain from MIC+/MIC

QR+/QR

line

= 492

+ (1259

// 134 nF);

f = 300 Hz

line

= 492

+ (1259

// 134 nF);

f = 1 kHz

line

= 492

+ (1259

// 134 nF);

f = 3.4 kHz

Dial output connection: DOC (open-drain output)

DOC

output sink current

DOC

= 12 V

100

DPI = 1; V

DOC

= 0.4 V; V

= 2.5 V 200

400

Line current control: LN and SLPE

line(min)

minimum value of DC line
current that can be read as
a bit code via the I

C-bus

LCx = 00001

line(max)

maximum value of DC line
current that can be read as
a bit code via the I

C-bus

LCx = 11110

line(step)

DC line current step
resolution

note 27

2.5

C-bus inputs/outputs: SDA and SCL

in accordance with
standard

note 28

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

Notes

1. Time needed to reach at start-up the default DC voltage V

SLPE

(

10% from its final value):

a) Time depends strongly on the value of the capacitor(s) at V

and VMC; with a lower value of C

VDD

the DC

start-up time decreases.

b) The start-up time can be reduced considerably by programming the bit code DST = 1 during the start-up

procedure. In practice this is possible as soon as the microcontroller has become operational.

2. Time needed to reach the DC voltage V

SLPE

within

10% from its final value) after reprogramming VDCx.

3. The supply voltage V

is determined by the regulated DC voltage at pin SLPE and by the voltage drop between

pin SLPE and V

; see Chapter "Functional description".

4. Relaxed performance means: parameters can deviate from their specified values.

5. Rejection between supply pin V

and V

. Rejection between pin LN and V

can be calculated by adding the

attenuation of the first-order low-pass filter (R = 250

, C = 150

F) between SLPE and V

6. If V

is above this level, the default values have been loaded into the internal registers.

7. RMC changes from logic 1 to logic 0 when voltage on pin VMC is increasing; RMC changes from logic 0 to logic 1

when voltage on pin VMC is decreasing; see Fig.4.

8. Common mode signal is applied via 2

470

external resistors connected to pins MIC+ and MIC

9. Not tested, guaranteed by design.

10. Time needed to reach default settings (

3 dB).

11. At low gain settings the confidence tone gain will be slightly higher than the specified value due to a residual signal.

12. G

CTA

, the confidence tone gain for asymmetrical drive, equals G

CTS

6 (in dB).

13. To be left open-circuit in application.

14. The AC set impedance between pin LN and V

consists of R

+ (R

// C) in parallel with an artificial inductor L

and

internal resistors R

and R

LSI

and internal capacitor C

. See Chapter "Functional description".

15. Balance Return Loss indicates the deviation of an impedance with respect to a reference impedance.

BRL = 20 log

+ Z

ref

)/(Z

ref

)

where Z

+ (R

// C) is the impedance seen into pin LN

ref

= R

a(ref)

+ (R

b(ref)

// C

ref

) is the reference impedance.

16. Without clock the set impedance is automatically set to Z

set

= 600

(typical).

17. The combination R

= 0 and R

= 0 is not allowed (see Tables 9 and 10, note 1).

18. Value logic 0 can also be programmed.

19. Value f

= 12 kHz can also be programmed.

20. Attack and release times are also valid under low current and voltage conditions.

21. G

, the receiving channel gain for asymmetrical drive equals G

6 (in dB).

22. The maximum possible output swing depends on the DC conditions (the programmed voltage V

SLPE

and the load on

the supply pin V

) and on the gain setting of the receiving channel.

Clock input: CLK

CLK(p-p)

input signal voltage level
(peak-to-peak value)

200

VMC

CLK

frequency tolerance

note 29

0.5

CLK

input series resistance

800

CLK

input series capacitance

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

23. The internal balance impedance Z

oss

to match the external load impedance at pin LN (Z

line

= Z

oss

) for optimum

sidetone suppression; Z

oss

= R

+ (R

// C

); without clock the sidetone balance impedance is automatically set to

oss

= 600

(typical).

24. Other values can be found in Tables 14, 15 and 16.

25. Value C

= 5 nF can also be programmed.

26. Gain sending channel G

= default (typical 41 dB); gain receiving channel G

rec

= default (typical

6 dB); sidetone

gain G

STS

minimum sidetone suppression at f = 300 Hz and 3400 Hz is: G

+ G

st(max)

= 41

15 = 20 dB.

STA

, the sidetone gain for asymmetrical drive equals G

STS

6 (in dB).

27. Indication only; exact values can be found in Table 16.

28. Standard I

C-bus specifications are valid for V

2.5 V. Relaxed specifications for V

= 1.8 to 2.5 V.

29. Recommended accuracy of input frequency; a higher tolerance will cause parameters to deviate from their specified

values; note that all parameters are specified with the reference input clock frequency f

clk

= 3.579545 MHz.

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

TEST AND APPLICATION INFORMATION

The test circuit is illustrated in Fig.7. The basic application circuit is illustrated in Fig.8. An interrupter with an N-channel
depletion MOS transistor (e.g. BSD254A or BSP124) is shown. It is intended for applications where a low DC line voltage
is required. An interrupter with an N-channel enhancement MOS transistor (e.g. BSN304A or BSP130) can be used for
applications where a relatively high DC line voltage is allowed.

An application circuit for applications where a low DC line voltage and long line interrupts are required, is illustrated in
Fig.9 (interrupter with an N-channel depletion MOS transistor).

Fig.7 Test circuit of the PCA1070.

Definitions:

Gain sending channel G

= 20 log (V

MIC

) with S1 in position 1; V

DTMF

= 0.

Gain DTMF amplifier G

DTMF

= 20 log (V

DTMF

) with S1 in position 1; V

= 0.

Gain receiving channel G

rec

= 20 log (V

) with S1 in position 2; V

= 0.

Sidetone gain G

= 20 log (V

MIC

) with S1 in position 1; V

DTMF

= 0.

handbook, full pagewidth

MGE345

100

250

150

DOC

SCR

LSI LN SLPE REG

PCA1070

VDD

VMC

SDA

SCL

CLK

DTMF

RMC

TST

OMIC

Vref

OREQ VP MIC

MIC

VSS

470 nF

100

3.3

100

C-BUS

MASTER

TRANSCEIVER

VLN

Zline

IDOC

Vrec

Iline

12 to 140

ITX

VDOC

VDTMF

Vclk

5 V

VMIC

IVP

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

UNIT

max.

(1)

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC

JEDEC

EIAJ

inches

2.65

0.30
0.10

2.45
2.25

0.49
0.36

0.32
0.23

15.6
15.2

7.6
7.4

1.27

10.65
10.00

1.1
1.0

0.9
0.4

8
0

0.25

0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

1.1
0.4

SOT137-1

detail X

(A )

0.25

075E05

MS-013AD

pin 1 index

0.10

0.012
0.004

0.096
0.089

0.019
0.014

0.013
0.009

0.61
0.60

0.30
0.29

0.050

1.4

0.055

0.419
0.394

0.043
0.039

0.035
0.016

0.01

0.25

0.01

0.004

0.043
0.016

0.01

10 mm

scale

SO24: plastic small outline package; 24 leads; body width 7.5 mm

SOT137-1

95-01-24
97-05-22

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

SOLDERING

Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

"IC Package Databook" (order code 9398 652 90011).

DIP

OLDERING BY DIPPING OR BY WAVE

The maximum permissible temperature of the solder is
260

C; solder at this temperature must not be in contact

with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T

stg max

). If the

printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.

EPAIRING SOLDERED JOINTS

Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300

C it may remain in

contact for up to 10 seconds. If the bit temperature is
between 300 and 400

C, contact may be up to 5 seconds.

EFLOW SOLDERING

Reflow soldering techniques are suitable for all SO
packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45

AVE SOLDERING

Wave soldering techniques can be used for all SO
packages if the following conditions are observed:

A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used

The longitudinal axis of the package footprint must be
parallel to the solder flow

The package footprint must incorporate solder thieves at
the downstream end.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260

C, and

maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150

C within

6 seconds. Typical dwell time is 4 seconds at 250

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

EPAIRING SOLDERED JOINTS

Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300

C. When

using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320

1997 Jun 20

Philips Semiconductors

Product specification

Multistandard programmable analog
CMOS transmission IC

PCA1070

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

PURCHASE OF PHILIPS I

C COMPONENTS

Data sheet status

Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification

This data sheet contains preliminary data; supplementary data may be published later.

Product specification

This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of this specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

Purchase of Philips I

C components conveys a license under the Philips' I

C patent to use the

components in the I

C system provided the system conforms to the I

C specification defined by

Philips. This specification can be ordered using the code 9398 393 40011.

Internet: http://www.semiconductors.philips.com

Philips Semiconductors a worldwide company

SCA54

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

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Printed in The Netherlands

417027/00/03/pp36

Date of release: 1997 Jun 20

Document order number:

9397 750 00949

Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: PCA1070T

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: PCA1070T