1996 Dec 12
2
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
FEATURES
Two protected I/O lines
V
CC
regulation (5 V
4%, 100 mA max. with controlled
rise and fall times)
V
PP
generation (12.5, 15 or 21 V
2.5%, 50 mA max.
programmable by two bits, with controlled rise and fall
times)
Clock generation (up to 8 MHz)
Short-circuit, thermal and card extraction protections
Two voltage supervisors (digital and analog supplies)
Automatic activation and deactivation sequences via an
independent internal clock
Enhanced ESD protections on card connections
(4 kV min.)
ISO 7816 approval.
APPLICATIONS
Pay TV
Telematics
Cashless payment
Multipurpose card-readers, etc.
GENERAL DESCRIPTION
The TDA8000 is a complete, low-cost analog interface
which can be positioned between a smart card or a
memory card (ISO 7816) and a microcontroller. It is
approved for banking, telecom and pay TV applications.
The complete supply, protection and control functions are
realized with only a few external components, which
makes the TDA8000 very attractive for consumer
applications. Application suggestions and support is
available on request (see examples in
Chapter "Application information").
QUICK REFERENCE DATA
ORDERING INFORMATION
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
DD
supply voltage
6.7
-
18
V
I
DD
supply current
idle mode; V
DD
= 12 V
-
25
-
mA
active modes; unloaded
-
32
-
mA
V
th2
threshold voltage on V
SUP
4.5
-
4.68
V
V
CC
card supply voltage
4.8
5.0
5.2
V
I
CC
card supply current
-
-
-
100
mA
V
H
high voltage supply for V
PP
-
-
30
V
I
PP
programming current
read mode; V
PP
= 5 V
-
-
-
50
mA
write mode; V
PP
> 5 V
-
-
-
50
mA
t
de
, t
act
deactivation/activation cycle
duration
-
-
500
s
P
tot
continuous total power
dissipation
TDA8000; T
amb
= +70
C;
see Fig.10
-
-
2
W
TDA8000T; T
amb
= +70
C;
see Fig.11
-
-
0.92
W
T
amb
operating ambient temperature
0
-
+70
C
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
TDA8000
DIP28
plastic dual in-line package; 28 leads (600 mil)
SOT117-1
TDA8000T
SO28
plastic small outline package; 28 leads; body width 7.5 mm
SOT136-1
1996 Dec 12
4
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
PINNING
SYMBOL PIN
DESCRIPTION
XTAL
1
crystal connection
I/O2
2
data line to/from the card
I/O1
3
data line to/from the card
RST
4
card reset output
CLK
5
clock output to the card
PSEL1
6
programming voltage selection input (see Table 1)
PSEL2
7
programming voltage selection input (see Table 1)
PRES
8
card presence contact input (active LOW)
PRES
9
card presence contact input (active HIGH)
V
PP
10
card programming voltage output
V
H
11
high voltage supply for V
PP
generation
GND
12
ground
V
DD
13
positive supply voltage
V
CC
14
card supply output voltage
V
SUP
15
voltage supervisor input
DELAY
16
external capacitor connection for delayed reset timing
ALARM
17
open-collector reset output for the microcontroller (active
HIGH)
ALARM
18
open-collector reset output for the microcontroller (active
LOW)
OFF
19
interrupt output to the microcontroller (active LOW)
START
20
microcontroller input for starting session (active LOW)
WRITE
21
control input for applying programming voltage to the card
(active LOW)
CVNC
22
internally generated 5 V reference, present when V
DD
is
on; to be decoupled externally (47 nF)
CLKDIV
23
input for dividing/not dividing the CLKOUT frequency by
two (active LOW)
CLKIN
24
external clock signal input
CLKOUT
25
clock output to the microcontroller, or another TDA8000
RSTIN
26
card reset input from the microcontroller (active HIGH)
I/O2(
C)
27
data line to/from the microcontroller; must not be left
open-circuit, tie to CVNC if not used
I/O1(
C)
28
data line to/from the microcontroller; must not be left
open-circuit, tie to CVNC if not used
Fig.2 Pin configuration.
fpage
TDA8000
TDA8000T
MBH809
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
XTAL
I/O2
I/O1
RST
CLK
PSEL1
PSEL2
PRES
PRES
VPP
VDD
VCC
VH
GND
I/O1(
C)
I/O2(
C)
RSTIN
CLKOUT
CLKIN
CLKDIV
CVNC
WRITE
START
OFF
ALARM
ALARM
DELAY
VSUP
1996 Dec 12
5
Philips Semiconductors
Product specification
Smart card interface
TDA8000; TDA8000T
FUNCTIONAL DESCRIPTION
Power supply
The circuit operates within a supply voltage range of
6.7 to 18 V. V
DD
and GND are the supply pins. All card
contacts remain inactive during power-up or power-down,
provided V
DD
does not rise or fall too fast (0.5 V/ms typ.).
P
OWER
-
UP
The logic part is powered first and is in the reset condition
until V
DD
reaches V
th1
. The sequencer is blocked until V
DD
reaches V
th4
+ V
hys4
.
P
OWER
-
DOWN
When V
DD
falls below V
th4
, an automatic deactivation of
the contacts is performed.
Voltage supervisor
This block surveys the 5 V supply of the microcontroller
(V
SUP
) in order to deliver a defined reset pulse and to avoid
any transients on card contacts during power-up or
power-down of V
SUP
.
The voltage supervisor remains active even if V
DD
is
powered-down.
P
OWER
-
UP
As long as V
SUP
is below V
th2
+ V
hys2
the capacitor C
DEL
,
connected to the pin DELAY, will be discharged. When
V
SUP
rises to the threshold level, C
DEL
will be recharged.
ALARM and ALARM remain active, and the sequencer is
blocked until the voltage on the pin DELAY reaches V
th3
.
P
OWER
-
DOWN
(see Fig.3)
If V
SUP
falls below V
th2
, C
DEL
will be discharged, ALARM
and ALARM become active, and an automatic deactivation
of the contacts is performed.
Clock circuitry (see Fig.4)
The clock signal (CLK) can be applied to the card by two
different methods:
1. Generation by a crystal oscillator: the crystal
(3 to 11 MHz) is connected to pin XTAL. Its frequency
is divided by two.
2. Use of a signal frequency already present in the
system and connected to the pin CLKIN (up to 8 MHz).
Pin XTAL has to be connected to GND via a 1 k
resistor. In this event, the CLKOUT signal remains
LOW.
In both events the signal is buffered and enabled.
Pin CLKOUT may be used to clock a microcontroller.
The signal (
1
/
2
f
xtal
or f
xtal
if CLKDIV is HIGH) is available
when the circuit is powered up.
State diagram
Once activated, the circuit has six possible modes of
operation:
Idle
Activation
Read
Write
Deactivation
Fault.
Figure 5 shows how these modes are accessible.
I
DLE MODE
After reset, the circuit enters the IDLE state. A minimum
number of circuits are active while waiting for the
microcontroller to start a session:
All card contacts are inactive
Voltage generators are stopped
Oscillator is running, providing CLKOUT
Voltage supervisor is active
Pins I/O1(
C) and I/O2(
C) are high impedance.
The OFF line is HIGH if a card is present (PRES and
PRES active) and LOW if a card is not present.
A
CTIVATION SEQUENCE
From the IDLE mode, the circuit enters the ACTIVATION
mode when the microcontroller sets the START line
(active LOW). The I/O(
C) signals must not be LOW.
The internal circuitry is activated, the internal clock starts
and the following ISO 7816 sequence is performed:
1. V
CC
rises from 0 to 5 V
2. I/Os are enabled
3. V
PP
rises from 0 to 5 V
4. No change
5. CLK is enabled
6. RST is enabled.
The typical time interval between two steps is 32
s for the
first two steps and 64
s for the other three. Timing is
derived from the internal clock (see Fig.6).
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