1997 Nov 04

Philips Semiconductors

Product specification

IC card interface

TDA8002

FEATURES

Single supply voltage interface (3.3 or 5 V environment)

Low-power sleep mode

Three specific protected half-duplex bidirectional
buffered I/O lines

regulation (5 V

5%, I

<65 mA at V

= 5 V, with

controlled rise and fall times

Thermal and short-circuit protections with current
limitations

Automatic ISO 7816 activation and deactivation
sequences

Enhanced ESD protections on card side (>6 kV)

Clock generation for the card up to 12 MHz with
synchronous frequency changes

Clock generation up to 20 MHz (auxiliary clock)

Synchronous and asynchronous cards (memory and
smart cards)

ISO 7816, GSM11.11 compatibility and EMV (Europay,
Mastercard, Visa) compliant

Step-up converter for V

generation

Supply supervisor for spikes elimination and emergency
deactivation.

APPLICATIONS

IC card readers for:

GSM applications

banking

electronic payment

identification

Pay TV

road tolling.

GENERAL DESCRIPTION

The TDA8002 is a complete low-power, analog interface
for asynchronous and synchronous cards. It can be placed
between the card and the microcontroller. It performs all
supply, protection and control functions. It is directly
compatible with ISO 7816, GSM11.11 and EMV
specifications.

QUICK REFERENCE DATA

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supply

DDA

analog supply voltage

3.0

6.5

supply current

sleep mode

150

idle mode; f

CLK

= 2.5 MHz;

CLKOUT

= 10 MHz; V

= 5 V

active mode; f

CLK

= 2.5 MHz;

CLKOUT

= 10 MHz; V

= 5 V

active mode; f

CLK

= 2.5 MHz;

CLKOUT

= 10 MHz; V

= 3 V

Card supply

CC(O)

output voltage

DC load <65 mA

4.75

5.25

CC(O)

output current

short-circuited to GND

100

General

CLK

card clock frequency

MHz

deactivation cycle time

100

tot

continuous total power dissipation

TDA8002AT; TDA8002BT

amb

25 to +85

0.56

TDA8002G

amb

25 to +85

0.46

amb

operating ambient temperature

+85

1997 Nov 04

Philips Semiconductors

Product specification

IC card interface

TDA8002

PINNING

SYMBOL

PIN

I/O

DESCRIPTION

TYPE A

TYPE B

TYPE G

XTAL1

I/O

crystal connection or input for external clock

XTAL2

I/O

crystal connection

I/OUC

I/O

data I/O line to and from microcontroller

AUX1UC

I/O

auxiliary line to and from microcontroller for synchronous
applications

AUX2UC

I/O

auxiliary line to and from microcontroller for synchronous
applications

ALARM

open drain NMOS reset output for microcontroller (active LOW)

ALARM

open drain PMOS reset output for microcontroller (active
HIGH)

CLKSEL

control input signal for CLK (LOW = XTAL oscillator;
HIGH = STROBE input)

CLKDIV1

control input with CLKDIV2 for choosing CLK frequency

CLKDIV2

control input with CLKDIV1 for choosing CLK frequency

STROBE

external clock input for synchronous applications

CLKOUT

clock output (see Table 1)

DGND1

supply

digital ground 1

AGND

supply

analog ground

I/O

capacitance connection for voltage doubler

DDA

supply

analog supply voltage

I/O

capacitance connection for voltage doubler

VUP

I/O

output of voltage doubler (connect to 100 nF)

I/O

data I/O line to and from card

AUX2

I/O

auxiliary I/O line to and from card

PRES

active LOW card input presence contact

PRES

active HIGH card input presence contact

AUX1

I/O

auxiliary I/O line to and from card

CLK

clock to card output (C3) (see Table 1)

RST

card reset output (C2)

supply for card (C1) (decouple with 100 nF)

CMDVCC

active LOW start activation sequence input from
microcontroller

RSTIN

card reset input from microcontroller

OFF

open drain NMOS interrupt output to microcontroller (active
LOW)

MODE

operating mode selection input (HIGH = normal; LOW = sleep)

DDD

supply

digital supply voltage

DGND2

supply

digital ground 2

1997 Nov 04

Philips Semiconductors

Product specification

IC card interface

TDA8002

Fig.2 Pin configuration (TDA8002A).

handbook, halfpage

XTAL1

XTAL2

I/OUC

AUX1UC

AUX2UC

ALARM

CLKSEL

CLKDIV1

CLKDIV2

STROBE

CLKOUT

DGND1

AGND

MODE

RSTIN

RST

CLK

VCC

AUX1

AUX2

I/O

VUP

VDDA

TDA8002A

MGE731

OFF

CMDVCC

PRES

Fig.3 Pin configuration (TDA8002B).

handbook, halfpage

XTAL1

XTAL2

I/OUC

AUX1UC

ALARM

CLKSEL

CLKDIV1

CLKDIV2

STROBE

CLKOUT

DGND1

AGND

MODE

RSTIN

RST

CLK

VCC

AUX1

PRES

I/O

VUP

VDDA

TDA8002B

MGE732

OFF

CMDVCC

PRES

ALARM

Fig.4 Pin configuration (TDA8002G).

handbook, full pagewidth

TDA8002G

MGE733

AUX1UC

AUX2UC

ALARM

CLKSEL

CLKDIV1

CLKDIV2

STROBE

CLKOUT

DGND1

AGND

VUP

I/O

AUX2

AUX1

RSTIN

MODE

DDD

DGND2

XTAL1

XTAL2

I/OUC

RST

CLK

VCC

PRES

DDA

ALARM

PRES

CMDVCC

OFF

1997 Nov 04

Philips Semiconductors

Product specification

IC card interface

TDA8002

FUNCTIONAL DESCRIPTION

Power supply

The supply pins for the chip are V

DDA

, V

DDD

, AGND,

DGND1 and DGND2. V

DDA

and V

DDD

(i.e. V

) should be

in the range of 3.0 to 6.5 V. All card contacts remain
inactive during power-up or power-down.

On power-up, the logic is reset by an internal signal.
The sequencer is not activated until V

reaches

th2

+ V

hys2

(see Fig.5). When V

falls below V

th2

, an

automatic deactivation sequence of the contacts is
performed.

Supply voltage supervisor (V

)

This block surveys the V

supply. A defined reset pulse

of 10 ms minimum (t

) can be retriggered and is delivered

on the ALARM outputs during power-up or power-down of
V

(see Fig.5). This signal is also used for eliminating the

spikes on card contacts during power-up or power-down.

When V

reaches V

th2

+ V

hys2

, an internal delay is

started. The ALARM outputs are active until this delay has
expired. When V

falls below V

th2

, ALARM is activated

and a deactivation sequence of the contacts is performed.

For 3 V supply, the supervisor option must be chosen at
3 V. For 5 V supply, both options (3 or 5 V) may be chosen
depending on the application.

Clock circuitry

The TDA8002 supports both synchronous and
asynchronous cards (I

C-bus memories requiring an

acknowledge signal from the master are not supported).
There are three methods to clock the circuitry:

Apply a clock signal to pin STROBE

Use of an internal RC oscillator

Use of a quartz oscillator which should be connected
between pins XTAL1 and XTAL2.

When CLKSEL is HIGH, the clock should be applied on the
STROBE pin, and when CLKSEL is LOW, one of the
internal oscillators is used.

When an internal clock is used, the clock output is
available on pin CLKOUT. The RC oscillator is selected by
making CLKDIV1 HIGH and CLKDIV2 LOW. The clock
output to the card is available on pin CLK. The frequency
of the card clock can be the input frequency divided by
2 or 4, STOP LOW or 1.25 MHz, depending on the states
of CLKDIV1 or CLKDIV2 (see Table 1).

Do not change CLKSEL during activation. When in
low-power (sleep) mode, the internal oscillator frequency
which is available on pin CLKOUT is lowered to
approximately 16 kHz for power-economy purposes.

Fig.5 Alarm as a function of V

(pulse width 10 ms).

handbook, full pagewidth

MGE734

VDD

Vth2

Vhys2

Vth2

ALARM

1997 Nov 04

Philips Semiconductors

Product specification

IC card interface

TDA8002

Table 1

Clock circuitry definition

Notes

1. X = don't care.

2. In low-power mode.

3. f

int

= 32 kHz in low-power mode.

MODE

CLKSEL

CLKDIV1

CLKDIV2

FREQUENCY

OF CLK

FREQUENCY

OF CLKOUT

HIGH

LOW

HIGH

LOW

int

HIGH

LOW

xtal

HIGH

LOW

HIGH

xtal

HIGH

LOW

HIGH

STOP LOW

xtal

HIGH

(1)

STROBE

xtal

LOW

(2)

(1)

STOP LOW

int

(3)

I/O circuitry

The three I/O transceivers are identical. The state is HIGH
for all I/O pins (i.e. I/O, I/OUC, AUX1, AUX1UC, AUX2 and
AUX2UC). Pin I/O is referenced to V

and pin I/OUC to

, thus ensuring proper operation in case V

The first side on which a falling edge is detected becomes
a master (input). An anti-latch circuitry first disables the
detection of the falling edge on the other side, which
becomes slave (output).

After a delay time t

(about 50 ns), the logic 0 present on

the master side is transferred on the slave side.

When the input is back to HIGH level, a current booster is
turned on during the delay t

on the output side and then

both sides are back to their idle state, ready to detect the
next logic 0 on any side.

In case of a conflict, both lines may remain LOW until the
software enables the lines to be HIGH. The anti-latch
circuitry ensures that the lines do not remain LOW if both
sides return HIGH, regardless of the prior conditions.
The maximum frequency on the lines is approximately
1 MHz.

Fig.6 Master and slave signals.

handbook, full pagewidth

MGD703

I/O

I/OUC

conflict

idle

1997 Nov 04

Philips Semiconductors

Product specification

IC card interface

TDA8002

Logic circuitry

After power-up, the circuit has six possible states of
operation. Table 1 shows the sequence of these states.

DLE MODE

After reset, the circuit enters the idle mode.
A minimum number of functions in the circuit are active
while waiting for the microcontroller to start a session:

All card contacts are inactive

I/OUC, AUX1UC and AUX2UC are high-impedance

Oscillator XTAL runs, delivering CLKOUT

Voltage supervisor is active.

POWER

(

SLEEP

)

MODE

When pin MODE goes LOW, the circuit enters the
low-power (sleep) mode. As long as pin MODE is LOW, no
activation is possible.

If pin MODE goes LOW in the active mode, a normal
deactivation sequence is performed before entering
low-power mode. When pin MODE goes HIGH, the circuit
enters normal operation after a delay of at least 6 ms
(96 cycles of CLKOUT). During this time the CLKOUT
remains at 16 kHz.

All card contacts are inactive

Oscillator XTAL does not run

The V

supervisor, ALARM output, card presence

detection and OFF output remain functional

Internal oscillator is slowed to 32 kHz, CLKOUT
providing 16 kHz.

CTIVE MODE

When the activation sequence is completed, the TDA8002
will be in the active mode. Data is exchanged between the
card and the microcontroller via the I/O lines.

State diagram

Fig.7 State diagram.

handbook, full pagewidth

MGE735

POWER

OFF

ACTIVE

MODE

LOW-POWER

MODE

IDLE

MODE

FAULT

ACTIVATION

DEACTIVATION

1997 Nov 04

Philips Semiconductors

Product specification

IC card interface

TDA8002

CTIVATION SEQUENCE

From idle mode, the circuit enters the activation mode
when the microcontroller sets the CMDVCC line LOW or
sets the MODE line HIGH when the CMDVCC line is
already LOW. The internal circuitry is then activated, the
internal clock is activated and an activation sequence is
executed. When RST is enabled, it becomes the inverse of
RSTIN.

Figures 8 to 10 illustrate the activation sequence as
described below:

1. Step-up converter is started (t

)

2. V

rises from 0 to 5 V (t

= t

+ 1

3. I/O, AUX1, AUX2 are enabled and CLK is enabled

= t

+ 4T); a special circuitry ensures that I/O

remains below V

during falling slope of V

4. CLK is set by setting RSTIN to HIGH (t

)

5. RST is enabled (t

= t

+ 7T); after t

, RSTIN has no

further action on CLK, but is only controlling RST.

Fig.8 Activation sequence using RSTIN and CMDVCC.

handbook, full pagewidth

MGE736

OSC_INT/64

CMDVCC

VUP

VCC

I/O

CLK

RSTIN

RST

high - Z

tact

T = 25

1997 Nov 04

Philips Semiconductors

Product specification

IC card interface

TDA8002

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134); note 1.

Note

1. Stress beyond these levels may cause permanent damage to the device. This is a stress rating only and functional

operation of the device under this condition is not implied.

HANDLING

Every pin withstands the ESD test according to MIL-STD-883C class 3 for card contacts, class 2 for the remaining.
Method 3015 (HBM 1500

, 100 pF) 3 positive pulses and 3 negative pulses on each pin referenced to ground.

THERMAL CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

supply voltage

0.3

+6.5

i(CMOS)

voltage on CMOS pins

XTAL1, XTAL2, ALARM, ALARM,
MODE, RSTIN, CLKSEL, AUX2UC,
AUX1UC, CLKDIV1, CLKDIV2,
CLKOUT, STROBE, CMDVCC and
OFF

0.3

+6.5

i(card)

voltage on card contact pins

I/O, AUX2, PRES, PRES, AUX1,
CLK, RST and V

0.3

+6.5

electrostatic handling

on pins I/O, RST, V

, CLK, AUX1,

AUX2, PRES and PRES

on all other pins

stg

storage temperature

+125

tot

continuous total power dissipation

TDA8002T

amb

25 to +85

0.56

TDA8002G

amb

25 to +85

0.46

amb

operating ambient temperature

+85

junction temperature

150

SYMBOL

PARAMETER

VALUE

UNIT

th(j-a)

thermal resistance from junction to ambient in free air

SOT136-1

K/W

SOT401-1

K/W

1997 Nov 04

Philips Semiconductors

Product specification

IC card interface

TDA8002

CHARACTERISTICS

= 5 V; T

amb

= 25

C; f

xtal

= 10 MHz; unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supply

positive supply voltage

option 5 V power supply
(TDA8002xx/5)

4.5

6.5

option 3.3 V or 5 V power
supply (TDA8002xx/3)

6.5

DD(sl)

supply current

sleep mode; V

= 5 V

200

DD(idle)

supply current

idle mode; V

= 5 V;

CLK

= 2.5 MHz;

CLKOUT

= 10 MHz

DD(active)

supply current

active mode

= 5 V;

CLK

= 2.5 MHz;

CLKOUT

= 10 MHz

= 3.3 V;

CLK

= 2.5 MHz;

CLKOUT

= 10 MHz

th2

threshold voltage on V

for

voltage supervisor

falling

option 5 V power supply
(TDA8002xx/5)

3.9

4.05

4.2

option 3.3 V or 5 V power
supply (TDA8002xx/3)

2.6

2.7

2.8

rising

option 5 V power supply
(TDA8002xx/5)

4.2

4.4

option 3.3 or 5 V power
supply (TDA8002xx/3)

2.7

2.85

2.99

hys2

hysteresis on V

th2

100

150

200

ARD SUPPLY

CC(O)(idle)

output voltage

idle mode

0.4

CC(O)(active)

output voltage

active mode

< 20 mA: DC load

with 3 V < V

< 3.3 V

4.75

5.25

< 65 mA: DC load

with 3.3 V < V

< 6.5 V

4.75

5.25

= 40 mA: AC load

4.6

5.4

CC(O)

output current

CC(O)

= from 0 to 5 V

short-circuited to

ground

100

slew rate

rising or falling slope

0.12

0.17

0.22

1997 Nov 04

Philips Semiconductors

Product specification

IC card interface

TDA8002

Crystal connections (XTAL1 and XTAL2)

ext

external capacitors

note 1

xtal

resonance frequency

note 2

MHz

Data lines

ENERAL

edge

delay between falling edge of
I/O, AUX1, AUX2 and I/OUC,
AUX1UC, AUX2UC

200

delay between falling edge of
I/OUC, AUX1UC, AUX2UC and
I/O, AUX1, AUX2

200

, t

rise and fall times

= C

= 30 pF

0.5

ATA LINES

I/O, AUX1

AND

AUX2

OH(I/O)

HIGH-level output voltage on
data lines

0.5

+ 0.1 V

100

3.5

OL(I/O)

LOW-level output voltage on
data lines

I/O

= 1 mA

300

IH(I/O)

HIGH-level input voltage on data
lines

1.8

IL(I/O)

LOW-level input voltage on data
lines

0.8

I/O(idle)

voltage on data lines outside a
session

0.4

internal pull-up resistance
between data lines and V

edge

current from data lines when
active pull-up is active

IL(I/O)

LOW-level input current on data
lines

= 0.4 V

600

IH(I/O)

HIGH-level input current on data
lines

= V

ATA LINES

I/OUC, AUX1UC

AND

AUX2UC

OH(I/OUC)

HIGH-level output voltage on
data lines

+ 0.2 V

OL(I/OUC)

LOW-level output voltage on
data lines

I/OUC

= 1 mA

300

IH(I/OUC)

HIGH-level input voltage on data
lines

0.7V

IL(I/OUC)

LOW-level input voltage on data
lines

0.3V

I/OUC(idle)

impedance on data lines outside
a session

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1997 Nov 04

Philips Semiconductors

Product specification

IC card interface

TDA8002

ALARM, ALARM and OFF when connected (open-drain outputs)

OH(ALARM)

HIGH-level output current on
pin ALARM

OH(ALARM)

= 5 V

OL(ALARM)

LOW-level output voltage on
pin ALARM

OL(ALARM)

= 2 mA

0.4

OH(OFF)

HIGH-level output current on
pin OFF

OH(OFF)

= 5 V

OL(OFF)

LOW-level output voltage on
pin OFF

OL(OFF)

= 2 mA

0.4

OL(ALARM)

LOW-level output current on
pin ALARM

OL(ALARM)

= 0 V

OH(ALARM)

HIGH-level output voltage on
pin ALARM

OH(ALARM)

2 mA

ALARM pulse width

Clock output (CLKOUT; powered from V

)

CLKOUT

frequency on CLKOUT

MHz

low power

kHz

LOW-level output voltage

= 1 mA

0.5

HIGH-level output voltage

1 mA

0.5

, t

rise and fall times

= 15 pF; notes 3 and 5

duty factor

= 15 pF; notes 3 and 5

Internal oscillator

int

frequency of internal oscillator

active mode

2.2

2.7

3.2

MHz

sleep mode

kHz

Card reset output (RST)

O(inact)

output voltage

inactive modes

0.3

d(RST)

delay between RSTIN and RST

RST enabled

100

LOW-level output voltage

= 200

0.3

HIGH-level output voltage

200

4.3

0.5

Card clock output (CLK)

O(inact)

output voltage

inactive modes

0.3

LOW-level output voltage

= 200

0.3

HIGH-level output voltage

0.5

rise time

= 30 pF; note 3

fall time

= 30 pF; note 3

duty factor

= 30 pF; note 3

slew rate (rise and fall)

0.2

V/ns

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1997 Nov 04

Philips Semiconductors

Product specification

IC card interface

TDA8002

Notes

1. It may be necessary to put capacitors from XTAL1 and XTAL2 to ground depending on the choice of crystal or

resonator.

2. When the oscillator is stopped in mode 1, XTAL1 is set to HIGH.

3. The transition time and duty cycle definitions are shown in Fig.13;

4. PRES and CMDVCC are active LOW; RSTIN and PRES are active HIGH

5. CLKOUT transition time and duty cycle do not need to be tested.

Strobe input (STROBE)

STROBE

frequency on STROBE

MHz

LOW-level input voltage

0.3V

HIGH-level input voltage

0.7V

Logic inputs (CLKSEL, CLKDIV1, CLKDIV2, MODE, CMDVCC and RSTIN); note 4

LOW-level input voltage

0.8

HIGH-level input voltage

1.8

Logic inputs (PRES, PRES); note 4

LOW-level input voltage

0.3V

HIGH-level input voltage

0.7V

IL(PRES)

LOW-level input current on
pin PRES

= 0 V

IH(PRES)

HIGH-level input current on
pin PRES

Protections

shut-down local temperature

135

CC(sd)

shut-down current at V

Timing

act

activation sequence duration

see Fig.9; guaranteed by
design

180

220

deactivation sequence duration

see Fig.11; guaranteed by
design

start of the window for sending
CLK to the card

see Figs 8 and 9

130

end of the window for sending
CLK to the card

see Fig.8

150

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

---------------

1997 Nov 04

Philips Semiconductors

Product specification

IC card interface

TDA8002

SOLDERING

Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

"IC Package Databook" (order code 9398 652 90011).

Reflow soldering

Reflow soldering techniques are suitable for all LQFP and
SO packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 50 and 300 seconds depending on heating
method. Typical reflow peak temperatures range from
215 to 250

Wave soldering

LQFP

Wave soldering is not recommended for LQFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.

CAUTION

Wave soldering is NOT applicable for all LQFP
packages with a pitch (e) equal or less than 0.5 mm.

If wave soldering cannot be avoided, for LQFP
packages with a pitch (e) larger than 0.5 mm, the
following conditions must be observed:

A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.

The footprint must be at an angle of 45

to the board

direction and must incorporate solder thieves
downstream and at the side corners.

Wave soldering techniques can be used for all SO
packages if the following conditions are observed:

A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.

The longitudinal axis of the package footprint must be
parallel to the solder flow.

The package footprint must incorporate solder thieves at
the downstream end.

ETHOD

(LQFP

AND

SO)

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260

C, and

maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150

C within

6 seconds. Typical dwell time is 4 seconds at 250

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Repairing soldered joints

Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300

C. When

using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320

1997 Nov 04

Philips Semiconductors

Product specification

IC card interface

TDA8002

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

Data sheet status

Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification

This data sheet contains preliminary data; supplementary data may be published later.

Product specification

This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

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Printed in The Netherlands

547047/1200/03/pp28

Date of release: 1997 Nov 04

Document order number:

9397 750 02454

Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA8002AT/3/C2

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA8002AT/3/C2