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Электронный компонент: TDA8002CT/A/C1

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DATA SHEET
Product specification
Supersedes data of 1999 Feb 24
File under Integrated Circuits, IC02
1999 Oct 12
INTEGRATED CIRCUITS
TDA8002C
IC card interface
1999 Oct 12
2
Philips Semiconductors
Product specification
IC card interface
TDA8002C
FEATURES
Single supply voltage interface (3.3 or 5 V environment)
Low-power sleep mode
Three specific protected half-duplex bidirectional
buffered I/O lines
V
CC
regulation 5 V
5% or 3 V
5%, I
CC
< 55 mA for
V
DD
= 3.0 to 6.5 V, with controlled rise and fall times
Thermal and short-circuit protections with current
limitations
Automatic ISO 7816 activation and deactivation
sequences
Enhanced ESD protections on card side (>6 kV)
Clock generation for the card up to 12 MHz with
synchronous frequency changes
Clock generation up to 20 MHz (external clock)
Synchronous and asynchronous cards (memory and
smart cards)
ISO 7816, GSM11.11 compatibility and EMV
(Europay, MasterCard
and Visa) compliant
Step-up converter for V
CC
generation
Supply supervisor for spikes elimination and emergency
deactivation
Chip select input for easy use of several TDA8002Cs in
parallel.
APPLICATIONS
IC card readers for:
GSM applications
Banking
Electronic payment
Identification
Pay TV
Road tolling.
GENERAL DESCRIPTION
The TDA8002C is a complete low-power analog interface
for asynchronous and synchronous cards. It can be placed
between the card and the microcontroller. It performs all
supply, protection and control functions. It is directly
compatible with ISO 7816, GSM11.11 and EMV
specifications.
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
MARKING
NAME
DESCRIPTION
VERSION
TDA8002CT/A/C1
TDA8002CT/A
SO28
plastic small outline package; 28 leads; body width
7.5 mm
SOT136-1
TDA8002CT/B/C1
TDA8002CT/B
TDA8002CT/C/C1
TDA8002CT/C
TDA8002CG/C1
TDA8002C
LQFP32
plastic low profile quad flat package; 32 leads;
body 5
5
1.4 mm
SOT401-1
1999 Oct 12
3
Philips Semiconductors
Product specification
IC card interface
TDA8002C
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
V
DD
supply voltage
3.0
-
6.5
V
I
DD(lp)
supply current
low-power
-
-
150
A
I
DD(idle)
supply current
Idle mode; f
CLKOUT
= 10 MHz
-
-
5
mA
I
DD(active)
supply current
active mode; V
CC(O)
= 5 V;
f
CLKOUT
= 10 MHz
f
CLK
= LOW; I
CC
= 100
A
-
-
8
mA
f
CLK
= 5 MHz; I
CC
= 10 mA
-
-
50
mA
f
CLK
= 5 MHz; I
CC
= 55 mA
-
-
140
mA
active mode; V
CC(O)
= 3 V;
f
CLKOUT
= 10 MHz
f
CLK
= LOW; I
CC
= 100
A
-
-
8
mA
f
CLK
= 5 MHz; I
CC
= 10 mA
-
-
50
mA
f
CLK
= 5 MHz; I
CC
= 55 mA
-
-
140
mA
Card supply
V
CC(O)
output voltage
active mode for V
CC
= 5 V
I
CC
< 55 mA; DC load
4.6
-
5.4
V
I
CC
= 40 nAs; AC load
4.6
-
5.4
V
active mode for V
CC
= 3 V
I
CC
< 55 mA; DC load
2.76
-
3.24
V
I
CC
= 40 nAs; AC load
2.76
-
3.24
V
General
f
CLK
card clock frequency
0
-
12
MHz
t
de
deactivation sequence duration
60
80
100
s
P
tot
continuous total power dissipation
TDA8002CT/x
T
amb
=
-
25 to +85
C
-
-
0.56
W
TDA8002CG
T
amb
=
-
25 to +85
C
-
-
0.46
W
T
amb
ambient temperature
-
25
-
+85
C
1999 Oct 12
4
Philips Semiconductors
Product specification
IC card interface
TDA8002C
BLOCK DIAGRAM
Fig.1 Block diagram.
handbook, full pagewidth
FCE246
100 nF
100 nF
470 nF
470 nF
100
nF
100
nF
I/O
TRANSCEIVER
I/O
TRANSCEIVER
I/O
TRANSCEIVER
THERMAL
PROTECTION
VCC
GENERATOR
RST
BUFFER
CLOCK
BUFFER
SEQUENCER
CLOCK
CIRCUITRY
LATCH
OSCILLATOR
INTERNAL OSCILLATOR
2.5 MHz
STEP-UP CONVERTER
INTERNAL
REFERENCE
VOLTAGE SENSE
SUPPLY
EN2
PVCC
EN5
EN4
EN3
CLK
EN1
CLKUP
ALARM
Vref
28
VDDD
13
VDDA
14
12
S1
S2
15
11
VUP
AGND
23
VCC
22
RST
18
PRES
21
CLK
20
17
16
AUX1
AUX2
I/O
10
29
DGND1
DGND2
32
2
1
I/OUC
AUX2UC
AUX1UC
31
30
9
19
27
24
25
8
5
7
6
XTAL2
XTAL1
CLKOUT
26
STROBE
CLKSEL
CLKDIV2
CLKDIV1
MODE
CMDVCC
RSTIN
OFF
CV/TV
3
4
CS
ALARM
TDA8002CG
1999 Oct 12
5
Philips Semiconductors
Product specification
IC card interface
TDA8002C
PINNING
SYMBOL
PIN
I/O
DESCRIPTION
TYPE
CT/A
TYPE
CT/B
TYPE
CT/C
TYPE
CG
XTAL1
1
1
1
30
I
crystal connection or input for external clock
XTAL2
2
2
2
31
O
crystal connection
I/OUC
3
3
3
32
I/O
data I/O line to and from microcontroller
AUX1UC
4
4
4
1
I/O
auxiliary line 1 to and from microcontroller for synchronous
applications
AUX2UC
5
-
-
2
I/O
auxiliary line 2 to and from microcontroller for synchronous
applications
CS
-
5
5
3
I
chip select control input for enabling pins I/OUC, AUX1UC,
AUX2UC, CLKSEL, CLKDIV1, CLKDIV2, STROBE, CV/TV,
CMDVCC, RSTIN, OFF and MODE; note 1
ALARM
6
6
6
4
O
open drain PMOS reset output for microcontroller (active
HIGH)
CLKSEL
7
7
7
5
I
control input signal for CLK (LOW = XTAL oscillator;
HIGH = STROBE input)
CLKDIV1
8
8
8
6
I
control input with CLKDIV2 for choosing CLK frequency
CLKDIV2
9
9
9
7
I
control input with CLKDIV1 for choosing CLK frequency
STROBE
10
10
10
8
I
external clock input for synchronous applications
CLKOUT
11
11
11
9
O
clock output (see Table 1)
DGND1
12
12
12
10
supply digital ground 1
AGND
13
13
13
11
supply analog ground
S2
14
14
14
12
I/O
capacitance connection for voltage doubler
V
DDA
15
15
15
13
supply analog supply voltage
S1
16
16
16
14
I/O
capacitance connection for voltage doubler
VUP
17
17
17
15
I/O
output of voltage doubler
I/O
18
18
18
16
I/O
data I/O line to and from card
AUX2
19
-
-
17
I/O
auxiliary I/O line to and from card
PRES
20
19
19
18
I
card input presence contact (active LOW)
PRES
-
20
-
-
I
active HIGH card input presence contact
CV/TV
-
-
20
19
I
card voltage selection input line (high = 5 V, low = 3 V); note 1
AUX1
21
21
21
20
I/O
auxiliary I/O line to and from card
CLK
22
22
22
21
O
clock to card output (C3I) (see Table 1)
RST
23
23
23
22
O
card reset output (C2I)
V
CC
24
24
24
23
O
supply for card (C1I)
CMDVCC
25
25
25
24
I
start activation sequence input from microcontroller (active
LOW)
RSTIN
26
26
26
25
I
card reset input from microcontroller
OFF
27
27
27
26
O
open-drain NMOS interrupt output to microcontroller (active
LOW)
1999 Oct 12
6
Philips Semiconductors
Product specification
IC card interface
TDA8002C
Note
1. A pull-up resistor of 100 k
connected to V
DD
is integrated.
MODE
28
28
28
27
I
operating mode selection input (HIGH = normal; LOW = sleep)
V
DDD
-
-
-
28
supply digital supply voltage
DGND2
-
-
-
29
supply digital ground 2
SYMBOL
PIN
I/O
DESCRIPTION
TYPE
CT/A
TYPE
CT/B
TYPE
CT/C
TYPE
CG
Fig.2 Pin configuration (TDA8002CT/A).
handbook, halfpage
XTAL1
XTAL2
I/OUC
AUX1UC
AUX2UC
ALARM
CLKSEL
CLKDIV1
CLKDIV2
STROBE
CLKOUT
DGND1
AGND
S2
MODE
RSTIN
RST
CLK
VCC
AUX1
AUX2
I/O
VUP
S1
VDDA
1
2
3
4
5
6
7
8
9
10
11
12
13
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
TDA8002CT/A
FCE247
OFF
CMDVCC
PRES
Fig.3 Pin configuration (TDA8002CT/B).
handbook, halfpage
XTAL1
XTAL2
I/OUC
AUX1UC
CS
ALARM
CLKSEL
CLKDIV1
CLKDIV2
STROBE
CLKOUT
DGND1
AGND
S2
MODE
RSTIN
RST
CLK
VCC
AUX1
I/O
VUP
S1
VDDA
1
2
3
4
5
6
7
8
9
10
11
12
13
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
TDA8002CT/B
FCE248
OFF
CMDVCC
PRES
PRES
1999 Oct 12
7
Philips Semiconductors
Product specification
IC card interface
TDA8002C
Fig.4 Pin configuration (TDA8002CT/C).
handbook, halfpage
XTAL1
XTAL2
I/OUC
AUX1UC
CS
ALARM
CLKSEL
CLKDIV1
CLKDIV2
STROBE
CLKOUT
DGND1
AGND
S2
MODE
RSTIN
RST
CLK
VCC
AUX1
I/O
VUP
S1
VDDA
1
2
3
4
5
6
7
8
9
10
11
12
13
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
TDA8002CT/C
FCE249
OFF
CMDVCC
CV/TV
PRES
Fig.4 Pin configuration (TDA8002CT/C).
Fig.5 Pin configuration (TDA8002CG).
handbook, full pagewidth
TDA8002CG
FCE250
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
AUX1UC
STROBE
CLKOUT
V
DDD
I/OUC
DGND2
AUX2
XTAL2
XTAL1
I/O
AUX2UC
CS
ALARM
CLKSEL
CLKDIV1
CLKDIV2
DGND1
AGND
S2
VUP
S1
V
DDA
RST
CLK
VCC
AUX1
CMDVCC
CV/TV
PRES
MODE
RSTIN
OFF
1999 Oct 12
8
Philips Semiconductors
Product specification
IC card interface
TDA8002C
FUNCTIONAL DESCRIPTION
Power supply
The supply pins for the chip are V
DDA
, V
DDD
, AGND,
DGND1 and DGND2. V
DDA
and V
DDD
(i.e. V
DD
) should be
in the range of 3.0 to 6.5 V. All card contacts remain
inactive during power-up or power-down.
On power-up, the logic is reset by an internal signal.
The sequencer is not activated until V
DD
reaches
V
th2
+ V
hys2
(see Fig.6). When V
DD
falls below V
th2
, an
automatic deactivation sequence of the contacts is
performed.
Chip selection
The chip select pin (CS) allows the use of several
TDA8002Cs in parallel.
When CS is HIGH, the pins RSTN, CMDVCC, MODE,
CV/TV, CLKDIV1, CLKDIV2, CLKSEL and STROBE
control the chip, pins I/OUC, AUX1UC and AUX2UC are
the copy of I/O, AUX1 and AUX2 when enabled (with
integrated 20 k
pull-up resistors connected to V
DD
) and
OFF is enabled.
When CS goes LOW, the levels on pins RSTIN,
CMDVCC, MODE, CV/TV, CLKDIV1, CLKDIV2 and
STROBE are internally latched, I/OUC, AUX1UC and
AUX2UC go to high-impedance with respect to I/O, AUX1
and AUX2 (with integrated 100 k
pull-up resistors
connected to V
DD
) and OFF is high-impedance.
Supply voltage supervisor (V
DD
)
This block surveys the V
DD
supply. A defined retriggerable
pulse of 10 ms minimum (t
W
) is delivered on the ALARM
output during power-up or power-down of V
DD
(see Fig.6).
This signal is also used for eliminating the spikes on card
contacts during power-up or power-down.
When V
DD
reaches V
th2
+ V
hys2
, an internal delay (t
W
) is
started. The ALARM output is active until this delay has
expired. When V
DD
falls below V
th2
, ALARM is activated
and a deactivation sequence of the contacts is performed.
Clock circuitry
The TDA8002C supports both synchronous and
asynchronous cards. There are three methods to clock the
circuitry:
Apply a clock signal to pin STROBE
Use of an internal RC oscillator
Use of a quartz oscillator which should be connected
between pins XTAL1 and XTAL2 or an external clock
applied on XTAL1.
When CLKSEL is HIGH, the clock should be applied to the
STROBE pin. When CLKSEL is LOW, the internal
oscillators is used.
When an internal clock is used, the clock output is
available on pin CLKOUT. The RC oscillator is selected by
making CLKDIV1 HIGH and CLKDIV2 LOW. The clock
output to the card is available on pin CLK. The frequency
of the card clock can be the input frequency divided by
2 or 4, STOP low or 1.25 MHz, depending on the states of
CLKDIV1 or CLKDIV2 (see Table 1).
When STROBE is used for entering the clock to a
synchronous card, STROBE should remain stable during
activation sequence otherwise the first pulse may be
omitted.
Do not change CLKSEL during activation. When in
low-power (sleep) mode, the internal oscillator frequency
which is available on pin CLKOUT is lowered to
approximately 16 kHz for power economy purposes.
1999 Oct 12
9
Philips Semiconductors
Product specification
IC card interface
TDA8002C
Fig.6 ALARM as a function of V
DD
(t
W
pulse width minimum of 10 ms).
handbook, full pagewidth
FCE272
VDD
tW
tW
Vth2
+
Vhys2
Vth2
ALARM
Fig.7 Chip select.
handbook, full pagewidth
tDZ
tSL
CS
CS
INPUTS
FCE245
tSI
tIS
tDI
tID
OFF, I/OUC
AUX1UC, AUX2UC
1999 Oct 12
10
Philips Semiconductors
Product specification
IC card interface
TDA8002C
Table 1
Clock circuitry definition
Notes
1. X = don't care.
2. In low-power mode.
3. f
int
= 32 kHz in low-power mode.
MODE
CLKSEL
CLKDIV1
CLKDIV2
FREQUENCY OF
CLK
FREQUENCY OF
CLKOUT
HIGH
LOW
HIGH
LOW
1
/
2
f
int
1
/
2
f
int
HIGH
LOW
LOW
LOW
1
/
4
f
xtal
f
xtal
HIGH
LOW
LOW
HIGH
1
/
2
f
xtal
f
xtal
HIGH
LOW
HIGH
HIGH
STOP low
f
xtal
HIGH
HIGH
X
(1)
X
(1)
STROBE
f
xtal
LOW
(2)
X
(1)
X
(1)
X
(1)
STOP low
1
/
2
f
int
(3)
I/O circuitry
The three I/O transceivers are identical. The state is HIGH
for all I/O pins (i.e. I/O, I/OUC, AUX1, AUX1UC, AUX2 and
AUX2UC). Pin I/O is referenced to V
CC
and pin I/OUC to
V
DD
, thus ensuring proper operation in the event that
V
CC
V
DD
.
The first side on which a falling edge is detected becomes
a master (input). An anti-latch circuitry first disables the
detection of the falling edge on the other side, which
becomes slave (output), see Fig.8.
After a delay time t
d
(between 50 and 400 ns), the logic 0
present on the master side is transferred on the slave side.
When the input is back to HIGH level, a current booster is
turned on during the delay t
d
on the output side and then
both sides are back to their idle state, ready to detect the
next logic 0 on any side.
In the event of a conflict, both lines may remain LOW until
the software enables the lines to be HIGH. The anti-latch
circuitry ensures that the lines do not remain LOW if both
sides return HIGH, regardless of the prior conditions.
The maximum frequency on the lines is approximately
200 kHz.
When CS is HIGH, I/OUC, AUX1UC and AUX2UC are
internally pulled-up to V
DD
with 20 k
resistors. When
CS is LOW, I/OUC, AUX1UC and AUX2UC are
permanently HIGH (with integrated 100 k
pull-up
resistors connected to V
DD
).
Fig.8 Master and slave signals.
handbook, full pagewidth
td
MGD703
td
td
I/O
I/OUC
conflict
idle
1999 Oct 12
11
Philips Semiconductors
Product specification
IC card interface
TDA8002C
Logic circuitry
After power-up, the circuit has six possible states of
operation. Figure 9 shows the state diagram.
I
DLE MODE
After reset, the circuit enters the idle mode. A minimum
number of functions in the circuit are active while waiting
for the microcontroller to start a session:
All card contacts are inactive
I/OUC, AUX1UC and AUX2UC are high-impedance
Oscillator (XTAL) runs, delivering CLKOUT
Voltage supervisor is active.
L
OW
-
POWER MODE
When pin MODE goes LOW, the circuit enters the
low-power (sleep) mode. As long as pin MODE is LOW no
activation is possible.
If pin MODE goes LOW in the active mode, a normal
deactivation sequence is performed before entering the
low-power mode. When pin MODE goes HIGH, the circuit
enters the normal operating mode after a delay of at least
6 ms (96 cycles of CLKOUT). During this time the
CLKOUT remains at 16 kHz.
All card contacts are inactive
Oscillator (XTAL) does not operate
The V
DD
supervisor, ALARM output, card presence
detection and OFF output remain functional
Internal oscillator is slowed to 32 kHz, providing 16 kHz
on CLKOUT.
A
CTIVE MODE
When the activation sequence is completed, the
TDA8002C will be in the active mode. Data is exchanged
between the card and the microcontroller via the I/O lines.
Fig.9 State diagram.
handbook, full pagewidth
MGE735
POWER
OFF
ACTIVE
MODE
LOW-POWER
MODE
IDLE
MODE
FAULT
ACTIVATION
DEACTIVATION
1999 Oct 12
12
Philips Semiconductors
Product specification
IC card interface
TDA8002C
A
CTIVATION SEQUENCE
From Idle mode, the circuit enters the activation mode
when the microcontroller sets the CMDVCC line LOW or
sets the MODE line HIGH when the CMDVCC line is
already LOW. The internal circuitry is then activated, the
internal clock is activated and an activation sequence is
executed. When RST is enabled it becomes the inverse of
RSTIN.
Figures 10 to 12 illustrate the activation sequence as
follows:
1. Step-up converter is started (t
1
t
0
)
2. V
CC
rises from 0 to 3 or 5 V (t
2
= t
1
+ 1
1
/
2
T) (according
to the state on pin CV/TV)
3. I/O, AUX1 and AUX2 are enabled and CLK is enabled
(t
3
= t
1
+ 4T); I/O, AUX1 and AUX2 were forced LOW
until this time
4. CLK is set by setting RSTIN to HIGH (t
4
)
5. RST is enabled (t
5
= t
1
+ 7T); after t
5
, RSTIN has no
further action on CLK, but is only controlling RST.
The value of V
CC
(5 or 3 V) must be selected by the level
on pin CV/TV before the activation sequence.
Fig.10 Activation sequence using RSTIN and CMDVCC.
handbook, full pagewidth
FCE273
OSC_INT/64
CMDVCC
VUP
VCC
I/O
CLK
RSTIN
RST
LOW
tact
t0
t1
t2
t3
t4
t5
T = 25
s
1999 Oct 12
13
Philips Semiconductors
Product specification
IC card interface
TDA8002C
Fig.11 Activation sequence using CMDVCC, CLKDIV1 and CLKDIV2 signals to enable CLK.
handbook, full pagewidth
FCE274
OSC_INT/64
CMDVCC
VUP
VCC
I/O
CLK
RSTIN
RST
LOW
tact
t0
t1
t2
t3
CLKDIV1
CLKDIV2
Fig.12 Activation sequence for synchronous application.
handbook, full pagewidth
FCE251
VCC
I/O
AUX1UC
AUX1
RSTIN
RST
STROBE
CMDVCC
tact
CLK
1999 Oct 12
14
Philips Semiconductors
Product specification
IC card interface
TDA8002C
D
EACTIVATION SEQUENCE
When a session is completed, the microcontroller sets the
CMDVCC line to HIGH state or MODE line to LOW state.
The circuit then executes an automatic deactivation
sequence by counting the sequencer down and thus end
in the Idle mode.
Figures 13 and 14 illustrate the deactivation sequence as
follows:
1. RST goes LOW (t
11
t
10
)
2. CLK is stopped (t
12
= t
11
+
1
/
2
T)
3. I/O, AUX1 and AUX2 fall to zero (t
13
= t
11
+ T)
4. V
CC
falls to zero (t
14
= t
11
+ 1
1
/
2
T); a special circuit
ensures that I/O remains below V
CC
during the falling
slope of V
CC
5. VUP falls (t
15
= t
11
+ 5T).
handbook, full pagewidth
FCE479
CMDVCC
VUP
OSC_INT/64
VCC
I/O
CLK
RSTIN
RST
LOW
tde
t10
t11
t12
t13
t14
t15
Fig.13 Deactivation sequence
1999 Oct 12
15
Philips Semiconductors
Product specification
IC card interface
TDA8002C
Fault detection
The following fault conditions are monitored by the circuit:
Short-circuit or high current on V
CC
Removing card during transaction
V
DD
dropping
Overheating.
When one or more of these faults are detected, the circuit
pulls the interrupt line OFF to its active LOW state and a
deactivation sequence is initiated. In the event that the
card is present the interrupt line OFF is set to HIGH state
when the microcontroller has reset the CMDVCC line
HIGH (after completion of the deactivation sequence).
In the event that the card is not present OFF remains
LOW.
handbook, full pagewidth
FCE480
I/O
CLK
RST
LOW
tde
OFF
PRES
VCC
t10
t11
t12
t13
t14
OSC_INT/64
Fig.14 Emergency deactivation sequence.
1999 Oct 12
16
Philips Semiconductors
Product specification
IC card interface
TDA8002C
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); note 1.
Note
1. Stress beyond these levels may cause permanent damage to the device. This is a stress rating only and functional
operation of the device under this condition is not implied.
HANDLING
Every pin withstands the ESD test according to MIL-STD-883C class 3 for card contacts, class 2 for the remaining.
Method 3015 (HBM 1500
, 100 pF) 3 positive pulses and 3 negative pulses on each pin with respect to ground.
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V
DDD
digital supply voltage
-
0.3
+6.5
V
V
DDA
analog supply voltage
-
0.3
+6.5
V
V
CC
card supply voltage pins;
XTAL1, XTAL2, ALARM, CS, MODE,
RSTIN, CLKSEL, AUX2UC, AUX1UC,
CLKDIV1, CLKDIV2, CLKOUT,
STROBE, CMDVCC, CV/TV and OFF
-
0.3
+6.5
V
V
i(card)
input voltage on card contact pins;
I/O, AUX2, PRES, PRES, AUX1, CLK,
RST and V
CC
-
0.3
+6.5
V
V
es
electrostatic handling voltage
on pins I/O, AUX2, PRES, PRES,
AUX1, CLK, RST and V
CC
-
6
+6
kV
on all other pins
-
2
+2
kV
T
stg
storage temperature
-
55
+125
C
P
tot
continuous total power dissipation
TDA8002CT/x
T
amb
=
-
25 to +85
C
-
0.56
W
TDA8002CG
T
amb
=
-
25 to +85
C
-
0.46
W
T
amb
ambient temperature
-
25
+85
C
T
j
junction temperature
-
150
C
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
R
th(j-a)
thermal resistance from junction to ambient
in free air
SOT136-1
70
K/W
SOT401-1
91
K/W
1999 Oct 12
17
Philips Semiconductors
Product specification
IC card interface
TDA8002C
CHARACTERISTICS
V
DD
= 3.3 V; T
amb
= 25
C; f
xtal
= 10 MHz; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
V
DD
supply voltage
3
-
6.5
V
I
DD(lp)
supply current
low-power mode
-
-
150
A
I
DD(idle)
supply current
Idle mode; f
CLKOUT
= 10 MHz
-
-
5
mA
I
DD(active)
supply current
active mode; V
CC(O)
= 5 V;
f
CLKOUT
= 10 MHz
f
CLK
= LOW; I
CC
= 100
A
-
-
8
mA
f
CLK
= 5 MHz; I
CC
= 10 mA
-
-
50
mA
f
CLK
= 5 MHz; I
CC
= 55 mA
-
-
140
mA
active mode; V
CC(O)
= 3 V;
f
CLKOUT
= 10 MHz
f
CLK
= LOW; I
CC
= 100
A
-
-
8
mA
f
CLK
= 5 MHz; I
CC
= 10 mA
-
-
50
mA
f
CLK
= 5 MHz; I
CC
= 55 mA
-
-
140
mA
V
th2
threshold voltage on V
DD
for
voltage supervisor
falling
2.2
-
2.4
V
V
hys2
hysteresis on V
th2
50
100
150
mV
Card supply
V
CC(O)
output voltage
Idle mode
-
-
0.3
V
active mode
V
CC
= 5 V; I
CC
< 55 mA;
DC load
4.6
-
5.4
V
I
CC
= 40 nAs; AC load
4.6
-
5.4
V
V
CC
= 3 V; I
CC
< 55 mA;
DC load
2.76
-
3.24
V
I
CC
= 24 nAs; AC load
2.76
-
3.24
V
I
CC(O)
output current
V
CC(O)
= from 0 to 5 or 3 V
-
-
55
mA
V
CC
short-circuited to ground
-
200
-
mA
SR
slew rate
rising or falling slope
0.10
0.15
0.20
V/
s
Crystal connections (XTAL1 and XTAL2)
C
ext
external capacitors
note 1
-
15
-
pF
f
xtal
resonance frequency
note 2
2
-
24
MHz
1999 Oct 12
18
Philips Semiconductors
Product specification
IC card interface
TDA8002C
Data lines
G
ENERAL
t
d(edge)
delay between falling edge
of I/O, AUX1, AUX2, I/OUC,
AUX1UC and AUX2UC
-
-
1
s
t
r
, t
f
rise and fall times
C
i
= C
o
= 30 pF
-
-
0.5
s
f
I/O(max)
maximum frequency on
data lines
-
-
200
kHz
D
ATA LINES
I/O, AUX1
AND
AUX2 (
WITH
10
K
PULL
-
UP RESISTOR CONNECTED TO
V
CC
)
V
o
output voltage
Idle and low-power modes
0
-
0.3
V
V
OH
HIGH-level output voltage
on data lines
I
OH
=
-
20
A
0.8V
CC
-
V
CC
V
V
OL
LOW-level output voltage on
data lines
I
I/O
= 1 mA
-
-
0.4
V
V
IH
HIGH-level input voltage on
data lines
0.6V
CC
-
V
CC
V
V
IL
LOW-level input voltage on
data lines
0
-
0.5
V
V
idle
voltage on data lines
outside a session
-
-
0.4
V
R
pu
internal pull-up resistance
between data lines and V
CC
8
10
12
k
I
edge
current from data lines
when active pull-up is active
-
1
-
mA
I
IL
LOW-level input current on
data lines
V
IL
= 0.4 V
-
-
-
600
A
I
IH
HIGH-level input current on
data lines
V
IH
= V
CC
-
-
10
A
D
ATA LINES
I/OUC, AUX1UC
AND
AUX2UC (
WITH
20
K
PULL
-
UP RESISTOR CONNECTED TO
V
DD
WHEN
CS
IS
HIGH
AND
100
K
WHEN
CS
IS
LOW)
V
OH
HIGH-level output voltage
on data lines
I
OH
=
-
20
A
V
DD
-
1
-
V
DD
+ 0.2
V
V
OL
LOW-level output voltage on
data lines
I
I/OUC
= 1 mA
-
-
0.4
V
V
IH
HIGH-level input voltage on
data lines
0.7V
DD
-
V
DD
V
V
IL
LOW-level input voltage on
data lines
0
-
0.3V
DD
V
Z
idle
impedance on data lines
outside a session
10
-
-
M
ALARM and OFF when connected (open-drain outputs)
I
OH(OFF)
HIGH-level output current
on pin OFF
V
OH(OFF)
= 5 V
-
-
5
A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
1999 Oct 12
19
Philips Semiconductors
Product specification
IC card interface
TDA8002C
V
OL(OFF)
LOW-level output voltage on
pin OFF
I
OL(OFF)
= 2 mA
-
-
0.4
V
I
OL(ALARM)
LOW-level output current on
pin ALARM
V
OL(ALARM)
= 0 V
-
-
-
5
A
V
OH(ALARM)
HIGH-level output voltage
on pin ALARM
I
OH(ALARM)
=
-
2 mA
V
DD
-
1
-
-
V
t
W
ALARM pulse width
6
-
20
ms
Clock output (CLKOUT; powered from V
DD
)
f
CLKOUT
frequency on CLKOUT
0
-
20
MHz
low power
-
16
-
kHz
V
OL
LOW-level output voltage
I
OL
= 1 mA
0
-
0.5
V
V
OH
HIGH-level output voltage
I
OH
=
-
1 mA
V
DD
-
0.5
-
-
V
t
r
, t
f
rise and fall times
C
L
= 15 pF; notes 3 and 4
-
-
8
ns
duty factor
C
L
= 15 pF; notes 3 and 4
40
-
60
%
Internal oscillator
f
int
frequency of internal
oscillator
active mode
2
2.5
3
MHz
sleep mode
-
32
-
kHz
Card reset output (RST)
V
O(inact)
output voltage
inactive modes
0
-
0.3
V
t
d(RST)
delay between RSTIN and
RST
RST enabled
-
-
100
ns
V
OL
LOW-level output voltage
I
OL
= 200
A
0
-
0.3
V
V
OH
HIGH-level output voltage
I
OH
=
-
200
A
V
CC
-
0.5
-
V
CC
V
t
r
, t
f
rise and fall times
C
L
= 30 pF
-
-
0.5
ns
Card clock output (CLK)
V
O(inact)
output voltage
inactive modes
0
-
0.3
V
V
OL
LOW-level output voltage
I
OL
= 200
A
0
-
0.3
V
V
OH
HIGH-level output voltage
I
OH
=
-
50
A
V
CC
-
0.5
-
V
CC
V
t
r
, t
f
rise and fall times
C
L
= 30 pF; note 3
-
-
8
ns
duty factor
C
L
= 30 pF; note 3
45
-
55
%
SR
slew rate (rise and fall)
0.2
-
-
V/ns
Strobe input (STROBE)
f
STROBE
frequency on STROBE
0
-
10
MHz
V
IL
LOW-level input voltage
0
-
0.3V
DD
V
V
IH
HIGH-level input voltage
0.7V
DD
-
V
DD
V
Logic inputs (CLKSEL, CLKDIV1, CLKDIV2, MODE, CMDVCC and RSTIN); note 5
V
IL
LOW-level input voltage
0
-
0.3V
DD
V
V
IH
HIGH-level input voltage
0.7V
DD
-
V
DD
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
1999 Oct 12
20
Philips Semiconductors
Product specification
IC card interface
TDA8002C
L
OGIC INPUTS
(CV/TV
AND
CS) (I
NTEGRATED
10
K
PULL
-
UP RESISTOR CONNECTED TO
V
DD
); note 5
V
IL
LOW-level input voltage
0
-
0.3V
DD
V
V
IH
HIGH-level input voltage
0.7V
DD
-
V
DD
V
Logic inputs PRES and PRES; note 5
V
IL
LOW-level input voltage
0
-
0.3V
DD
V
V
IH
HIGH-level input voltage
0.7V
DD
-
V
DD
V
I
IL(PRES)
LOW-level input current on
pin PRES
V
OL
= 0 V
-
-
-
10
A
I
IH(PRES)
HIGH-level input current on
pin PRES
-
-
10
A
Protections
T
sd
shut-down local
temperature
-
135
-
C
I
CC(sd)
shut-down current at V
CC
-
-
90
mA
Timing
t
act
activation sequence
duration
guaranteed by design;
see Fig.12
-
180
220
s
t
de
deactivation sequence
duration
guaranteed by design;
see Fig.14
50
70
100
s
t
3
start of the window for
sending CLK to the card
see Figs 10 and 11
-
-
130
s
t
5
end of the window for
sending CLK to the card
see Fig.11
150
-
-
s
t
IS
time from input to select
100
-
-
ns
t
SI
time from select to input
1000
-
-
ns
t
ID
time from input to deselect
1000
-
-
ns
t
DI
time from deselect to input
100
-
-
ns
t
SL
time from select to low
impedance
-
-
40
ns
t
DZ
time from deselect to high
impedance
pull-up resistor at pin
OFF = 10 k
; 1 device
-
-
6
ns
2 devices in parallel
-
-
3
ns
t
r(max)
maximum rise time on pin
CS
-
-
100
ns
t
f(max)
maximum fall time on pin
CS
-
-
100
ns
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
1999 Oct 12
21
Philips Semiconductors
Product specification
IC card interface
TDA8002C
Notes
1. It may be necessary to connect capacitors from XTAL1 and XTAL2 to ground depending on the choice of crystal or
resonator.
2. When the oscillator is stopped in mode 1, XTAL1 is set to HIGH.
3. The transition time and duty cycle definitions are shown in Fig.15;
4. CLKOUT transition time and duty cycle do not need to be tested.
5. PRES and CMDVCC are active LOW; RSTIN, PRES and CS are active HIGH.
t
1
t
1
t
2
+
---------------
=
Fig.15 Definition of transition times.
handbook, full pagewidth
MGE741
10%
90%
90%
10%
tr
tf
t1
t2
VOH
1/2 VCC
VOL
1999
Oct
12
22
Philips Semiconductors
Product specification
IC card interf
ace
TD
A8002C
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APPLICA
TION INFORMA
TION
u
ll pagewidth
FCE195
C8
10
F
C4
(3)
100 nF
C3
(2)
100
nF
C5
(4)
470 nF
C7
100 nF
C6
(5)
470 nF
80C51
P1-0
P1-1
P1-2
P1-3
P1-4
P1-5
P1-6
P1-7
RST
P3-0
P3-1
P3-2
P3-3
P3-4
P3-5
P3-6
P3-7
XTAL2
XTAL1
VSS
VCC
P0-0
P0-1
P0-2
P0-3
P0-4
P0-5
P0-6
P0-7
EA
ALE
PSEN
P2-7
P2-6
P2-5
P2-4
P2-3
P2-2
P2-1
P2-0
XTAL1
XTAL2
I/OUC
AUX1UC
CS
ALARM
CLKSEL
CLKDIV1
CLKDIV2
STROBE
CLKOUT
DGND1
AGND
S2
IC2
IC1
MODE
OFF
RSTIN
CMDVCC
RST
CLK
VCC
AUX1
PRES
I/O
VUP
S1
VDDA
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
28
27
26
25
24
23
22
21
20
19
28
27
26
25
24
23
22
21
30
29
38
37
36
35
34
33
32
31
40
39
18
17
16
15
14
1
2
3
4
5
15
6
7
8
9
10
16
17
18
19
20
11
12
13
14
TDA8002CT/C
CV/TV
C5I
C6I
C7I
C8I
C1I
C2I
C3I
C4I
C4
C3
C2
C1
C8
C7
C6
C5
(1)
K1
K2
33 pF
33 pF
14.745
MHz
VDD
C2
10
F
C1
100 nF
VDD
J1 1
3.3 V or 5 V
J1 2
ground
CARD READ
Fig.16 Application diagram.
TDA8002C should be placed as close as possible to the card reader.
(1) Contact normally open.
(2) C3 close to pin V
CC
of TDA8002C.
(3) C4 close to C1 contact of card reader.
(4) C5 close to VUP pin of TDA8002C.
(5) C6 as close as possible to pins S1 and S2.
CLK line may be shielded with respect to other lines.
Decoupling capacitors C7 and C8 may be placed as close as possible to pin V
DDA
.
A good ground plane is recommended.
1999
Oct
12
23
Philips Semiconductors
Product specification
IC card interf
ace
TD
A8002C
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b
ook, full pagewidth
FCE196
C8
10
F
C3
(2)
100 nF
C9
100 nF
C7
100 nF
C6
(5)
470 nF
80C51
P1-0
P1-1
P1-2
P1-3
P1-4
P1-5
P1-6
P1-7
RST
P3-0
P3-1
P3-2
P3-3
P3-4
P3-5
P3-6
P3-7
XTAL2
XTAL1
VSS
VCC
P0-0
P0-1
P0-2
P0-3
P0-4
P0-5
P0-6
P0-7
EA
ALE
PSEN
P2-7
P2-6
P2-5
P2-4
P2-3
P2-2
P2-1
P2-0
IC2
IC1
VDD
VDD
28
27
26
25
24
23
22
21
30
29
38
37
36
35
34
33
32
31
40
39
1
2
3
4
5
15
6
7
8
9
10
16
17
18
19
20
11
12
13
14
TDA8002CG
C5I
C6I
C7I
C8I
C1I
C2I
C3I
C4I
C4
C3
C2
C1
C8
C7
C6
C5
(1)
K1
K2
33 pF
33 pF
14.745 MHz
VDD
C2
10
F
C1
100 nF
VDD
J1 1
3.3 V or 5 V
J1 2
ground
1
2
3
4
5
6
7
8
AUX1UC
STROBE
AUX2UC
CS
ALARM
CLKSEL
CLKDIV1
CLKDIV2
C4
(3)
100 nF
C5
(4)
470 nF
24
23
22
21
20
19
18
17
AUX2
RST
CLK
VCC
AUX1
CMDVCC
CV/TV
PRES
9
10
11
12
13
14
15
16
CLKOUT
I/O
DGND1
AGND
S2
VUP
S1
V
DDA
32
31
30
29
28
27
26
25
V
DDD
I/OUC
DGND2
XTAL2
XTAL1
MODE
RSTIN
OFF
CARD READ
Fig.17 Application diagram (for more details, see
"Application note AN98054").
TDA8002C should be placed as close as possible to the card reader.
(1) Contact normally open.
(2) C3 close to pin V
CC
of TDA8002C.
(3) C4 close to C1 contact of card reader.
(4) C5 close to VUP pin of TDA8002C.
(5) C6 as close as possible to pins S1 and S2.
CLK line may be shielded with respect to other lines.
Decoupling capacitors C7, C8 and C9 may be placed as close as possible to pin V
DDA
and V
DDD
.
A good ground plane is recommended.
1999 Oct 12
24
Philips Semiconductors
Product specification
IC card interface
TDA8002C
PACKAGE OUTLINES
UNIT
A
max.
A
1
A
2
A
3
b
p
c
D
(1)
E
(1)
(1)
e
H
E
L
L
p
Q
Z
y
w
v
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
EIAJ
mm
inches
2.65
0.30
0.10
2.45
2.25
0.49
0.36
0.32
0.23
18.1
17.7
7.6
7.4
1.27
10.65
10.00
1.1
1.0
0.9
0.4
8
0
o
o
0.25
0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
1.1
0.4
SOT136-1
X
14
28
w
M
A
A
1
A
2
b
p
D
H
E
L
p
Q
detail X
E
Z
c
L
v
M
A
e
15
1
(A )
3
A
y
0.25
075E06
MS-013AE
pin 1 index
0.10
0.012
0.004
0.096
0.089
0.019
0.014
0.013
0.009
0.71
0.69
0.30
0.29
0.050
1.4
0.055
0.419
0.394
0.043
0.039
0.035
0.016
0.01
0.25
0.01
0.004
0.043
0.016
0.01
0
5
10 mm
scale
SO28: plastic small outline package; 28 leads; body width 7.5 mm
SOT136-1
95-01-24
97-05-22
1999 Oct 12
25
Philips Semiconductors
Product specification
IC card interface
TDA8002C
0.2
UNIT
A
max.
A
1
A
2
A
3
b
p
c
E
(1)
e
H
E
L
L
p
Z
y
w
v
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
EIAJ
mm
1.60
0.15
0.05
1.5
1.3
0.25
0.27
0.17
0.18
0.12
5.1
4.9
0.5
7.15
6.85
1.0
0.95
0.55
7
0
o
o
0.12
0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
0.75
0.45
SOT401-1
95-12-19
97-08-04
D
(1)
(1)
(1)
5.1
4.9
H
D
7.15
6.85
E
Z
0.95
0.55
D
b
p
e
E
B
8
D
H
b
p
E
H
v
M
B
D
ZD
A
Z E
e
v
M
A
X
1
32
25
24
17
16
9
A
1
A
L
p
detail X
L
(A )
3
A
2
y
w
M
w
M
0
2.5
5 mm
scale
LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm
SOT401-1
c
pin 1 index
1999 Oct 12
26
Philips Semiconductors
Product specification
IC card interface
TDA8002C
SOLDERING
Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
"Data Handbook IC26; Integrated Circuit Packages"
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical reflow peak temperatures range from
215 to 250
C. The top-surface temperature of the
packages should preferable be kept below 230
C.
Wave soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
For packages with leads on two sides and a pitch (e):
larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
For packages with leads on four sides, the footprint must
be placed at a 45
angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250
C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300
C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320
C.
1999 Oct 12
27
Philips Semiconductors
Product specification
IC card interface
TDA8002C
Suitability of surface mount IC packages for wave and reflow soldering methods
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
"Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods".
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45
angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
DEFINITIONS
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PACKAGE
SOLDERING METHOD
WAVE
REFLOW
(1)
BGA, SQFP
not suitable
suitable
HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS
not suitable
(2)
suitable
PLCC
(3)
, SO, SOJ
suitable
suitable
LQFP, QFP, TQFP
not recommended
(3)(4)
suitable
SSOP, TSSOP, VSO
not recommended
(5)
suitable
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V.
SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Internet: http://www.semiconductors.philips.com
1999
68
Philips Semiconductors a worldwide company
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Printed in The Netherlands
545004/25/03/pp
28
Date of release:
1999 Oct 12
Document order number:
9397 750 06149