1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

FEATURES

Smart card supply (5 and 3 V

5%, 20 mA maximum

with controlled rise and fall times)

Smart card clock generation (up to 8 MHz), with two
times synchronous frequency doubling

Clock STOP HIGH, clock STOP LOW or 1.25 MHz (from
internal oscillator) for cards power-down mode

Specific UART on I/O for automatic direct/inverse
convention settings and error management at
character level

Automatic activation and deactivation sequences
through an independent sequencer

Supports the protocol T = 0 in accordance with
ISO 7816 GSM11.11 requirements (Global System for
Mobile communication); approved for Final GSM11.11
Test Approval (FTA)

Several analog options are available for different
applications: doubler or tripler DC-to-DC converter, card
presence, active HIGH or LOW, threshold voltage
supervisor, etc.

Overloads and take-off protections

Current limitations in the event of short-circuit

Special circuitry for killing spikes during power-on or off

Supply supervisor

Step-up converter (supply voltage from 2.5 to 6 V)

Power-down and sleep mode for low power
consumption

Enhanced ElectroStatic Discharge (ESD) protections on
card side (6 kV minimum)

Control and communication through a standard RS232
full-duplex interface

Optional additional I/O ports for:

keyboard

LEDs

display

etc.

P80CL51 microcontroller core with 4-kbyte ROM and
256-byte RAM.

APPLICATIONS

Portable smart card readers for protocol T = 0

GSM mobile phones.

GENERAL DESCRIPTION

The TDA8005A is a low-cost card interface for portable
smart card readers. Controlled through a standard serial
interface, it takes care of all ISO 7816 and GSM11.11
requirements for both 5 and 3 V cards. It gives the card
and the set a very high level of security, due to its special
hardware against ESD, short-circuiting, power failure, etc.
Its integrated step-up converter allows operation within a
supply voltage range of 2.5 to 6 V.

The very low power consumption in power-down and sleep
modes saves battery power.

Development tools, application report and support
(hardware and software) are available.

ORDERING INFORMATION

TYPE

NUMBER

PACKAGE

NAME

DESCRIPTION

VERSION

TDA8005AG

LQFP64

plastic low profile quad flat package; 64 leads; body 10

1.4 mm

SOT314-2

TDA8005AH

QFP44

plastic quad flat package; 44 leads (lead length 1.3 mm);
body 10

1.75 mm

SOT307-2

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

QUICK REFERENCE DATA

Note

1. See Table 3 for mask options.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

supply voltage

doubler and tripler option

2.5

6.0

DD(pd)

supply current in power-down mode

= 5 V; card inactive

100

DD(sm)

supply current in sleep mode

card powered but clock
stopped; no load

doubler option

500

tripler option

700

DD(om)

supply current in operating mode

unloaded; f

XTAL

= 13 MHz;

= 6.5 MHz; f

card

= 3.25 MHz

5.5

card supply voltage

5 V card

no load

4.85

5.05

5.25

static load

4.75

5.0

5.25

dynamic load on 200 nF
capacitor

4.5

5.4

3 V card

no load

2.9

3.03

3.15

static load

2.79

3.21

dynamic load on 200 nF
capacitor

2.75

3.25

card supply current

operating

limitation

note 1

slew rate on V

(rise and fall)

maximum load capacitor
250 nF (including typical
200 nF decoupling)

0.04

0.1

0.16

deactivation sequence duration

225

act

activation sequence duration

150

XTAL

crystal frequency

MHz

amb

operating ambient temperature

+85

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

BLOCK DIAGRAM

Fig.1 Block diagram.

Pin numbers in parenthesis represent the TDA8005AH.

(1) For details see Chapter "Pinning" and Table 3.

handbook, full pagewidth

VOLTAGE SENSE

2.3 to 2.7 V

INTERNAL OSCILLATOR

2.5 MHz

TDA8005AG

(TDA8005AH)

INTERNAL

REFERENCE

SUPPLY

ALARM

DELAY

RESET

AUX1

AUX2

INT1

XTAL1

XTAL2

DGND

AGND

P00

(1)

P37

RxD

TxD

OPTIONAL

PORTS

PERIPHERAL

INTERFACE

CONTROLLER

CL51

ISO 7816 UART

CLOCK CIRCUITRY

OUTPUT PORT

EXTENSION

STEP-UP CONVERTER

4 kbytes ROM

256-byte RAM

SECURITY

VCC

GENERATOR

RST

BUFFER

I/O

BUFFER

CLOCK

BUFFER

SEQUENCER

47 nF

100 nF

47 nF

DDD

DDA

2.5 to 6 V

63 (43)

10 (7)

46 (31)

22 (17)

28 (18)

29 (19)

32 (22)

33 (23)

30 (20)

36 (26)

35 (25)

37 (27)

2 (1)

47 (32)

57 (37)

55 (35)

56 (36)

58 (38)

59 (39)

60 (40)

47 nF

LIS

VCC

100 nF

RST

I/O

CLK

PRES

EN1

EN2

EN3

EN4

start

RST

off

64 (44)

61 (41)

3 (2) 62 (42)

alarm

DDD

skill

data clk EN

S0 S1

R/W

micro-

controller

clock

I/O

INT

ref

DDD

osc ref

osc

MGL330

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

PINNING

SYMBOL

PIN

DESCRIPTION

LQFP64

QFP44

n.c.

not connected

AGND

analog ground

contact 3 for the step-up converter

output port from port extension

P03

general purpose I/O port (connected to port P03)

P02

general purpose I/O port (connected to port P02)

P01

general purpose I/O port (connected to port P01)

n.c.

not connected

P00

general purpose I/O port (connected to port P00)

DDD

digital supply voltage

n.c.

not connected

TEST1

test pin 1 (connected to port P10; must be left open-circuit in the application)

P11

general purpose I/O port or interrupt (connected to port P11)

P12

general purpose I/O port or interrupt (connected to port P12)

P13

general purpose I/O port or interrupt (connected to port P13)

P14

general purpose I/O port or interrupt (connected to port P14)

n.c.

not connected

P15

general purpose I/O port or interrupt (connected to port P15)

P16

general purpose I/O port or interrupt (connected to port P16)

TEST2

test pin 2 (connected to PSEN; must be left open-circuit in the application)

P17

general purpose I/O port or interrupt (connected to port P17)

RESET

input for resetting the microcontroller (active HIGH)

n.c.

not connected

n.c.

not connected

n.c.

not connected

n.c.

not connected

n.c.

not connected

RxD

serial interface receive line

TxD

serial interface transmit line

INT1

general purpose I/O port or interrupt (connected to port P33)

general purpose I/O port (connected to port P34)

AUX1

push-pull auxiliary output (

5 mA; connected to timer T1 e.g. port P35)

AUX2

push-pull auxiliary output (

5 mA; connected to timer; port P36)

P37

general purpose I/O port (connected to port P37)

XTAL2

crystal connection

XTAL1

crystal connection or external clock input

DGND

digital ground

n.c.

not connected

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

n.c.

not connected

P20

general purpose I/O port (connected to port P20)

P21

general purpose I/O port (connected to port P21)

P22

general purpose I/O port (connected to port P22)

P23

general purpose I/O port (connected to port P23)

ALARM

open-drain output for power-on reset (active HIGH or LOW by mask option)

n.c.

not connected

DELAY

external capacitor connection for delayed reset signal

PRES

card presence contact input (active HIGH or LOW by mask option)

TEST3

test pin 3 (must be left open-circuit in the application)

output port from port extension

TEST4

test pin 4 (must be left open-circuit in the application)

I/O

data line to/from the card (ISO C7 contact)

RST

card reset output (ISO C2 contact)

CLK

clock output to the card (ISO C3 contact)

card supply output voltage (ISO C1 contact)

LIS

supply for low-impedance on cards contacts

contact 5 for the step-up converter

contact 2 for the step-up converter

contact 4 for the step-up converter

DDA

analog supply voltage

contact 1 for the step-up converter

SYMBOL

PIN

DESCRIPTION

LQFP64

QFP44

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

FUNCTIONAL DESCRIPTION

Microcontroller

The microcontroller is a P80CL51 with 256 bytes of RAM
instead of 128. The baud rate of the UART has been
multiplied by four in modes 1, 2 and 3. This means that the
division factor of 32 in the formula is replaced by 8 in both
reception and transmission mode and that in the reception
modes only four samples per bit are taken with decision on
the majority of samples 2, 3 and 4; the delay counter has
been reduced from 1536 to 24 as well.

Remark: this has an impact when getting out of
power-down mode. It is recommended to switch to
internal clock before entering power-down mode.

All the other functions remain unchanged. Refer to the
P80CL51 data sheet for any further information. Internal
ports INT0 (P32), P10, P04 to P07 and P24 to P27 are
used for controlling the smart card interface.

Mode 0 is unchanged. The baud rate for modes 1 and 3 is:

The baud rate for mode 2 is:

For mode 3 timing see Table 1.

Table 1

Mode 3 timing

BAUD

RATE

clk

= 6.5 MHz;

= 5 V

clk

= 3.25 MHz;

= 5 or 3 V

SMOD

TH1

SMOD

TH1

135416

255

67708

255

45139

253

33854

254

255

27083

251

22569

253

16927

254

13542

251

11285

250

253

SMOD

-----------------

clk

256

TH1

(

)

-----------------------------------------------

SMOD

-----------------

clk

Supply

The circuit operates within a supply voltage range of
2.5 to 6 V. The supply pins are V

DDD

, V

DDA

, DGND and

AGND. Pins V

DDA

and AGND supply the analog drivers to

the card and have to be externally decoupled because of
the large current spikes that the card and the step-up
converter can create. An integrated spike killer ensures
the contacts to the card remain inactive during power-up or
power-down. An internal voltage reference is generated
which is used within the step-up converter, the voltage
supervisor and the V

generator.

The voltage supervisor generates an internal alarm pulse,
whose length is defined by an external capacitor tied to the
DELAY pin, when V

DDD

is too low to ensure proper

operation (1 ms per 1 nF typical). This pulse is used as a
reset pulse by the controller, in parallel with an external
reset input, which can be tied to the system controller.

It is also used in order to either block any spurious card
contacts during controllers reset, or to force an automatic
deactivation of the contacts in the event of supply dropout;
see Sections "Activation sequence" and "Deactivation
sequence".

In the 64 pin version, this reset pulse is output to the open
drain ALARM pin, which may be selected active HIGH or
active LOW by mask option and may be used as a reset
pulse for other devices within the application.

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

Fig.4 Supply supervisor.

handbook, full pagewidth

MGL333

Vth(VDD)

Vhys(VthVDD)

Vth(VDD)

Vth(DELAY)

VDELAY

ALARM

VDD

Low impedance supply (pin LIS)

For some applications, it is mandatory that the contacts to
the card (V

, RST, CLK and I/O) are low impedance while

the card is inactive and also when the coupler is not
powered. An auxiliary supply voltage on pin LIS ensures
this condition where I

LIS

A for V

LIS

= 5 V. This low

impedance situation is disabled when V

starts rising

during activation, and re-enabled when the step-up
converter is stopped during deactivation. If this feature is
not required, the LIS pin must be tied to V

DDD

Step-up converter

Except for the V

generator and the other cards contacts

buffers, the whole circuit is powered by V

DDD

and V

DDA

If the supply voltage is 3 or 5 V, then a higher voltage is
needed for the ISO contacts supply. When a card session
is requested by the controller, the sequencer first starts the
step-up converter, which is a switched capacitors type,
clocked by an internal oscillator at a frequency of
approximately 2.5 MHz. The output voltage V

step-up

regulated at approximately 6.5 V and then fed to the V

generator. V

and DGND are used as a reference for all

other cards contacts.

The step-up converter may be chosen as a doubler or a
tripler by mask option, depending on the voltage and the
current needed on the card.

ISO 7816 security

The correct sequence during activation and deactivation of
the card is ensured through a specific sequencer, clocked
by a division ratio of the internal oscillator.

Activation (START signal P05; see Table 3) is only
possible if the card is present (PRES HIGH or LOW
according to mask option), and if the supply voltage is
correct (ALARM signal inactive); CLK and RST are
controlled by RSTIN (internal signal; port P04), allowing
the correct count of CLK pulses during answer-to-reset
from the card.

The presence of the card is signalled to the controller by
the OFF signal (port P10; see Table 3).

During a session, the sequencer performs an automatic
emergency deactivation in the event of card take-off,
supply voltage drop, or hardware problems. The OFF
signal falls thereby warning the controller.

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

Clock circuitry

The clock to the microcontroller and the clock to the card
are derived from the main clock signal (XTAL from
2 to 16 MHz, or an external clock signal).

Directly after reset and during power reduction modes the
microcontroller clock frequency f

clk

equals

INT

; f

INT

always present because it is derived from the internal
oscillator and gives the lowest power consumption.
When required (for card session, serial communication or
anything else) the microcontroller may choose to clock
itself with

XTAL

INT

. All frequency changes

are synchronous, thereby ensuring no hang-up due to
short spikes etc.

Cards clock: the microcontroller may select to send the
card a card clock frequency of

XTAL

INT

(

1.25 MHz), or to stop the clock HIGH or LOW.

All transitions are synchronous, ensuring correct pulse
length during start or change in accordance with
ISO 7816.

After power on, CLK is set at STOP LOW and f

clk

is set at

INT

Power-down and sleep modes

The TDA8005A offers a large flexibility for defining power
reduction modes by software. Some configurations are
described below.

In the power-down mode, the microcontroller is in
power-down and the supply and the internal oscillator are

active. The card is not active; this is the smallest power
consumption mode. Any change on P1 ports or on PRES
will wake-up the circuit (for example, a key pressed on the
keyboard, the card inserted or taken off).

In the sleep mode, the card is powered but configured in
the idle or sleep mode. The step-up converter will only be
active when it is necessary to reactivate V

step-up

. When the

microcontroller is in power-down mode any change on P1
ports or on PRES will wake up the circuit.

In both power reduction modes the sequencer is active,
allowing automatic emergency deactivation in the event of
card take-off, hardware problems, or supply dropout.

The TDA8005A is set into power-down or sleep mode by
software. There are several ways to return to normal
mode: insertion or extraction of the card, detection of a
change on P1 (which can be a key pressed) or a command
from the system microcontroller. For example, if the
system monitors the clock signal on XTAL1, it may stop
this clock after setting the device into power-down mode
and then wake it up when sending the clock signal again.
In this situation, the internal clock should have been used
before the f

clk

Peripheral interface

This block allows synchronous serial communication with
the three peripherals (ISO 7816 UART, clock circuitry and
output port extension); see Figs 1 and 5.

Fig.5 Peripheral interface diagram.

handbook, full pagewidth

MGL334

CC0 CC1 CC2 CC3 CC4 CC5 CC6 CC7

clock configuration

RESET

UC0 UC1 UC2 UC3 UC4 UC5 UC6 UC7

UART configuration

UT0 UT1 UT2 UT3 UT4 UT5 UT6 UT7

UART transmit

UR0 UR1 UR2 UR3 UR4 UR5 UR6 UR7

UART receive

PERIPHERAL CONTROL

US0 US1 US2 US3 US4 US5 US6 US7

UART status register

PE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7

ports extension

P07

ENABLE

P06

STROBE

P24

DATA

P27

REG0

P26

REG1

P25

R/W

P32

INT

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

Table 2

Explanation of Fig.5; note 1

Note

1. All registers are active HIGH.

BIT NAME

DESCRIPTION

REG0 = 0, REG1 = 0 and R/W = 0; CLOCK configuration register

(configuration after reset is cards clock STOP LOW, f

clk

INT

)

CC0

cards clock =

XTAL

CC1

cards clock =

XTAL

CC2

cards clock =

XTAL

CC3

cards clock =

INT

CC4

cards clock = STOP HIGH

CC5

clk

XTAL

CC6

clk

XTAL

CC7

clk

INT

REG0 = 1, REG1 = 0 and R/W = 0; UART configuration register (after reset all bits are cleared)

UC0

ISO UART RESET

UC1

START SESSION

UC2

LCT (Last Character to Transmit)

UC3

TRANSMIT/RECEIVE

UC4

3 V/5 V

UC5 to UC7

not used

REG0 = 0, REG1 = 1 and R/W = 0; UART transmit register

UT0 to UT7

LSB to MSB of the character to be transmitted to the card

REG0 = 1, REG1 = 1 and R/W = 0; PORTS EXTENSION (after reset all bits are cleared)

PE0 to PE5

PE0 to PE5 is the inverse of the value to be written on K0 to K5

PE6 and PE7 not used

REG0 = 0, REG1 = 0 and R/W = 1; UART receive register

UR0 to UR7

LSB to MSB of the character received from the card

REG0 = 1, REG1 = 0 and R/W = 1; UART status register (after reset all bits are cleared)

US0

UART transmit buffer empty

US1

UART receive buffer full

US2

first start bit detected

US3

parity error detected during reception of a character (the UART has asked the card to repeat the
character)

US4

parity error detected during transmission of a character; the controller must write the previous
character in the UART transmit register, or abort the session

US5 to US7

not used

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

SE OF PERIPHERAL INTERFACE

Write operation

1. Select the correct register with R/W, REG0 and REG1

2. Write the word in the Peripheral Shift Register (PSR)

with DATA and STROBE; DATA is shifted on the rising
edge of STROBE; 8 shifts are necessary

3. Give a negative pulse on ENABLE; the data is parallel

loaded in the register on the falling edge of ENABLE.

Read operation

1. Select the correct register with R/W, REG0 and REG1

2. Give a first negative pulse on ENABLE; the word is

parallel loaded in the peripheral shift register on the
rising edge of ENABLE

3. Give a second negative pulse on ENABLE for

configuring the PSR in shift right mode

4. Read the word from PSR with DATA and STROBE;

DATA is shifted on the rising edge of STROBE; 7 shifts
are necessary.

XAMPLE OF PERIPHERAL INTERFACE

;****************************************

;*CHANGE OF CLOCK CONFIGURATION REGISTER*

;****************************************

;

;**THE NEW CONFIGURATION IS SUPPOSED**

;**TO BE IN THE ACCUMULATOR**

CLR REG0

CLR REG1

CLR R/W

MOV R2,#8

LOOP

RRC A

MOV DATA C

CLR STROBE

SET STROBE

DJNZ R2,LOOP

CLR ENABLE

SET ENABLE

SET DATA

RET

;****************************************

;*READ CHARACTER ARRIVED IN UART RECEIVE*

;*****************REGISTER***************

;****************************************

;

;**THE CHARACTER WILL BE IN THE**

;**ACCUMULATOR**

CLR REG0

CLR REG1

SET R/W

CLR ENABLE

SET ENABLE

CLR ENABLE

SET ENABLE

MOV R2,#8

LOOP

MOV C,DATA

RRC A

CLR STROBE

SET STROBE

DJNZ R2,LOOP

SET DATA

RET

ISO UART

The ISO UART handles all the specific requirements
defined in ISO T = 0 protocol type. It is clocked with the
cards clock, which gives the f

clk

/31 sampling rate for start

bit detection (the start bit is detected at the first LOW level
on I/O) and the f

clk

/372 frequency for Elementary Time Unit

(ETU) timing (in the reception mode the bit is sampled at

ETU). It also allows the cards clock frequency changes

without interfering with the baud rate.

This hardware UART allows operating of the
microcontroller at low frequency, thus lowering EM
radiations and power consumption. It also frees the
microcontroller of fastidious conversions and real time jobs
thereby allowing the control of higher level tasks.

The following occurs in the reception mode (see Fig.6):

Detection of the inverse or direct convention at the
beginning of Answer To Reset (ATR)

Automatic convention setting, so the microcontroller
only receives characters in direct convention

Parity checking and automatic request for character
repetition in case of error (reception is possible at
12 ETU).

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

The following occurs in the transmission mode (see Fig.7):

Transmission according to the convention detected
during ATR, consequently the microcontroller only has
to send characters in direct convention; transmission of
the next character may start at 12 ETU in the event of no
error or 13 ETU in case of error

Parity calculation and detection of repetition request
from the card in the event of error

The bit LCT (Last Character to Transmit) allows fast
reconfiguration for receiving the answer 12 ETU after
the start bit of the last transmitted character.

The ISO UART status register can inform which event has
caused an interrupt (buffer full, buffer empty, parity error
detected etc.) in accordance with peripheral interface.

The register is reset when its status is read by the
microcontroller.

The ISO UART configuration register enables the
microcontroller to configure the ISO UART and to choose
between 5 or 3 V cards. Bit UC4 (3 V/5 V) LOW means
5 V card, bit UC4 (3 V/5 V) HIGH means 3 V card; conform
peripheral interface. The selection of 3 or 5 V card has to
be done before activation.

After power-on, all ISO UART registers are reset.

The ISO UART is configured in the reception mode. When
the microcontroller wants to start a session, it sets the bits
UC1 (START SESSION) and UC0 (ISO UART RESET) in
the UART configuration register and then sets bit START
SESSION LOW. When the first start bit on I/O is detected
(sampling rate f

clk

/31), the UART sets the bit US2 (first

start bit detected) in the status register which gives an
interrupt on internal port INT0 one clock pulse later.

The convention is recognized on the first character of the
ATR and the UART configures itself in order to exchange
direct data without parity processing with the
microcontroller whatever the convention of the card is.
Bit UC1 (START SESSION) must be reset by software.
At the end of every character, the UART tests the parity
and resets what is necessary for receiving another
character.

If no parity error is detected, the UART sets bit US1 (UART
receive buffer full) in the status register which warns the
microcontroller it has to read the character before the
reception of the next one has been completed. The status
register is reset when read from the controller.

If a parity error has been detected, the UART pulls the I/O
line LOW between 10.5 and 12 ETU. It also sets the
bits US1 (UART receive buffer full) and US3 (parity error
detected during reception of a character) in the status
register which warns the microcontroller that an error has
occurred. The card is supposed to repeat the previous
character.

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

When the controller needs to transmit data to the card, it
first sets bit UC3 in the UART configuration register which
configures the UART in the transmission mode. As soon
as a character has been written in the UART transmit
register, the UART makes the conversion, calculates the
parity and starts the transmission on the rising edge of
ENABLE. When the character has been transmitted, it
surveys the I/O line at 11 ETU in order to know if an error
has been detected by the card.

If no error has occurred, the UART sets bit US0 (UART
transmit buffer empty) in the status register and waits for
the next character. If the next character has been written
before 12 ETU, the transmission will start at 12 ETU. If it
was written after 12 ETU it will start on the rising edge of
ENABLE.

If an error has occurred, it sets bits US0 and US4 (parity
error detected during transmission of a character) which
warns the microcontroller to rewrite the previous character
in the UART transmit register.

If the character has been rewritten before 13 ETU, the
transmission will start at 13 ETU. If it has been written after
13 ETU it will start on the rising edge of ENABLE.

When the transmission is completed, the microcontroller
may set bit LCT (Last Character to Transmit) so that the
UART will force the reception mode into ready to get the
reply from the card at 12 ETU. This bit must be reset
before the end of the first reception. Bit UC3
(TRANSMIT/RECEIVE) must be reset to enable the
reception of the characters to follow.

When the session is completed, the microcontroller
re-initializes the whole UART by resetting bit UC0 (ISO
UART RESET).

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

I/O buffer modes (see Fig.8)

The I/O buffer modes are:

I/O buffer disabled

I/O buffer in input, 20 k

pull-up resistor connected

between I/O and V

, I/O masked till 200 clock pulses

I/O buffer in input, 20 k

pull-up resistor connected

between I/O and V

, I/O is sampled every 31 clock

pulses

I/O buffer in output, 20 k

pull-up resistor connected

between I/O and V

I/O buffer in output, I/O is pulled LOW by the N transistor
of the buffer

I/O buffer in output, I/O is pulled HIGH or LOW by the
P or N transistor.

Output ports extension

In the LQFP64 version, 6 auxiliary output ports may be
used for low frequency tasks (for example, keyboard
scanning). These ports are push-pull output types
(in accordance with use in software document).

Activation sequence

When the card is inactive, V

, CLK, RST and I/O are

LOW, with low impedance with respect to GND.
The step-up converter is stopped. The I/O is configured in
the reception mode with a high impedance path to the ISO
UART, subsequently no spurious pulse from the card
during power-up will be taken into account until I/O is
enabled. When conditions are fulfilled (supply voltage
present, card present, no hardware problems), the
microcontroller may initiate an activation sequence by
setting START LOW (t

; see Fig.9):

1. The step-up converter is started (t

)

2. LIS signal is disabled by internal signal ENLI, and V

starts rising from 0 to 5 or 3 V (according to bit 4 of
UART configuration register) with a controlled rise time
of 0.1 V/

s typically (t

)

3. I/O buffer is enabled (t

)

4. Clock is sent to the card (t

)

5. RST buffer is enabled (t

In order to allow a precise count of clock pulses during
ATR, a defined time window (t

; t

) is opened where the

clock may be sent to the card by means of RSTIN
(port P04). Beyond this window, RSTIN has no more
action on clock, and only monitors the cards RST contact
(RST is the inverse of RSTIN).

The sequencer is clocked by f

INT

/64 which leads to a time

interval T of 25

s typical. Thus t

= 0 to

= t

T, t

= t

+ 4T, t

= t

to t

and t

= t

+ 7T.

Deactivation sequence

When the session is completed, the microcontroller sets
START HIGH. The circuit then executes an automatic
deactivation sequence (see Fig.10):

1. Card reset (RST falls LOW) at t

2. Clock is stopped at t

3. I/O becomes high impedance to the ISO UART (t

)

4. V

falls to 0 V with typical 0.1 V/

s slew rate (t

)

5. The step-up converter is stopped and CLK; RST, V

and I/O become low impedance to GND (t

)

6. t

T; t

= t

T; t

= t

+ T; t

= t

+ 5T.

Protections

Main hardware fault conditions are monitored by the
circuit:

Overcurrent on V

(in accordance with options as

specified in Table 3)

Short circuits between V

and other contacts

Card take-off during transaction.

When one of these problems is detected, the security logic
block pulls the interrupt line (port P10) OFF LOW, in order
to warn the microcontroller and initiates an automatic
deactivation of the contacts. When the deactivation has
been completed, the OFF line returns HIGH, except if the
problem was due to a card extraction in which case it
remains LOW until a card is inserted.

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices.

THERMAL CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

DDA

analog supply voltage

0.3

+6.5

DDD

digital supply voltage

0.3

+6.5

all input voltages

0.3

+ 0.5

DC current into pins XTAL1, XTAL2, RxD,
TxD, RESET, INT1, T0 (port P34), P37,
P00 to P03, P11 to P17, P20 to P23 and
TEST1 to TEST4

DC current from or to pins AUX1 and AUX2

+10

DC current from or to pins S1 to S5

+30

DC current into pin DELAY

+10

DC current from or to pin PRES

DC current from and to pins K0 to K5

DC current from or into pin ALARM
(according to option choice)

tot

total power dissipation

amb

25 to +85

500

stg

storage temperature

+150

esd

electrostatic discharge

on pins I/O, V

, RST,

CLK and PRES

on other pins

junction temperature

125

SYMBOL

PARAMETER

CONDITIONS

VALUE

UNIT

th(j-a)

thermal resistance from junction to ambient in free air

LQFP64

K/W

QFP44

K/W

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

CHARACTERISTICS

= 5 V; V

= 0 V; T

amb

= 25

C; for general purpose I/O ports refer to P80CL51 data sheet; unless otherwise

specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supply

supply voltage

voltage superior, option
dependant; note 1

2.5

6.0

DD(pd)

supply current in power-down
mode

= 5 or 3 V; card inactive

100

DD(sm)

supply current in sleep mode

card powered but clock
stopped; no load

doubler option

500

tripler option

700

DD(om)

supply current operating
mode

unloaded; f

XTAL

= 13 MHz;

clk

= 6.5 MHz;

card

= 3.25 MHz

5.5

= 3 V; f

XTAL

= 13 MHz;

clk

= 3.25 MHz;

card

= 3.25 MHz

th(VDD)

threshold voltage on V

(falling)

supervisor option

2.3

2.45

3.8

4.5

hys(VthVDD)

hysteresis on V

th(VDD)

350

th(DELAY)

threshold voltage on
pin DELAY

1.38

DELAY

voltage on pin DELAY

0.5

DELAY

output current at pin DELAY

pin grounded (charge)

1.5

0.4

DELAY

= V

(discharge)

6.8

ALARM pulse width

DELAY

= 10 nF

ALARM (open drain active HIGH or LOW output)

HIGH-level output current

active LOW option;
V

= 5 V

LOW-level output voltage

active LOW option;
I

= 2 mA

0.4

LOW-level output current

active HIGH option;
V

= 0 V

HIGH-level output voltage

active HIGH option;
I

2 mA

Crystal oscillator; note 2

XTAL

crystal frequency

MHz

ext

frequency of external signal
applied on pin XTAL1

MHz

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

Step-up converter

INT

internal oscillation frequency

MHz

step-up

voltage on pin S5

5 V card

6.5

3 V card

4.5

Low impedance supply (pin LIS)

LIS

voltage on pin LIS

LIS

current at pin LIS

Reset output to the card (pin RST)

o(RST)

output voltage

when inactive or when LIS
is used; I

o(RST)

= 1 mA

0.3

+0.4

o(RST)

output current

when inactive and pin
grounded

LOW-level output voltage

= 200

0.25

+0.4

HIGH-level output voltage

200

5 V card

+ 0.3

3 V card

2.4

+ 0.3

rise time

= 30 pF

fall time

= 30 pF

Clock output to the card (pin CLK)

o(CLK)

output voltage

when inactive or when LIS
is used; I

o(CLK)

= 1 mA

0.3

+0.4

o(CLK)

output current

when inactive and pin
grounded

LOW-level output voltage

= 200

0.25

+0.4

HIGH-level output voltage

200

0.5

+ 0.25 V

rise time

= 30 pF

fall time

= 30 pF

clk

clock frequency

1 MHz idle configuration

1.5

MHz

low operating speed

MHz

middle operating speed

MHz

high operating speed

MHz

duty cycle

= 30 pF

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

Card supply voltage (pin V

)

o(VCC)

card supply output voltage

when inactive and when LIS
is used; I

o(VCC)

= 1 mA

0.3

+0.4

when active; 5 V card

no load

4.85

5.05

5.25

static load

4.75

5.0

5.25

dynamic loads on 200 nF
capacitor

4.5

5.4

when active; 3 V card

no load

2.9

3.03

3.15

static load

2.79

3.21

dynamic loads on 200 nF
capacitor

2.75

3.25

o(VCC)

card supply output current

when inactive and pin
grounded

when active

limited

note 1

slew rate on V

(rise and fall)

maximum load capacitor
250 nF (including typical
200 nF decoupling)

0.04

0.1

0.16

Data line (pin I/O)

o(I/O)

output voltage

when inactive or when LIS
is used; I

o(I/O)

= 1 mA

0.3

+0.4

o(I/O)

output current

when inactive and pin
grounded

LOW-level output voltage

I/O configured as output;
I

= 1 mA

0.25

+0.3

HIGH-level output voltage

I/O configured as output;
I

100

0.8V

+ 0.25 V

LOW-level input voltage

I/O configured as input;
I

= 1 mA

0.5

HIGH-level input voltage

I/O configured as input;
I

= 100

0.6V

rise time

= 30 pF

fall time

= 30 pF

Protections

CC(sd)

shutdown current at pin V

00/30/60;
note 1

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

Notes

1. See Table 3 for mask options.

2. The crystal oscillator is the same as option 3 of the P80CL51.

Timing

act

activation sequence duration

225

deactivation sequence
duration

150

3(start)

start of the window for
sending clock to the card

130

5(end)

end of the window for sending
clock to the card

140

Auxiliary outputs (AUX1 and AUX2)

LOW-level output voltage

= 5 mA

0.4

HIGH-level output voltage

5 mA

Output ports from extension (K0 to K5)

LOW-level output voltage

= 2 mA

0.4

HIGH-level output voltage

2 mA

Card presence input (pin PRES)

LOW-level input voltage

1 mA

0.6

HIGH-level input voltage

= 100

0.7V

HIGH-level input current

= 5 V

0.2

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

1998

Mar

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in

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APPLICA

TION INFORMA

TION

handbook, full pagewidth

26
27

31
32

55
54

50
49

4.7
nF

KEYBOARD

100 nF

K1
K2

NC8

NC7

NC6

NC5

NC1

NC2

NC3

NC4

100 nF

47 nF

4.7
nF

100

TDA8005AG

5 V (logic)

1.5

LED2

LED1

MMI-CLK

MMI-EN

RESET

MMI-REQ

LIS

CARD READ UNIT

C702

MGL339

from

system

controller

5 V (logic)

5 V (analog)

100

5 V

(analog)

Fig.11 Possible GSM application.

1998

Mar

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in

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ha
ndbook, full pagewidth

26
27

31
32

55
54

50
49

7.15

MHz

33
pF

4.7
nF

DISPLAY DRIVER

AND DISPLAY

D7 D6 D5 D4

D3 D2 D1 D8

R/W

VDD

KEYBOARD

100 nF

K1
K2

NC1

NC2

NC3

NC4

NC5

NC6

NC7

NC8

3 V

100 nF

47 nF

47
nF

100
nF

TDA8005AG

LED1

LED2

CARD READ UNIT

LM01

MGL340

Fig.12 Possible stand-alone application.

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

SOLDERING

Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

"IC Package Databook" (order code 9398 652 90011).

Reflow soldering

Reflow soldering techniques are suitable for all LQFP and
QFP packages.

The choice of heating method may be influenced by larger
plastic QFP packages (44 leads, or more). If infrared or
vapour phase heating is used and the large packages are
not absolutely dry (less than 0.1% moisture content by
weight), vaporization of the small amount of moisture in
them can cause cracking of the plastic body. For more
information, refer to the Drypack chapter in our

"Quality

Reference Handbook" (order code 9397 750 00192).

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 50 and 300 seconds depending on heating
method. Typical reflow peak temperatures range from
215 to 250

Wave soldering

Wave soldering is not recommended for LQFP and QFP
packages. This is because of the likelihood of solder
bridging due to closely-spaced leads and the possibility of
incomplete solder penetration in multi-lead devices.

CAUTION

Wave soldering is NOT applicable for all LQFP and
QFP packages with a pitch (e) equal or less than
0.5 mm.

If wave soldering cannot be avoided, for LQFP and
QFP packages with a pitch (e) larger than 0.5 mm, the
following conditions must be observed:

A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.

The footprint must be at an angle of 45

to the board

direction and must incorporate solder thieves
downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260

C, and

maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150

C within

6 seconds. Typical dwell time is 4 seconds at 250

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Repairing soldered joints

Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300

C. When

using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320

1998 Mar 20

Philips Semiconductors

Preliminary specification

Low-power (3 V/5 V) smart card coupler

TDA8005A

DEFINITIONS

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

Data sheet status

Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification

This data sheet contains preliminary data; supplementary data may be published later.

Product specification

This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

Internet: http://www.semiconductors.philips.com

Philips Semiconductors a worldwide company

SCA57

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under patent- or other industrial or intellectual property rights.

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Printed in The Netherlands

435102/1200/01/pp36

Date of release: 1998 Mar 20

Document order number:

9397 750 02512

Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA8005A

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA8005A