2001 Aug 15

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

FEATURES

Two independent 6 contacts smart card interfaces

Supply voltage to the cards; V

= 5 or 3 V

5%; I

to 65 mA

Integrated DC/DC converter (doubler, tripler or follower)
for allowing power supply from 2.5 to 6.5 V

Independant supply voltage for interface signals (from
1.5 to 6.5 V)

Control and status via the I

C-bus

Four possible devices in parallel due to two I

C-bus

address pins

Electrical specifications according to ISO 7816 or
EMV norms

Automatic activation and deactivation sequences by
means of integrated sequencers

Automatic clock count and reset toggling during warm or
cold reset

Interrupt request output to the controller

6 kV ESD protection on cards contacts

Automatic emergency deactivation in the event of
supply drop-out, overload, overheating or card take-off

Current limitation on pins CLK, RST, I/O and V

Integrated voltage supervisor for power-on reset and
drop-out detection

Power-down mode with several wake-up events.

APPLICATIONS

Set top boxes

Banking terminals

Internet terminals.

GENERAL DESCRIPTION

The TDA8020HL is a one-chip dual smart card interface.
Controlled by the I

C-bus, it guarantees conformity to

ISO 7816 or EMV norms with very few external
components.

ORDERING INFORMATION

TYPE

NUMBER

PACKAGE

NAME

DESCRIPTION

VERSION

TDA8020HL

LQFP32

plastic low profile quad flat package; 32 leads; body 7

1.4 mm

SOT358-1

2001 Aug 15

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

QUICK REFERENCE DATA

Note

1. Both cards are not allowed to operate at maximum current at the same time at minimum supply voltage.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

supply voltage on pins V

and

DDA

2.5

6.5

DDI

supply voltage for interface
signals

1.5

supply current (I

and I

DDA

)

= 3.3 V; inactive mode

150

= 3.3 V; Power-down mode;

2 cards activated; V

CC1

= V

CC2

= 5 V;

CC1

= I

CC2

= 100

CLK1 and CLK2 stopped

= 3.3 V; active mode;

CC1

= V

CC2

= 5 V;

CC1

+ I

CC2

= 80 mA;

CLK1 = CLK2 = 5 MHz

400

= 3.3 V; active mode;

CC1

= V

CC2

= 3 V;

CC1

= I

CC2

= 10 mA;

CLK1 = CLK2 = 5 MHz

CC1

, V

CC2

supply voltage for card 1 and 2 note 1

5 V card

4.75

5.25

3 V card

2.80

3.20

CC1

, I

CC2

supply current for card 1 and 2

th1

threshold voltage for the
supervisor on V

2.1

2.4

hys1

hysteresis on V

th1

100

amb

ambient temperature

+85

2001 Aug 15

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

PINNING

SYMBOL

PIN

DESCRIPTION

PRES1

card 1 presence contact input (active HIGH)

CGND1

ground connection output to card 1 (C5 contact)

CLK1

clock output to card 1 (C3 contact)

CC1

supply voltage output to card 1 (C1 contact); decouple to pin CGND1 with 2

100 nF

capacitors with ESR < 100 m

RST1

reset output to card 1 (C2 contact)

I/O2

I/O contact to card 2 (C7 contact); internal 15 k

pull-up resistance to pin V

CC2

PRES2

card 2 presence contact input (active HIGH)

CGND2

ground connection output to card 2 (C5 contact)

CLK2

clock output to card 2 (C3 contact)

CC2

supply voltage output to card 2 (C1 contact); decouple to pin CGND2 with 2

100 nF

capacitors with ESR < 100 m

RST2

reset output to card 2 (C2 contact)

GND

ground connection

output of DC/DC converter; a 220 nF capacitor with ESR < 100 m

must be connected

to pin AGND

SAP

capacitors connection for the DC/DC converter; a 220 nF capacitor with
ESR < 100 m

must be connected between pins SAP and SAM

SBP

capacitors connection for the DC/DC converter; a 220 nF capacitor with
ESR < 100 m

must be connected between pins SBP and SBM

DDA

analog supply voltage for the DC/DC converter

SBM

capacitors connection for the DC/DC converter; a 220 nF capacitor with
ESR < 100 m

must be connected between pins SBP and SBM

AGND

analog ground connection for the DC/DC converter

SAM

capacitors connection for the DC/DC converter; a 220 nF capacitor with
ESR < 100 m

must be connected between pins SAP and SAM

power supply voltage

SCL

serial clock input of the I

C-bus (open drain)

SDA

serial data input/output of the I

C-bus (open drain)

SAD0

C-bus address selection input 0

SAD1

C-bus address selection input 1

IRQ

interrupt request output to host (open drain; active LOW)

CLKIN1

external clock input for card 1

I/O1uC

I/O connection to host for card 1; internal 22 k

pull-up resistor to V

DDI

I/O2uC

I/O connection to host for card 2; internal 22 k

pull-up resistor to V

DDI

CLKIN2

external clock input for card 2

DEL

delay capacitor connection for the voltage supervisor (1 ms per 2 nF)

DDI

interface signals reference supply voltage

I/O1

I/O contact to card 1 (C7 contact); internal 15 k

pull-up resistor to V

CC1

2001 Aug 15

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

FUNCTIONAL DESCRIPTION

Throughout this specification, it is assumed that the reader
is familiar with ISO 7816 norm terminology.

Supply

The TDA8020HL operates with a supply voltage from
2.5 to 6.5 V. An integrated voltage supervisor ensures that
no spike appears on cards contacts during power-on or off.
The supervisor also initializes the device, and forces an
automatic emergency deactivation of the contacts in the
event of a supply drop-out.

As long as the supply voltage is below the threshold
voltage V

th1

, the capacitor C

DEL

remains uncharged. When

the supply voltage reaches V

th1

and V

hys1

, then C

DEL

charged with a small current source of approximately 2

When the voltage on C

DEL

reaches V

th2

, then the

supervisor is no longer active. As long as the supervisor is
active (pin IRQ is LOW), bit SUPL in the status register is
set. When pin IRQ goes HIGH the supervisor becomes
inactive (see Fig.3).

Separate supply pins are used for the DC/DC converter,
allowing specific decoupling for counteracting the noise
the switching transistors may induce on the supply.

A specific reference supply voltage, V

DDI

, is used for the

interface signals CLKIN1, CLKIN2, I/O1uC, I/O2uC,
SAD0, SAD1, SCL, SDA and IRQ, which can be lower
than V

(minimum 1.5 V), thus allowing direct control with

a low voltage supplied device.

Pins SCL, SDA and IRQ are open-drain outputs, and may
be externally pulled up to a voltage higher than V

C-bus

A 400 kHz I

C-bus slave interface is used for configuring

the device and reading the status. The bus has
2 addresses, one for each card. 4 devices may be used in
parallel due to the address selection pins SAD0 and SAD1
(see Table 1).

Table 1

Proposed addresses

PIN SAD1

PIN SAD0

CARD 1

CARD 2

LOW

40H

48H

LOW

HIGH

42H

4AH

HIGH

LOW

44H

4CH

HIGH

46H

4EH

handbook, full pagewidth

FCE835

BUS OK

BUS NOT

RESPONDING

BUS NOT

RESPONDING

BUS NOT RESPONDING

BUS OK

status read

after event

VDD

Vth1

Vhys1

Vth1

Vth2

VCDEL

IRQ

Fig.3 Supply supervisor.

2001 Aug 15

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

RITING COMMANDS

START, ADDRESS, WRITE, CONTROL byte, STOP.

Table 2

CONTROL bits (all bits cleared after power-on)

NAME

BIT

DESCRIPTION

START/STOP

when set, initiates an activation and a cold reset procedure; when reset, initiates a
deactivation sequence

WARM

when set, initiates a warm reset procedure; automatically reset by hardware when the card
starts answering or when the card is declared mute

3 and 5 V

when set, V

= 3 V; when reset, V

= 5 V

PDOWN

when set, the configuration defined by bit CLKPD is applied on pin CLK, and the circuit
enters the Power-down mode; when reset, the circuit goes back to normal (active) mode

CLKPD

when set, CLK is stopped HIGH during Power-down mode; when reset, CLK is stopped LOW
in Power-down mode

CLKSEL1

bits 5 and 6 determine the clock to the card in normal mode according to Table 3

CLKSEL2

I/OEN

when set, I/O is transferred on I/OuC; when reset, I/O to I/OuC is high-impedance

When deactivating the card, by resetting the START bit,
only bit 0 must be changed.

The clock to the cards in active mode is selected with
bits CLKSEL1 and CLKSEL2; see Table 3.

Table 3

Selecting the card clock.

All frequency changes are synchronous, thus ensuring
that no pulse is shorter than 45% of the smallest period.
For cards power reduction modes, CLKIN may be stopped
after switching to STOP LOW or STOP HIGH. CLKIN
should be restarted before leaving this mode.

A correct duty factor can not be guaranteed in the CLKIN
configuration, as it depends on the duty factor of the
CLKIN signal.

BIT CLKSEL2

BIT CLKSEL1

CLOCK

OUTPUT

CLKIN/8

CLKIN/4

CLKIN/2

CLKIN

2001 Aug 15

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

EADING STATUS

START, ADDRESS, READ, STATUS byte, STOP.

Table 4

STATUS bits (all bits cleared after power-on, except SUPL and PRES)

When one of the bits PRESL, MUTE, EARLY and PROT is set, then pin IRQ goes LOW until the status byte has been
read. After power-on, bit SUPL is set until the status byte has been read, and pin IRQ is LOW until the supervisor
becomes inactive.

NAME

BIT

DESCRIPTION

PRES

set when the card is present; reset when the card is not present

PRESL

set when the card has been inserted or extracted; reset when the status has been read

I/O

set when I/O is HIGH and reset if I/O is LOW

SUPL

set when the supervisor has signalled a fault; reset when the status has been read

PROT

set when an overload or an overheating has occurred during a session; reset when the
status has been read

MUTE

set during ATR when the selected card has not answered during the ISO 7816 time slots

EARLY

set during ATR when the selected card has answered too early

ACTIVE

set if the card is active; reset if the card is inactive

DC/DC converter

CC1

is the supply voltage for card 1 contacts, V

CC2

for

card 2 contacts. Card 1 and card 2 may be independently
powered-down, powered at 5 V or powered at 3 V. A
capacitor type step-up converter is used for generating
these voltages. This step-up converter acts either as a
doubler, tripler or follower.

If V

is the maximum value of V

CC1

and V

CC2

, then there

are 4 possible situations:

= 3 V and V

= 3 V: in this case, the DC/DC

converter acts as a doubler with a regulation of
approximately 4.0 V

= 3 V and V

= 5 V: in this case, the DC/DC

converter acts as a tripler with a regulation of
approximately 5.5 V

= 5 V and V

= 3 V: in this case, the DC/DC

converter acts as a follower: V

is applied on V

= 5 V and V

= 5 V: in this case, the DC/DC

converter acts as a doubler with a regulation of
approximately 5.5 V.

The switch between the modes is automatically executed
when V

is approximately 3.4 V.

Each card may independently draw a current up to 65 mA,
also during activation, with a supply voltage from 2.5 V up
to 6.5 V provided the sum of I

CC1

and I

CC2

does not

exceed 80 mA.

If V

> 3 V, for 5 V cards, then both cards can draw up to

55 mA at the same time.

If V

> 3.3 V, for 3 V cards, then both cards can draw up

to 50 mA at the same time.

The DC/DC converter is powered with specific pins (V

DDA

and AGND) to enable separate decoupling.

The output voltage, V

, is internally fed to the V

generators. V

CC1

, V

CC2

and CGND1, CGND2 are used as

a reference for all other cards contacts.

Sequencers and clock counter

Two sequencers are used to ensure activation and
deactivation sequences according to ISO 7816 and
EMV norms, even in the event of an emergency (card
removal during transaction, supply drop-out and hardware
problem).

The sequencers are clocked by the internal oscillator.

The activation of a card is initiated by setting the card
select bit and the start bit within the control register. This is
only possible if the card is present and if the voltage
supervisor is not active.

During activation the DC/DC converter is initiated (except
if another card is already powered up or if V

= 5 V and

= 3 V). V

then goes high to the selected voltage

(3 or 5 V), the I/O lines are then enabled and the clock is
started with RST LOW.

2001 Aug 15

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

If a start bit is detected on the I/O during the first 200 CLK
pulses, then it is omitted. If a start bit is detected between
200 and 352 CLK pulses, then bit EARLY is set in the
status register. If the card starts answering before
41950 CLK pulses, then RST remains LOW level. If not,
after 41950 CLK pulses, RST is toggled HIGH. If, again, a
start bit is detected within 352 CLK pulses, bit EARLY is
set in the status register. If the card does not answer
before 41950 new CLK pulses, then bit MUTE is set in the
status register. If the card answers within the correct
window, then the CLK count is stopped and the system
controller may send commands to the card.

Deactivation is initiated either by the system controller
(reset bit START), or automatically in the event of a
hardware problem or supply drop-out. With a supply
drop-out both cards are deactivated at the same time.

During deactivation, RST goes LOW, the clock is stopped
and the I/O lines go LOW. V

then goes low with a

controlled slope and the DC/DC converter is stopped if no
card is active.

Outside a session, cards contacts are forced low
impedance to CGND.

Activation sequence

When the cards are inactive, V

, CLK, RST and I/O are

LOW, with low impedance with respect to CGND. The
DC/DC converter is stopped.

When everything is satisfactory (voltage supply, card
present and no hardware problems), the system controller
may initiate an activation sequence of a present card
(see Fig.4):

The DC/DC converter is started (t1). If one card was
already active, then the DC/DC converter was already
on, and nothing more occurs at this step

starts rising from 0 to 5 or 3 V with a controlled rise

time of 0.14 V/

s typical (t2)

I/O rises to V

(t3); internal 10 k

pull-up resistors to

CLK is sent to the card and RST is enabled (t4 = t

act

If the card does not answer within the first 41950 CLK
cycles, then RST is raised HIGH (t5).

The sequencer is clocked by f

int

/64 which leads to a time

interval T of 25

s typical. Thus t1 = 0 to T/64;

t2 = t1 + 3T/2; t3 = t1 + 7T/2 and t4 = t1 + 4T.

VUP

VCC

I/O

CLK

RST

handbook, full pagewidth

START/STOP

t0 t1

FCE837

ATR

Fig.4 Activation sequence.

t4 = t

act

2001 Aug 15

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

Deactivation sequence

When the session is completed, the microcontroller resets
bit START/STOP to logic 0 (t10). The circuit then executes
an automatic deactivation sequence (see Fig.5):

Card reset (RST falls LOW) (t11)

CLK is stopped (t12)

I/O falls to 0 V (t13)

falls to 0 V with typical 0.14 V/

s slew rate (t14)

The DC/DC converter is stopped (if both cards are
inactive) and CLK, RST, V

and I/O become low

impedance to CGND (t15).

t11 = t10 + T/64; t12 = t11 + T/2; t13 = t11 + T;
t14 = t11 + 3T/2; t15 = t11 + 7T/2.

The deactivation time t

is the time that V

needs to drop

below 0.4 V from START/STOP to logic 0 (t10).

handbook, full pagewidth

tde

t10 t11

t12

t13

t14

t15

VUP

VCC

I/O

CLK

RST

START/STOP

FCE836

Fig.5 Deactivation sequence.

2001 Aug 15

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

Protections

The current on pin CLK is limited to

70 mA.

The current on pin RST is limited to

20 mA; if the current

reaches this value with RST LOW, then an emergency
deactivation sequence is performed, IRQ is pulled LOW
and bit PROT is set in the status register.

The current on pins I/O is limited to +15 and

15 mA.

The current on V

is limited to 90 mA; if I

reaches this

value, then an emergency deactivation sequence is
performed, IRQ is pulled LOW and bit PROT is set in the
status register.

In the event of overcurrent on V

, card take-off during a

session, overheating, or overcurrent on RST, then the
TDA8020HL performs an automatic emergency
deactivation sequence on the corresponding card, resets
bit START/STOP and pulls pin IRQ LOW.

In the event of overheating or supply drop-out, the
TDA8020HL performs an automatic emergency
deactivation sequence on both cards, resets both bits
START/STOP and pulls pin IRQ LOW.

Clock inputs and data inputs/outputs to the system
controller

CLKIN1 is the input clock for card 1, CLKIN2 for card 2.
They may be driven separately from the system controller,
or be tied together externally and driven with the same
signal.

An RC filter is needed on these lines in order to limit the
influence of possible fast transitions.

I/O1uC is the data signal to or from card 1, I/O2uC to or
from card 2. They can be driven separately from the
system controller, in which case both bits I/OEN may be
set to logic 1. They can also be driven by the same signal,
in which event they have to be tied together externally, but
each bit I/OEN has to be set or reset according to the
addressed card.

LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

supply voltage on pins V

and V

DDA

0.5

+6.5

DDI

supply voltage for interface signals

0.5

+6.5

input voltage

on pins SAP, SAM, SBP, SBM and V

0.5

+7.5

on all other pins

0.5

+ 0.5

DC current

from or to pins SAP, SAM, SBP, SBM
and V

200

+200

from or to all other pins

tot

total power dissipation

amb

20 to +85

460

stg

storage temperature

+150

junction temperature

125

electrostatic discharge voltage

on pins I/O1, V

CC1

, RST1, CLK1,

CGND1, PRES1, I/O2, V

CC2

, RST2,

CLK2, CGND2 and PRES2

on all other pins

2001 Aug 15

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

THERMAL CHARACTERISTICS

CHARACTERISTICS
V

= 3.3 V; V

DDI

= 1.5 V; f

CLKIN1

= f

CLKIN2

= 10 MHz; GND = 0 V; T

amb

= 25

C; unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

VALUE

UNIT

th(j-a)

thermal resistance from junction to ambient

in free air

K/W

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Temperature

amb

ambient temperature

+85

Supply

supply voltage on pins V

and V

DDA

2.5

6.5

supply current (I

and I

DDA

) inactive mode

150

Power-down mode; 2 cards
activated; V

CC1

= V

CC2

= 5 V;

CC1

= I

CC2

= 100

A; CLK1 and

CLK2 stopped

2.5

active mode; V

CC1

= V

CC2

= 5 V;

CC1

+ I

CC2

= 80 mA;

CLK1 = CLK2 = 5 MHz

400

active mode; V

CC1

= V

CC2

= 3 V;

CC1

= I

CC2

= 10 mA;

CLK1 = CLK2 = 5 MHz

DDI

supply voltage for interface
signals

1.5

DDI

supply current for interface
signals

120

th1

threshold voltage on V

falling

2.1

2.4

hys1

hysteresis on V

th1

100

th2

threshold voltage on
pin C

DEL

1.38

CDEL

voltage on pin C

DEL

+ 0.3

CDEL

output current at pin C

DEL

pin grounded (charge)

CDEL

= V

(discharge)

width of the internal ALARM
pulse

DEL

= 22 nF

DC/DC converter

int

internal oscillator frequency

2.5

MHz

voltage on pin V

at least one 5 V card

5.5

both cards 3 V

detection voltage for doubler,
tripler and follower selection

3.4

2001 Aug 15

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

Card supply voltages (pins V

CC1

and V

CC2

); note 1

o(inactive)

output voltage in inactive
mode

no load

0.1

inactive

= 1 mA

0.3

inactive

current from V

when

inactive

pin grounded

CC(ripple)

output voltage including
ripple

active mode; I

< 65 mA;

5 V card; I

CC1

+ I

CC2

< 80 mA;

2.5 V < V

< 6.5 V

4.75

5.25

active mode; I

< 65 mA;

3 V card; I

CC1

+ I

CC2

< 80 mA;

2.5 V < V

< 6.5 V

2.8

3.2

active mode; current pulses of
40 nAs with I < 200 mA and
t < 400 ns; f < 20 MHz; 5 V card

4.6

5.4

active mode; current pulses of
24 nAs with I < 200 mA and
t < 400 ns; f < 20 MHz; 3 V card

2.76

3.24

CC(load)

output voltage when both
slots fully loaded

active mode; V

> 3 V;

CC1

< 55 mA; I

CC2

< 55 mA;

5 V cards

4.6

5.4

active mode; V

> 3.3 V;

< 50 mA; I

CC2

< 50 mA;

3 V cards

2.76

3.24

output current

from 0 to 5 V (5 V card); the other
card at full load; V

> 3 V

from 0 to 3 V (3 V card); the other
card at full load; V

> 3.3 V

shorted to GND

100

ripple(p-p)

ripple voltage (peak-to-peak
value)

from 20 kHz to 200 MHz

350

slew rate

up or down (maximum
capacitance is 300 nF)

0.08

0.14

0.20

Reset output to the cards (pins RST1 and RST2)

o(inactive)

output voltage in inactive
mode

no load

0.1

inactive

= 1 mA

0.3

inactive

current from pin RST when
inactive

pin grounded

LOW-level output voltage

= 200

0.3

HIGH-level output voltage

200

0.5

rise time

= 30 pF

0.1

fall time

= 30 pF

0.1

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

2001 Aug 15

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

Clock output to the cards (pins CLK1 and CLK2)

o(inactive)

output voltage in inactive
mode

no load

0.1

inactive

= 1 mA

0.3

inactive

current from pin CLK when
inactive

pin grounded

LOW-level output voltage

= 200

0.3

HIGH-level output voltage

200

0.5

rise time

= 30 pF

fall time

= 30 pF

clk

clock frequency

1 MHz Idle configuration

1.5

MHz

operational

MHz

duty factor

= 30 pF

slew rate (rise and fall)

= 30 pF

0.2

V/ns

Data lines (pins I/O1 and I/O2); note 2

o(inactive)

output voltage in inactive
mode

no load

0.1

inactive

= 1 mA

0.3

inactive

current from pin I/O when
inactive

pin grounded

LOW-level output voltage

= 1 mA

0.3

HIGH-level output voltage

no DC load

0.9V

+ 0.1

0.8V

+ 0.1

0.75V

+ 0.1

edge

current from pins I/O1
and I/O2 when active pull-up

= 0.9V

; C

= 80 pF

d(edge)

delay between falling edge
on pins I/O1, I/O2, I/O1uC,
I/O2uC and width of active
pull-up pulse

500

650

LOW-level input voltage

0.3

+0.8

HIGH-level input voltage

1.5

LOW-level input current on
pin I/O

= 0

600

LIH

HIGH-level input leakage
current on pin I/O

= V

i(r)

, t

i(f)

input transition times

from V

IL(max)

to V

IH(min)

1.5

o(r)

, t

o(f)

output transition times

< 80 pF; no DC load;

10% to 90% from 0 to
V

CC1

and V

CC2

0.1

input capacitance on
pins I/O1 and I/O2

pu(int)

internal pull-up resistance
between pin I/O and V

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

2001 Aug 15

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

max

maximum frequency on
pins I/O1 and I/O2

500

kHz

Data lines (pins I/O1uC and I/O2uC); note 3

LOW-level output voltage

= 1 mA

0.4

HIGH-level output voltage

no DC load

0.9V

DDI

+ 0.2

0.75V

DDI

+ 0.2

LOW-level input voltage

0.3

0.25V

DDI

HIGH-level input voltage

0.7V

DDI

+ 0.3

LOW-level input current

= 0

600

LIH

HIGH-level input leakage
current

= V

DDI

i(r)

, t

i(f)

input transition times

from V

IL(max)

to V

IH(min)

o(r)

, t

o(f)

output transition times

< 30 pF; 10% to 90% from

0 to V

DDI

0.1

pu(int)

internal pull-up resistance

between I/O1uC, I/O2uC and V

DDI

Timing

act

activation sequence duration

135

deactivation sequence
duration

110

Protections and limitations

CC(sd)

shutdown and limitation
current at V

CC1

and V

CC2

I/O(lim)

limitation current on
pins I/O1 and I/O2

+15

CLK(lim)

limitation current on
pins CLK1 and CLK2

+70

RST(sd)

shutdown and limitation
current on pins RST1
and RST2

+20

j(sd)

shutdown die temperature

150

Card presence inputs (pins PRES1 and PRES2)

LOW-level input voltage

0.3V

HIGH-level input voltage

0.7V

LIL

LOW-level input leakage
current

= 0

LIH

HIGH-level input leakage
current

= V

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

2001 Aug 15

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

Notes

1. Two ceramic multilayer capacitors of minimum 100 nF with low ESR should be used in order to meet these

specifications.

2. Pin I/O1 has an internal 15 k

pull-up resistor to V

CC1

and pin I/O2 has an internal 15 k

pull-up resistor to V

CC2

3. Pins I/O1uC and I/O2uC have an internal 22 k

pull-up resistor to V

DDI

Clock inputs (pins CLKIN1 and CLKIN2)

ext

external frequency applied
on CLKIN1 and CLKIN2

MHz

LOW-level input voltage

0.25V

DDI

HIGH-level input voltage

0.7V

DDI

+ 0.3

i(r)

, t

i(f)

input transition times

100

Logic inputs (pins SAD0 and SAD1)

LOW-level input voltage

0.3

0.25V

DDI

HIGH-level input voltage

0.7V

DDI

+ 0.3

LIL

LOW-level input leakage
current

LIH

HIGH-level input leakage
current

input capacitance

Interrupt line (pin IRQ; open-drain; active LOW output)

LOW-level output voltage

= 2 mA

0.3

HIGH-level leakage current

Serial data input/output (pin SDA; open-drain)

LOW-level input voltage

0.3

0.25V

DDI

HIGH-level input voltage

0.7V

DDI

+ 0.3

HIGH-level leakage current

LOW-level input current

depends on the pull-up resistance

LOW-level output voltage

= 3 mA

0.3

Serial clock input (pin SCL; open-drain)

LOW-level input voltage

0.3

0.25V

DDI

HIGH-level input voltage

0.7V

DDI

+ 0.3

HIGH-level leakage current

LOW-level input current

depends on the pull-up resistance

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

2001

Aug

Philips Semiconductors

Product specification

Dual smar

t card interf

ace

TD
A8020HL

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APPLICA

TION INFORMA

TION

ndbook, full pagewidth

220

1.5 to
6.5 k

1 k

MICROCONTROLLER

100 k

0 k

100

CARD_READ_LM01

CARD 2

3.3 V

1.5 V

1.5 to

6.5 V

1.5 V

3.3 V

(16 V)

100 nF

(16 V)

100 nF

(16 V)

100 nF

220 nF

22 nF

220

220 nF

10 pF

100 nF

33 pF

14.745 MHz

33 pF

P0_0

VCC

P0_1

P0_2

P0_3

P0_4

P0_5

P0_6

P0_7

ALE

PSEN

P2_7

P2_6

P2_5

P2_4

P2_3

P2_2

P2_1

P2_0

P1_0

P1_1

P1_2

P1_3

P1_4

P1_5

P1_6

P1_7

RST

P3_0

P3_1

P3_2

P3_3

P3_4

P3_5

P3_6

P3_7

XTAL2

XTAL1

VSS

C4
C3
C2
C1
C5I
C6I
C7I
C8I

C8
C7
C6
C5

C1I
C2I
C3I
C4I

K1
K2

TDA8020HL

FCE838

PRES1

CGND1

CLK1

VCC1

RST1

I/O2

PRES2

CGND2

SAD1

CLK2

CC2

RST2

GND

SAP

SBP

DDA

SAD0

SDA

SCL

VDD

SAM

AGND

SBM

IRQ

CLKIN1

I
/
O1uC

I
/
O2uC

CLKIN2

DEL

DDI

I/O

100 k

0 k

100

CARD_READ_LM01

CARD 1

3.3 V

C4
C3
C2
C1
C5I
C6I
C7I
C8I

C8
C7
C6
C5

C1I
C2I
C3I
C4I

K1
K2

Fig.6 Application diagram.

2001 Aug 15

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

PACKAGE OUTLINE

UNIT

max.

(1)

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC

JEDEC

EIAJ

1.60

0.20
0.05

1.45
1.35

0.25

0.4
0.3

0.18
0.12

7.1
6.9

0.8

9.15
8.85

0.9
0.5

7
0

0.25

0.1

1.0

0.2

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

0.75
0.45

SOT358 -1

136E03

MS-026

99-12-27
00-01-19

(1)

7.1
6.9

9.15
8.85

0.9
0.5

detail X

(A )

Z D

Z E

pin 1 index

2.5

5 mm

scale

LQFP32: plastic low profile quad flat package; 32 leads; body 7 x 7 x 1.4 mm

SOT358-1

2001 Aug 15

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

SOLDERING

Introduction to soldering surface mount packages

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

"Data Handbook IC26; Integrated Circuit Packages"

(document order number 9398 652 90011).

There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is
recommended.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.

Typical reflow peak temperatures range from
215 to 250

C. The top-surface temperature of the

packages should preferable be kept below 220

C for

thick/large packages, and below 235

C for small/thin

packages.

Wave soldering

Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimal results:

Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

For packages with leads on two sides and a pitch (e):

larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

For packages with leads on four sides, the footprint must
be placed at a 45

angle to the transport direction of the

printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320

2001 Aug 15

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

Suitability of surface mount IC packages for wave and reflow soldering methods

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum

temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

"Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods".

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink

(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

3. If wave soldering is considered, then the package must be placed at a 45

angle to the solder wave direction.

The package footprint must incorporate solder thieves downstream and at the side corners.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;

it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is

definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

DATA SHEET STATUS

Notes

1. Please consult the most recently issued data sheet before initiating or completing a design.

2. The product status of the device(s) described in this data sheet may have changed since this data sheet was

published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

PACKAGE

SOLDERING METHOD

WAVE

REFLOW

(1)

BGA, HBGA, LFBGA, SQFP, TFBGA

not suitable

suitable

HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, SMS

not suitable

(2)

suitable

PLCC

(3)

, SO, SOJ

suitable

LQFP, QFP, TQFP

not recommended

(3)(4)

suitable

SSOP, TSSOP, VSO

not recommended

(5)

suitable

DATA SHEET STATUS

(1)

PRODUCT

STATUS

(2)

DEFINITIONS

Objective data

Development

This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.

Preliminary data

Qualification

This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.

Product data

Production

This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.

2001 Aug 15

Philips Semiconductors

Product specification

Dual smart card interface

TDA8020HL

DEFINITIONS

Short-form specification

The data in a short-form

specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.

Limiting values definition

Limiting values given are in

accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.

Application information

Applications that are

described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.

DISCLAIMERS

Life support applications

These products are not

designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.

Right to make changes

Philips Semiconductors

reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.

PURCHASE OF PHILIPS I

C COMPONENTS

Purchase of Philips I

C components conveys a license under the Philips' I

C patent to use the

components in the I

C system provided the system conforms to the I

C specification defined by

Philips. This specification can be ordered using the code 9398 393 40011.

SCA73

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Philips Semiconductors a worldwide company

Contact information

For additional information please visit http://www.semiconductors.philips.com.

Fax: +31 40 27 24825

For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.

Printed in The Netherlands

753504/02/pp

Date of release:

2001 Aug 15

Document order number:

9397 750 08605

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA8020

Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA8020

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA8020