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Электронный компонент: TDA8361/N5

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DATA SHEET
Objective specification
File under Integrated Circuits, IC02
March 1994
INTEGRATED CIRCUITS
Philips Semiconductors
TDA8360; TDA8361; TDA8362
Integrated PAL and PAL/NTSC TV
processors
March 1994
2
Philips Semiconductors
Objective specification
Integrated PAL and PAL/NTSC TV
processors
TDA8360; TDA8361; TDA8362
FEATURES
Available in TDA8360, TDA8361
and TDA8362
Vision IF amplifier with high
sensitivity and good differential
gain and phase
Multistandard FM sound
demodulator (4.5 MHz to 6.5 MHz)
Integrated chrominance trap and
bandpass filters (automatically
calibrated)
Integrated luminance delay line
RGB control circuit with linear RGB
inputs and fast blanking
Horizontal synchronization with two
control loops and alignment-free
horizontal oscillator without
external components
Vertical count-down circuit
(50/60 Hz) and vertical preamplifier
Low dissipation (700 mW)
Small amount of peripheral
components compared with
competition ICs
Only one adjustment (vision IF
demodulator)
The supply voltage for the ICs is
8 V. They are mounted in a shrink
DIL envelope with 52 pins and are
pin compatible.
Additional features
TDA8360
Alignment-free PAL colour decoder
for all PAL standards, including
PAL-N and PAL-M.
TDA8361
PAL/NTSC colour decoder with
automatic search system
Source selection for external
audio/video (A/V) inputs (separate
Y/C signals can also be applied).
TDA8362
Multistandard vision IF circuit
(positive and negative modulation)
PAL/NTSC colour decoder with
automatic search system
Source selection for external
A/V inputs (separate Y/C signals
can also be applied)
Easy interfacing with the TDA8395
(SECAM decoder) for
multistandard applications.
GENERAL DESCRIPTION
The TDA8360, TDA8361 and
TDA8362 are single-chip TV
processors which contain nearly all
small signal functions that are
required for a colour television
receiver. For a complete receiver the
following circuits need to be added:
a base-band delay line (TDA4661),
a tuner and output stages for audio,
video and horizontal and vertical
deflection.
Because of the different functional
contents of the ICs the set maker can
make the optimum choice depending
on the requirements for the receiver.
The TDA8360 is intended for simple
PAL receivers (all PAL standards,
including PAL-N and PAL-M are
possible).
The TDA8361 contains a PAL/NTSC
decoder and has an A/V switch.
For real multistandard applications
the TDA8362 is available. In addition
to the extra functions which are
available in the TDA8361, the
TDA8362 can handle signals with
positive modulation and it supplies
the signals which are required for the
SECAM decoder TDA8395.
ORDERING INFORMATION
EXTENDED TYPE
NUMBER
PACKAGE
PINS
PIN POSITION
MATERIAL
CODE
TDA8360
52
shrink DIL
plastic
SOT247AG
TDA8361
52
shrink DIL
plastic
SOT247AG
TDA8362
52
shrink DIL
plastic
SOT247AG
March 1994
3
Philips Semiconductors
Objective specification
Integrated PAL and PAL/NTSC TV
processors
TDA8360; TDA8361; TDA8362
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
P
supply voltage
7.2
8.0
8.8
V
I
P
supply current
-
80
-
mA
Input voltages
V
45,46(rms)
video IF amplifier sensitivity (RMS value)
-
70
100
V
V
5(rms)
sound IF amplifier sensitivity (RMS value)
-
1
-
mV
V
6(rms)
external audio input (RMS value)
TDA8361, TDA8362
-
350
-
mV
V
15(p-p)
external CVBS input (peak-to-peak value)
TDA8361, TDA8362
-
1
-
V
V
22,23,24(p
-
p)
RGB inputs (peak-to-peak value)
-
0.7
-
V
Output signals
V
O(p-p)
demodulated CVBS output
(peak-to-peak value)
-
2.4
-
V
I
47
tuner AGC control current
0
-
5
mA
V
44
AFC output voltage swing
-
6
-
V
V
50(rms)
audio output voltage (RMS value)
-
700
-
mV
V
18,19,20(p-p)
RGB output signal amplitudes
(peak-to-peak value)
-
4
-
V
I
37
horizontal output current
10
-
-
mA
I
43
vertical output current
1
-
-
mA
Control voltages
V
control
control voltages for Volume, Contrast,
Saturation, Brightness, Hue and Peaking
0
-
5
V
March 1994
4
Philips Semiconductors
Objective specification
Integrated PAL and PAL/NTSC TV
processors
TDA8360; TDA8361; TDA8362
MLA621 - 1
LUMINANCE
MATRIX
PWL
OUTPUT
STAGES
CLAMP
SWITCH
CLAMPS
SET
DEMODULATOR
PHASE
DETECTOR
MATRIX
PAL
IDENTIFICATION
COLOUR
KILLERS
XTAL
OSCILLATOR
CHROMINANCE
BANDPASS
Y DELAY
PEAKING
ACC
AMPLIFIER
TUNING
PHASE 2
TRAP AND
BYPASS
POWER
RESET
H AND V
SEPARATION
LINE
OSCILLATOR
PHASE 1
NOISE
DETECTOR
TUNING
VERTICAL
DIVIDER
VERTICAL
OUTPUT
PREAMPLIFIER
MUTE
SUPPLY
AFC AND
SAMPLE-
AND-HOLD
AGC
VOLUME
TEST
VIDEO
AMPLIFIER
DEMODULATOR
IF
AMPLIFIER
18
19
20
17
28
29
22
23
24
30
31
13
14
25
26
21
39
38
37
34
35
43
41
42
40
4
47
48
44
45
46
49
2
3
7
50
51
5
11
91
0
5
2
12
TDA8360
33
DET
to
TDA4661
from
TDA4661
RIN
GIN
BIN
BOUT
GOUT
ROUT
CON
SAT
RGBIN
BRI
PEAKIN
DEC
FT
GND2
GND1
V
P
PLL
LIMITER
8
DEC
DIG
CVBS
INT
IFDEM1
IFDEM2
IFIN1
IFIN2
TUNE
ADJ
IDENT
AGCOUT
DEC
AGC
AFCOUT
VOUT
VFB
VRAMP
PH1LF
PH2LF
FBI/SCO
HOUT
XTAL1
XTAL2
AUDEEM
DEC
BG
SOIF
R-Y output
B-Y output
B-Y input
R-Y input
DEC
DEM
1
AUOUT
COINCIDENCE
DETECTOR
IFOUT
36
VSTART
flyback
sandcastle
VIDEO
IDENTIFICATION
volume
control
Fig.1 Block diagram for TDA8360.
March 1994
5
Philips Semiconductors
Objective specification
Integrated PAL and PAL/NTSC TV
processors
TDA8360; TDA8361; TDA8362
MLA622 - 1
LUMINANCE
MATRIX
PWL
OUTPUT
STAGES
CLAMP
SWITCH
CLAMPS
SET
DEMODULATOR
PHASE
DETECTOR
MATRIX
SYSTEM
MANAGER
COLOUR
KILLERS
XTAL
OSCILLATOR
CHROMINANCE
BANDPASS
Y DELAY
PEAKING
ACC
AMPLIFIER
TUNING
PHASE 2
TRAP AND
BYPASS
POWER
RESET
H AND V
SEPARATION
LINE
OSCILLATOR
PHASE 1
NOISE
DETECTOR
TUNING
VERTICAL
DIVIDER
VERTICAL
OUTPUT
PREAMPLIFIER
MUTE
SUPPLY
AFC AND
SAMPLE-
AND-HOLD
AGC
VOLUME
TEST
VIDEO
AMPLIFIER
DEMODULATOR
IF
AMPLIFIER
18
19
20
17
28
29
22
23
24
30
31
13
16
25
26
21
36
39
38
37
34
35
43
41
42
40
4
47
48
44
45
46
49
2
3
7
50
51
5
11
91
0
5
2
12
TDA8361
33
DET
to
TDA4661
from
TDA4661
RIN
GIN
BIN
BOUT
GOUT
ROUT
CON
SAT
RGBIN
BRI
PEAKIN
DEC
FT
GND2
GND1
V
P
PLL
LIMITER
8
DEC
DIG
CVBS
INT
IFDEM1
IFDEM2
IFIN1
IFIN2
TUNE
ADJ
IDENT
AGCOUT
DEC
AGC
AFCOUT
VOUT
VFB
VRAMP
PH1LF
VSTART
PH2LF
FBI/SCO
HOUT
XTAL1
XTAL2
AUDEEM
DEC
BG
SOIF
R-Y output
B-Y output
B-Y input
R-Y input
DEC
DEM
1
AUOUT
COINCIDENCE
DETECTOR
IFOUT
HUE
CONTROL
HUE
27
CHROMINANCE
SWITCH
LUMINANCE
SWITCH
15
CVBS
EXT
CHROMA
EXTAU
6
14
VIDEO
IDENTIFICATION
volume
control
flayback
sandcastle
Fig.2 Block diagram for TDA8361.