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Электронный компонент: TDA8501T

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DATA SHEET
Preliminary specification
File under Integrated Circuits, IC02
April 1993
INTEGRATED CIRCUITS
TDA8501
PAL/NTSC encoder
April 1993
2
Philips Semiconductors
Preliminary specification
PAL/NTSC encoder
TDA8501
FEATURES
Two input stages: R, G, B and
-
(R
-
Y),
-
(B
-
Y), Y with
multiplexing
Chrominance processing, highly integrated, includes
low frequency filters for the colour difference signals,
and after the modulator a bandpass filter
Fully controlled modulator produces a signal according
to the PAL or NTSC standard without adjustments
A free running oscillator. Can be tuned by crystal or by
an external frequency source
Output stages with separated Y + SYNC and
chrominance (Y + C, SVHS), and a CVBS output. Signal
amplitudes are correct for 75
driving via an external
emitter follower. Internal generation of NTSC setup
Sync separator circuit and pulse shaper, to generate the
required pulses for the processing, clamping, blanking,
FH/2, and burst pulse
H/2 control pin. In PAL mode the internally generated
H/2 is connected to this pin and the phase of this signal
can be reset
Internal bandgap reference.
GENERAL DESCRIPTION
The TDA8501 is a highly integrated PAL/NTSC encoder IC
which is designed for use in all applications where R, G
and B or Y, U and V signals require transformation to PAL
or NTSC values.The specification of the input signals are
fully compatible with the specification of those of the
TDA8505 SECAM-encoder.
ORDERING INFORMATION
Note
1. SOT234-1; 1996 December 2.
2. SOT137-1; 1996 December 2.
EXTENDED TYPE
NUMBER
PACKAGE
PINS
PIN POSITION
MATERIAL
CODE
TDA8501
24
DIL
plastic
SOT234AH2
(1)
TDA8501T
24
SO
plastic
SOT137AH1
(2)
April 1993
3
Philips Semiconductors
Preliminary specification
PAL/NTSC encoder
TDA8501
Fig.1 Block diagram.
April 1993
4
Philips Semiconductors
Preliminary specification
PAL/NTSC encoder
TDA8501
Fig.2 Pin configuration.
PINNING
U and V respectively, are the terms used to describe the colour difference signals at the output of the matrix.
SYMBOL
PIN
DESCRIPTION
-
(R
-
Y)
1
colour difference input signal, for EBU bar (75%) 1.05 V (p-p)
MCONTROL
2
multiplexer switch control input; HIGH = RGB, LOW =
-
(R
-
Y),
-
(B
-
Y), Y
-
(B
-
Y)
3
colour difference input signal, for EBU bar (75%) 1.33 V (p-p)
H/2
4
line pulse input/output divided-by-2 for synchronizing the internal H/2, if not used, this pin
dependent on mode selected, is either left open-circuit, or connected to V
CC
or to ground
(note 1)
Y
5
luminance input signal 1 V nominal without sync
U OFFSET
6
U modulator offset control capacitor
R
7
RED input signal for EBU bar of 75% 0.7 V (p-p)
V
CC
8
supply voltage; 5 V nominal
G
9
GREEN input signal for EBU bar of 75% 0.7 V (p-p)
V
SS
10
ground (0 V)
B
11
BLUE input signal for EBU bar of 75% 0.7 V (p-p)
V OFFSET
12
V modulator offset control capacitor
V
REF
13
2.5 V internal reference voltage output
CHROMA
14
chrominance output
FLT
15
filter tuning loop capacitor
CVBS
16
composite PAL or NTSC output, 2 V (p-p) nominal
April 1993
5
Philips Semiconductors
Preliminary specification
PAL/NTSC encoder
TDA8501
Notes
1. Pin 4: in PAL mode, if not connected to external H2 pulse, this pin is the output for the internally generated H/2 signal.
Pin 4: in NTSC mode, for internal set-up this pin is connected to ground; when internal set-up is switched off, this pin
is connected to V
CC
.
2. The listed voltages connected to pin 17 (if V
CC
= + 5 V) enable the following Y (via pin 5) input signal states:
0 V = PAL mode; at pin 5, Y without sync and input blanking on
5 V = NTSC mode; at pin 5, Y without sync and input blanking on
1.8 V = PAL mode; at pin 5, Y with sync and input blanking off
3.2 V = NTSC mode; at pin 5, Y with sync and input blanking off
PAL/NTSC and
Y/Y
+
SYNC
17
four level control pin (note 2)
NOTCH
18
Y +SYNC output via an internal resistor of 2 k
; a notch filter can be connected to this pin
Y +SYNC OUT
19
2 V (p-p) nominal Y +SYNC output
Y +SYNC IN
20
Y +SYNC input; (from pin 22) connected to the output of the external delay line
BURST ADJ
21
burst current adjustment via external resistor
Y +SYNC OUT
22
Y +SYNC output 1 V (p-p) nominal, connected to the input of the external delay line
OSC
23
oscillator tuning: connected to either a crystal in series with capacitor to ground, or to an
external frequency source via a resistor in series with a capacitor
CS
24
composite sync input, 0.3 V (p-p) nominal
SYMBOL
PIN
DESCRIPTION