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Электронный компонент: TZA3000

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DATA SHEET
Objective specification
File under Integrated Circuits, IC19
1997 Oct 17
INTEGRATED CIRCUITS
TZA3000
SDH/SONET STM4/OC12 optical
receiver
1997 Oct 17
2
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
FEATURES
Low equivalent input noise, typically 3.5 pA/
Hz
Wide dynamic range, typically 1
A to 1.5 mA
On-chip low-pass filter. The bandwidth can be varied
between 370 and 600 MHz using an external resistor.
Default value is 470 MHz.
Differential transimpedance of 1.8 M
On-chip AGC (Automatic Gain Control)
PECL (Positive Emitter-Coupled Logic) or CML
(Current-Mode Logic) compatible data outputs
LOS (Loss-Of-Signal) detection
LOS threshold level can be adjusted using a single
external resistor
On-chip DC offset compensation
Single supply voltage from 3.0 to 5.5 V
Bias voltage for PIN diode.
APPLICATIONS
Digital fibre optic receiver in short, medium and long
haul optical telecommunications transmission systems
or in high speed data networks
Wideband RF gain block.
DESCRIPTION
The TZA3000 optical receiver is a low-noise
transimpedance amplifier with AGC plus a limiting
amplifier designed to be used in SDH/SONET fibre optic
links. The TZA3000 amplifies the current generated by a
photo detector (PIN diode or avalanche photodiode) and
converts it to a differential output voltage.
ORDERING INFORMATION
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
TZA3000HL
LQFP32
plastic low profile quad flat package; 32 leads; body 5
5
1.4 mm
SOT401-1
TZA3000U
naked die
die in waffle pack carriers; die dimensions 1.58
1.58 mm
-
1997 Oct 17
3
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
BLOCK DIAGRAM
Fig.1 Block diagram.
handbook, full pagewidth
MGK881
GAIN-
CONTROL
TESTING
BIASING
2
2
A1
A2
4
2, 5
17, 20
31
DREF
2
k
7
IPhoto
PREAMPLIFIER
LOS DETECTION
LIMITING
AMPLIFIER
DC-OFFSET
COMPENSATION
VCCA
VCCD
5
13, 16, 21
24, 25
DGND
7
1, 3, 6, 8
9, 30, 32
AGND
14
RFTEST
11
Vref
10
BWC
AGC
peak detector
TZA3000
CML
PECL
TTL
29
LOSTH
26
LOS
28
LOSTTL
18
OUTCML
19
OUTQCML
15
OUTSEL
22
OUTPECL
23
OUTQPECL
27
LOSQ
PECL
1997 Oct 17
4
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
PINNING
SYMBOL
PIN
TYPE
DESCRIPTION
AGND
1
ground
analog ground
V
CCA
2
supply
analog supply voltage
AGND
3
ground
analog ground
DREF
4
analog output bias voltage for PIN diode (V
CCA
); cathode should be connected to this pin
V
CCA
5
supply
analog supply voltage
AGND
6
ground
analog ground
IPhoto
7
analog input
current input; connect the anode of PIN diode to this pin; DC bias level is
800 mV, one diode voltage above ground
AGND
8
ground
analog ground
AGND
9
ground
analog ground
BWC
10
analog input
bandwidth control pin; default bandwidth is 470 MHz; a resistor should be
connected between V
ref
(pin 11) and BWC (pin 10) to decrease bandwidth, or
between BWC (pin 10) and AGND to increase bandwidth
V
ref
11
analog output band gap reference voltage; nominal value approximately 1.2 V
SUB
12
substrate
substrate pin; to be connected to AGND
DGND
13
ground
digital ground
RFTEST
14
analog input
test pin; not used in application; not connected
OUTSEL
15
CMOS input
output select pin; when OUTSEL is HIGH, CML data outputs are active and
PECL data outputs are disabled; OUTSEL is pulled LOW if left unconnected,
PECL data outputs will then be active and CML data outputs disabled
DGND
16
ground
digital ground
V
CCD
17
supply
digital supply voltage
OUTCML
18
CML output
CML data output; OUTCML goes HIGH when current flows into IPhoto (pin 7)
OUTQCML
19
CML output
CML compliment of OUTCML (pin 18)
V
CCD
20
supply
digital supply voltage
DGND
21
ground
digital ground
OUTPECL
22
PECL output
PECL data output; OUTPECL goes HIGH when current flows into IPhoto (pin 7)
OUTQPECL
23
PECL output
PECL compliment of OUTPECL (pin 22)
DGND
24
ground
digital ground
DGND
25
ground
digital ground
LOS
26
PECL output
PECL-compatible LOS detection pin; LOS output is HIGH when the input signal
is below the user programmable threshold level
LOSQ
27
PECL output
PECL compliment of LOS
LOSTTL
28
TTL output
CMOS-compatible LOS detection pin; the LOSTTL output is HIGH when the
input signal is below the user programmable threshold level
LOSTH
29
analog I/O
pin for setting input threshold level; nominal DC voltage is V
CCA
-
1.5 V;
threshold level set by connecting an external resistor between LOSTH and
V
CCA
or by forcing a current into LOSTH; default value for this resistor is 86 k
AGND
30
ground
analog ground
AGC
31
analog I/O
AGC monitor voltage; the internal AGC circuit can be disabled by applying an
external voltage to this pin
AGND
32
ground
analog ground
1997 Oct 17
5
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
Fig.2 Pin configuration.
handbook, full pagewidth
TZA3000HL
MGK880
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
AGND
VCCA
AGND
DREF
VCCA
AGND
IPhoto
AGND
DGND
LOS
LOSQ
LOSTTL
LOSTH
AGND
AGC
AGND
VCCD
OUTCML
VCCD
DGND
OUTPECL
DGND
OUTQPECL
OUTQCML
AGND
BWC
V
ref
SUB
RFTEST
OUTSEL
DGND
DGND
1997 Oct 17
6
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
CHIP DIMENSIONS AND BONDING PAD LOCATIONS
SYMBOL
PAD
COORDINATES
(1)
x
y
AGND
1
102
1251
V
CCA
2
102
1111
AGND
3
102
971
DREF
4
102
814
V
CCA
5
102
674
AGND
6
102
534
IPhoto
7
102
395
AGND
8
102
254
AGND
9
243
105
BWC
10
383
105
V
ref
11
523
105
SUB
12
663
105
DGND
13
803
105
RFTEST
14
943
105
OUTSEL
15
1100
105
DGND
16
1257
105
V
CCD
17
1398
263
OUTCML
18
1398
403
Note
1. All coordinates are referenced, in
m, to the bottom
left-hand corner of the die.
OUTQCML
19
1398
543
V
CCD
20
1398
683
DGND
21
1398
823
OUTPECL
22
1398
963
OUTQPECL
23
1398
1103
DGND
24
1398
1243
DGND
25
1283
1400
LOS
26
1143
1400
LOSQ
27
986
1400
LOSTTL
28
829
1400
LOSTH
29
671
1400
AGND
30
514
1400
AGC
31
357
1400
AGND
32
217
1400
SYMBOL
PAD
COORDINATES
(1)
x
y
Fig.3 Bonding pad locations: TZA3000U.
handbook, full pagewidth
AGND
1
DGND
24
OUTQPECL
23
OUTPECL
22
DGND
21
VCCD
20
OUTQCML
19
OUTCML
18
VCCD
17
AGND
3
DREF
4
VCCA
5
AGND
6
IPhoto
7
AGND
8
VCCA
2
TZA3000U
9
AGND
32
AGND
31
AGC
30
AGND
29
LOSTH
28
LOSTTL
27
LOSQ
26
LOS
25
DGND
10
BWC
11
V
ref
12
SUB
13
DGND
14
RFTEST
15
OUTSEL
16
DGND
MGK882
y
1.58 mm
x
0
0
1.58
mm
1997 Oct 17
7
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
FUNCTIONAL DESCRIPTION
The TZA3000 contains five functional blocks:
Preamplifier input stage
Low-pass filter
Limiting amplifier stage
Offset compensation loop
Loss-of-signal detection unit.
Preamplifier
The preamplifier provides low-noise amplification of the
current generated by a photodiode connected to the
IPhoto pin.
A differential amplifier converts the output of the
preamplifier to a differential voltage. An AGC loop
increases the dynamic range of the receiver by reducing
the feedback resistance of the preamplifier. The AGC loop
hold capacitor is integrated on-chip, so an external
capacitor is not needed for AGC. The AGC voltage can be
monitored at pin 31. This pin can be left unconnected for
normal operation. It can also be used to force an external
AGC voltage. If pin 31 (AGC) is connected to AGND, the
internal AGC loop is disabled and the receiver gain is at a
maximum. In this case, the maximum input current is about
50
A.
Low-pass filter
A low-pass filter controls the bandwidth of the receiver,
which can be varied between 300 and 600 MHz.
The bandwidth is set to 470 MHz by default. It can be
decreased by connecting a resistor between BWC (pin 10)
and V
ref
(pin 11) or increased by connecting a resistor
between BWC and AGND.
Limiting amplifier
A limiting amplifier boosts the signal up to PECL levels.
The output can be either CML or PECL compatible,
selected by means of pin OUTSEL. When OUTSEL is
HIGH, CML data outputs are active and PECL data
outputs are disabled. If OUTSEL is left unconnected, it is
pulled LOW and PECL data outputs are active while CML
data outputs are disabled.
Offset cancellation loop
A control loop connected between the limiting amplifier
output and the differential amplifier input cancels the DC
offset. The loop bandwidth is fixed internally at 30 kHz.
Loss-of-signal detection (LOS)
The LOS section detects an input signal level below a fixed
threshold. The threshold is determined by the current
through pin LOSTH. If this current is increased, the
threshold level will rise. An external resistor between
LOSTH and V
CCA
can be used, or a current can be forced
into LOSTH. The default value for the external resistor is
86 k
. In this case, the current through LOSTH will be
approximately 17.4
A since the voltage at pin LOSTH is
regulated at 1.5 V below the supply voltage. This threshold
corresponds to an input current of 0.96
A. The ratio of
LOSTH current to input current is thus approximately
18 : 1. When the input signal level falls below this
threshold, the LOS (PECL compatible) and LOSTTL (TTL
compatible) outputs go HIGH. The hysteresis is fixed
internally at 3 dB. Response time is typically less than
20
s.
1997 Oct 17
8
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
V
CC
supply voltage
-
0.5
+6
V
V
n
DC voltage
pin 7: IPhoto
-
0.5
+1
V
pin 14: RFTEST
-
0.5
V
CC
+ 0.5
V
pins 22, 23, 26 and 27: OUTPECL, OUTQPECL, LOS and LOSQ
V
CC
-
2
V
CC
+ 0.5
V
pins 18 and 19: OUTCML and OUTQCML
V
CC
-
2
V
CC
+ 0.5
V
pin 29: LOSTH
-
0.5
V
CC
+ 0.5
V
pin 10: BWC
-
0.5
+3.2
V
pin 31: AGC
-
0.5
V
CC
+ 0.5
V
pin 11: V
ref
-
0.5
+3.2
V
pin 4: DREF
-
0.5
V
CC
+ 0.5
V
pin 15: OUTSEL
-
0.5
V
CC
+ 0.5
V
pin 28: LOSTTL
-
0.5
V
CC
+ 0.5
V
I
n
DC current
pin 7: IPhoto
-
1
+2.5
mA
pin 14: RFTEST
-
2
+2
mA
pins 22, 23, 26 and 27: OUTPECL, OUTQPECL, LOS and LOSQ
-
25
+10
mA
pins 18,19: OUTCML and OUTQCML
-
15
+15
mA
pin 29: LOSTH
-
2
+2
mA
pin 10: BWC
-
1
+1
mA
pin 31: AGC
-
0.2
+0.2
mA
pin 11: V
ref
-
2
+2.5
mA
pin 4: DREF
-
2.5
+2.5
mA
pin 15: OUTSEL
-
0.5
+0.5
mA
pin 28: LOSTTL
-
16
+16
mA
P
tot
total power dissipation
-
600
mW
T
stg
storage temperature
-
65
+150
C
T
j
junction temperature
-
150
C
T
amb
ambient temperature
-
40
+85
C
SYMBOL
PARAMETER
VALUE
UNIT
R
th(j-s)
thermal resistance from junction to solder point
tbf
K/W
R
th(j-a)
thermal resistance from junction to ambient
tbf
K/W
1997 Oct 17
9
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
CHARACTERISTICS
For typical values T
amb
= 25
C and V
CC
= 5 V; minimum and maximum values are valid over the entire ambient
temperature range and process spread.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
CC
supply voltage
3
5
5.5
V
I
CCD
digital supply current
note 1
13
20
28
mA
note 2
-
47
-
mA
note 3
11
17
24
mA
I
CCA
analog supply current
24
36
51
mA
P
tot
total power dissipation
-
-
525
mW
T
j
junction temperature
-
40
-
+110
C
T
amb
ambient temperature
-
40
+25
+85
C
R
tr
small-signal transresistance
of the receiver
measured differentially at
PECL outputs
-
1800
-
k
measured differentially at
CML outputs
-
1100
-
k
f
-
3dB(h)
high frequency
-
3dB point
pin BWC left
unconnected; note 4
-
470
-
MHz
f
-
3dB(l)
low frequency
-
3dB point
20
30
40
kHz
I
i(IPhoto)(p-p)
input current on pin IPhoto
(peak-to-peak value)
V
CC
= 5 V
-
400
+4
+1500
A
V
CC
= 3.3 V
-
400
+4
+500
A
V
bias(IPhoto)
input bias voltage on pin
IPhoto
720
800
970
mV
I
n(tot)
total integrated RMS noise
current over bandwidth
(referenced to input)
C
i
= 1.2 pF; note 5
f = 311 MHz
-
55
-
nA
f = 450 MHz
-
80
-
nA
f = 622 MHz
-
120
-
nA
PSRR
power supply rejection ratio
at V
CC
measured differentially;
note 6
f = 100 kHz to 10 MHz
-
1
2
A/V
f = 10 MHz to 100 MHz
-
2
5
A/V
f = 100 MHz to 1 GHz
-
5
100
A/V
R
tr
/
t
AGC loop constant
-
1
-
dB/ms
PECL outputs: OUTPECL and OUTQPECL
V
OL
LOW-level output voltage
50
to V
CC
-
2 V
V
CC
-
1100
-
V
CC
-
900
mV
V
OH
HIGH-level output voltage
50
to V
CC
-
2 V
V
CC
-
1840
-
V
CC
-
1620 mV
V
OO
differential output offset
voltage
-
10
-
+10
mV
t
r
rise time
20% to 80%
-
200
300
ps
t
f
fall time
80% to 20%
-
140
250
ps
1997 Oct 17
10
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
Notes
1. OUTPECL, OUTQPECL, OUTCML, OUTQCML, LOS and LOSQ outputs are left unconnected. OUTPECL and
OUTQPECL outputs are active.
2. OUTPECL and OUTQPECL outputs are terminated with 50
to V
T
. V
T
is an external termination voltage for PECL
outputs and is 2 V below the supply voltage. OUTCML, OUTQCML, LOS and LOSQ outputs are left unconnected
3. OUTCML and OUTQCML outputs are terminated with 50
to V
CCD
; CML outputs are active. OUTPECL,
OUTQPECL, LOS and LOSQ outputs are left unconnected
4. The bandwidth is set to 470 MHz by default. It can be varied between 300 and 600 MHz by adjusting the voltage at
pin BWC.
5. All I
n(tot)
measurements were made with an input capacitance of C
i
= 1.2 pF. This was comprised of 0.7 pF for the
photodiode itself, with 0.3 pF allowed for the PCB layout and 0.2 pF intrinsic to the package.
6. PSRR is defined as the ratio of the equivalent current change at the input (
I
IPhoto
) to a change in supply voltage:
For example, a 1 mV disturbance on V
CC
at 10 MHz will typically generate the equivalent of 2 nA extra photodiode
current.
PECL outputs: LOS and LOSQ
V
OL
LOW-level output voltage
50
to V
CC
-
2 V
V
CC
-
1100
-
V
CC
-
900
mV
V
OH
HIGH-level output voltage
50
to V
CC
-
2 V
V
CC
-
1840
-
V
CC
-
1620 mV
V
OO
differential output offset
voltage
-
10
-
+10
mV
t
r
rise time
20% to 80%
-
-
600
ns
t
f
fall time
80% to 20%
-
-
200
ns
CML outputs: OUTCML and OUTQCML
V
O
single ended output voltage
50
to V
CC
V
CC
-
260
-
V
CC
mV
V
o(se)(p-p)
single-ended output voltage
(peak-to-peak value)
50
to V
CC
150
200
260
mV
V
OO
differential output offset
voltage
50
to V
CC
-
10
-
+10
mV
R
o
single ended output
resistance
80
100
120
t
r
rise time
20% to 80%;
50
, 1 pF load
-
92
-
ps
t
f
fall time
80% to 20%;
50
, 1 pF load
-
62
-
ps
CMOS input: OUTSEL
V
IL
LOW-level input voltage
-
0.4
0.8
V
V
IH
HIGH-level input voltage
V
CC
-
1
V
CC
-
0.5
-
V
CMOS output: LOSTTL
V
OL
LOW-level output voltage
0
-
0.2
V
V
OH
HIGH-level output voltage
V
CC
-
0.2
-
V
CC
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
PSRR
I
IPhoto
V
CC
--------------------
=
1997 Oct 17
11
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
APPLICATION INFORMATION
Fig.4 Application diagram: PECL data outputs active.
handbook, full pagewidth
1, 3, 6, 8
9, 30, 32
MGK883
4
17, 20
29
2, 5
VCCA
LOSTH
DREF
7
IPhoto
AGND
31
AGC
10
BWC
14
RFTEST
7
2
13, 16, 21
24, 25
DGND
5
15
OUTSEL
11
Vref
TZA3000
27
LOSQ
28
LOSTTL
23
OUTQPECL
22
OUTPECL
19
OUTQCML
18
OUTCML
26
LOS
R1
R1
R2
R2
Zo = 50
Zo = 50
86 k
22 nF
VCCD
2
22 nF
680 nF
10
H
10
H
VCC
Fig.5 Application diagram: CML data outputs active.
handbook, full pagewidth
1, 3, 6, 8
9, 30, 32
MGK884
4
17, 20
29
2, 5
VCCA
LOSTH
DREF
7
IPhoto
AGND
31
AGC
10
BWC
14
RFTEST
7
2
13, 16, 21
24, 25
DGND
5
15
OUTSEL
11
Vref
TZA3000
27
LOSQ
28
LOSTTL
23
OUTQPECL
22
OUTPECL
19
OUTQCML
18
OUTCML
26
LOS
Zo = 50
50
50
Zo = 50
86 k
22 nF
VCCD
2
22 nF
680 nF
10
H
10
H
VCC
1997 Oct 17
12
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
Fig.6 Logic level symbol definitions for CML and PECL.
handbook, full pagewidth
MGK885
VOO
VO(max)
VOQH
VOH
VOQL
VOL
VO(min)
Vo (p-p)
VCC
CML/PECL OUTPUT
Fig.7 Output circuits.
handbook, full pagewidth
MGK886
100
100
VCC
OUTCML
OUTQCML
105
105
VCC
OUTQPECL
OUTPECL
0.5 mA
9 mA
6 mA
0.5 mA
a. CML.
b. PECL.
1997 Oct 17
13
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
PECL outputs: OUTPECL (22), OUTQPECL (23), LOS (26) and LOSQ (27)
Fig.8 PECL termination schemes.
handbook, full pagewidth
VOQ
VO
VIQ
VI
R1 = 127
R2 = 82.5
R1 = 127
R2 = 82.5
GND
VCC = 3.3 V
VOQ
VO
VIQ
VI
R1 = 83.3
R2 = 125
R1 = 83.3
R2 = 125
GND
VCC = 5 V
MGK887
1997 Oct 17
14
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
CML outputs: OUTCML (18) and OUTQCML (19)
The output impedance of the CML output driver is 100
(see Figs 7 and 9), which doesn't match the characteristic
impedance of the strip line. While this means that the
reflections of some incident edges will arrive at the driver
output on the PCB, this value was selected to reduce
power dissipation inside the IC. The parallel combination
of 100
and 50
(33
)
will generate a signal swing of
200 mV peak-to-peak (single sided) with a tail current of
6 mA. If the output impedance was 50
rather than
100
, an 8 mA tail current would be needed to generate
the same voltage swing. This would increase power
dissipation by 33%.
If necessary, the output impedance of the generator can
be matched to the line impedance by connecting an
external 100
resistor in parallel with the output as shown
in Fig.10. The magnitude of the output voltage swing will
not change due to adaptive regulation. However, power
dissipation will increase by 33%.
Fig.9 CML interface circuit without matched impedance; low power dissipation.
handbook, full pagewidth
MGK888
VOQ
VO
VIQ
VI
100
100
50
50
VCC
VCC
Zo = 50
Zo = 50
generator
inside TZA3000
interconnect
PCB
receiver
inside TZA3004
Fig.10 CML interface circuit with matched impedance; higher power dissipation.
handbook, full pagewidth
MGK889
VOQ
VO
VIQ
VI
100
100
100
100
50
50
VCC
VCC
Zo = 50
Zo = 50
generator
inside TZA3000
interconnect
PCB
receiver
inside TZA3004
1997 Oct 17
15
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
PACKAGE OUTLINE
0.2
UNIT
A
max.
A
1
A
2
A
3
b
p
c
E
(1)
e
H
E
L
L
p
Z
y
w
v
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
EIAJ
mm
1.60
0.15
0.05
1.5
1.3
0.25
0.27
0.17
0.18
0.12
5.1
4.9
0.5
7.15
6.85
1.0
0.95
0.55
7
0
o
o
0.12
0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
0.75
0.45
SOT401-1
95-12-19
97-08-04
D
(1)
(1)
(1)
5.1
4.9
H
D
7.15
6.85
E
Z
0.95
0.55
D
b
p
e
E
B
8
D
H
b
p
E
H
v
M
B
D
ZD
A
Z E
e
v
M
A
X
1
32
25
24
17
16
9
A
1
A
L
p
detail X
L
(A )
3
A
2
y
w
M
w
M
0
2.5
5 mm
scale
LQFP32: plastic low profile quad flat package; 32 leads; body 5 x 5 x 1.4 mm
SOT401-1
c
pin 1 index
1997 Oct 17
16
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our
"IC Package Databook" (order code 9398 652 90011).
Reflow soldering
Reflow soldering techniques are suitable for all LQFP
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250
C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45
C.
Wave soldering
Wave soldering is not recommended for LQFP packages.
This is because of the likelihood of solder bridging due to
closely-spaced leads and the possibility of incomplete
solder penetration in multi-lead devices.
If wave soldering cannot be avoided, the following
conditions must be observed:
A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave)
soldering technique should be used.
The footprint must be at an angle of 45
to the board
direction and must incorporate solder thieves
downstream and at the side corners.
Even with these conditions, do not consider wave
soldering LQFP packages LQFP48 (SOT313-2),
LQFP64 (SOT314-2) or LQFP80 (SOT315-1).
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Maximum permissible solder temperature is 260
C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150
C within
6 seconds. Typical dwell time is 4 seconds at 250
C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Repairing soldered joints
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300
C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320
C.
1997 Oct 17
17
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
DEFINITIONS
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
1997 Oct 17
18
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
NOTES
1997 Oct 17
19
Philips Semiconductors
Objective specification
SDH/SONET STM4/OC12 optical receiver
TZA3000
NOTES
Internet: http://www.semiconductors.philips.com
Philips Semiconductors a worldwide company
Philips Electronics N.V. 1997
SCA55
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Printed in The Netherlands
427027/300/01/pp20
Date of release: 1997 Oct 17
Document order number:
9397 750 01679