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DATA SHEET
Preliminary specification
File under Integrated Circuits, IC01
1998 Aug 28
INTEGRATED CIRCUITS
UDA1335H
Universal Serial Bus (USB) Audio
Playback Recording Peripheral
(APRP)
1998 Aug 28
2
Philips Semiconductors
Preliminary specification
Universal Serial Bus (USB) Audio
Playback Recording Peripheral (APRP)
UDA1335H
FEATURES
General
USB stereo audio record and playback system with
20 bits analog-to-digital conversion (with 5 to 55 kHz
sample frequency range) and adaptive 20 bits
digital-to-analog conversion (with 5 to 55 kHz sample
frequency range) with integrated filtering
USB-compliant audio/HID device
Supports 12 Mbits/s `full speed' serial data transmission
Fully automatic `Plug-and-Play' operation
Supports multiple audio data formats (8, 16 and 24 bits)
5.0 and 3.3 V power supply
Low power consumption
Efficient power management
On-chip master clock oscillators, only an external crystal
is required
High linearity
Wide dynamic range
Superior signal-to-noise ratio
Low total harmonic distortion
Supports headphone and line output
Partly programmable USB descriptors and configuration
via the I
2
C-bus.
Sound processing (for digital-to analog conversion)
Separate digital volume control for left and right channel
Soft mute
Digital bass and treble tone control
External Digital Sound Processor (DSP) option possible
via standard I
2
S-bus or Japanese digital I/O format
Selectable clipping prevention
Selectable Dynamic Bass Boost (DBB)
On-chip digital de-emphasis.
Document references
"USB Specification"
"USB Device Class Definition for Audio Devices"
"Device Class Definition for Human Interface Devices
(HID)"
"USB HID Usage Table"
"USB Common Class Specification".
GENERAL DESCRIPTION
The UDA1335H is a stereo CMOS codec incorporating
bitstream converters designed for implementation in
USB-compliant audio peripherals and multimedia audio
applications. The UDA1335H is an adaptive asynchronous
sink USB audio device with a continuous sampling
frequency range from 5 to 55 kHz. It contains a USB
interface, an embedded microcontroller, an
Analog-to-Digital Interface (ADIF) and an Asynchronous
Digital-to-Analog Converter (ADAC).
The USB interface is the interface between the USB, the
ADIF, the ADAC and the microcontroller. The USB
interface consists of an analog front-end and a USB
processor. The analog front-end transforms the differential
USB data into a digital data stream. The USB processor
buffers the incoming and outgoing data from the analog
front-end and handles all low-level USB protocols.
The USB processor selects the relevant data from the
universal serial bus, performs an extensive error detection
and separates control information (input and output) and
audio information (input and output). The control
information is made accessible to the microcontroller.
The audio information received from the PC becomes
available at the digital I/O output or is fed directly to the
ADAC. The audio information to be transmitted to the PC
is delivered by the ADIF or by the digital I
2
S-bus interface.
The microcontroller handles the high-level USB protocols,
translates the incoming control requests and manages the
user interface via general purpose pins and an I
2
C-bus.
1998 Aug 28
3
Philips Semiconductors
Preliminary specification
Universal Serial Bus (USB) Audio
Playback Recording Peripheral (APRP)
UDA1335H
The firmware for the microcontroller must be located in an
external (E)PROM.
The ADAC enables the wide and continuous range of input
sampling frequencies. By means of a Sample Frequency
Generator (SFG), the ADAC is able to reconstruct the
average sample frequency from the incoming audio
samples. The ADAC also performs the sound processing.
The ADAC consists of a FIFO, a unique audio feature
processing DSP, the SFG, digital upsampling filters, a
variable hold register, a Noise Shaper (NS) and a Filter
Stream DAC (FSDAC) with integrated filter and line output
drivers. The audio information is applied to the ADAC via
the USB processor or via the digital I/O input.
The ADIF consists of an Programmable Gain Amplifier
(PGA), an Analog-to-Digital Converter (ADC) and a
Decimator Filter (DF). An Analog Phase Lock Loop (APLL)
or oscillator is used for clocking the ADIF. The clock
frequency for the ADIF can be controlled via the
microcontroller. Several clock frequencies are possible for
sampling the analog input signal at different sampling
rates.
Via the digital I/O-bus, an external DSP can be used for
adding extra sound processing features for the audio
received from the PC.
The UDA1335H supports the digital I/O and the I
2
S-bus
interface, with standard I
2
S-bus data input format and the
LSB justified serial data input format with word lengths of
16, 18 and 20 bits.
The wide dynamic range of the bitstream conversion
technique used in the UDA1335H guarantees a high audio
sound quality.
APPLICATIONS
USB monitors
USB speakers
USB headsets
USB telephone/answering machines
USB links in consumer audio devices.
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
UDA1335H
QFP64
plastic quad flat package; 64 leads (lead length 1.95 mm);
body 14
20
2.8 mm
SOT319-2
1998 Aug 28
4
Philips Semiconductors
Preliminary specification
Universal Serial Bus (USB) Audio
Playback Recording Peripheral (APRP)
UDA1335H
QUICK REFERENCE DATA
Note
1. Exclusive the I
DDE
current which depends on the components connected to the I/O pins.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
V
DDE
supply voltage periphery
4.75
5.0
5.25
V
V
DDI
supply voltage core
3.0
3.3
3.6
V
I
DD(tot)
total supply current
-
60
tbf
mA
I
DD(tot)(ps)
total supply current in power-saving
mode
note 1
-
360
-
A
Dynamic performance DAC
(THD + N)/S
total harmonic distortion plus
noise-to-signal ratio
f
s
= 44.1 kHz; R
L
= 5 k
f
i
= 1 kHz (0 dB)
-
-
90
-
80
dB
-
0.0032
0.01
%
f
i
= 1 kHz (
-
60 dB)
-
-
30
-
20
dB
-
3.2
10
%
S/N
signal-to-noise ratio at bipolar zero
A-weighted at code 0000H 90
95
-
dBA
V
o(FS)(rms)
full-scale output voltage
(RMS value)
V
DD
= 3.3 V
-
0.66
-
V
Dynamic performance PGA and ADC
(THD + N)/S
total harmonic distortion plus
noise-to-signal ratio
f
s
= 44.1 kHz;
PGA gain = 0 dB
f
i
= 1 kHz; (0 dB);
V
i
= 1.0 V (RMS)
-
-
85
-
80
dB
-
0.0056
0.01
%
f
i
= 1 kHz (
-
60 dB)
-
-
30
-
20
dB
-
3.2
10.0
%
S/N
signal-to-noise ratio
V
i
= 0.0 V
90
95
-
dBA
General characteristics
f
i(s)
audio input sample frequency
5
-
55
kHz
T
amb
operating ambient temperature
0
25
70
C
1998 Aug 28
5
Philips Semiconductors
Preliminary specification
Universal Serial Bus (USB) Audio
Playback Recording Peripheral (APRP)
UDA1335H
BLOCK DIAGRAM
Fig.1 Block diagram.
handbook, full pagewidth
MBK838
TIMING
ANALOG
PLL
OSC
48 MHz
OSC
ADC
24
27
25
26
28
52
53
54
55
63
1
2
13
17
15
11
12
9
10
32
33
38
39
42
44
ANALOG FRONT-END
USB-PROCESSOR
DIGITAL I/O
FIFO
AUDIO FEATURE
PROCESSING DSP
UPSAMPLE FILTERS
VARIABLE HOLD REGISTER
3rd-ORDER NOISE SHAPER
REFERENCE VOLTAGE
57
59
61
43
47
8
6
MICRO-
CONTROLLER
TEST
CONTROL
BLOCK
SAMPLE
FREQUENCY
GENERATOR
MUX
I
2
S-BUS
INTERFACE
DECIMATOR
FILTER
PGA
LEFT
ADC
PGA
RIGHT
ADC
LEFT
DAC
RIGHT
DAC
49
51
45, 46
41
40
Vref(AD)
Vref(DA)
37
34
36
35
4
21
19
n.c.
UDA1335H
+
-
-
+
VRN
VINR
VSSA2
VINL
VSSA1
VDDA1
VOUTR
RTCB
GP4/BCKO
SHTCB
D
-
7, 5, 3, 64,
62, 60, 58, 56
P0.7 to P0.0
14, 16, 18, 20,
22, 23, 29, 30
P2.0 to P2.7
D
+
VDDI
VSSI
VDDE
GP1/DI
GP0/BCKI
VDDA2
BCK
48
EA
50
ALE
WS
DA
31
PSEN
VSSA3
XTAL2a
VDDA3
VRP
GP2/DO
GP3/WSO
XTAL1a
SDA
VSSX
XTAL1b
XTAL2b
CLK
VDDX
VSSO
VOUTL
TC
SCL
VDDO
VSSE
GP5/WSI
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