PLL602-38N
4x Low Phase Noise Multiplier PECL XO
Universal Low Phase Noise IC
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/24/04 Page 1
FEATURES
Low phase noise output (-127dBc @ 10kHz fre-
quency offset).
12MHz to 25MHz crystal input.
48MHz to 100MHz PECL output.
3.3V operation.
Available in Green (RoHS Compliant) 8-Pin
SOIC package.
DESCRIPTION
The PLL602-38N is a high performance and low
phase noise PECL XO IC chip. It provides phase
noise performance as low as 127dBc at 10kHz off-
set and a typical RMS jitter of 4.5pS RMS ( at
100MHz ). It accepts a fundamental parallel reso-
nant mode crystal input from 12MHz to 25MHz.
BLOCK DIAGRAM
PIN CONFIGURATION
(Top View)
PLL602-38N
X1
X2
GND
GND
VDD
CLKB
VDD
CLK
4
3
2
1
8
7
6
5
Q
PLL602-38N
Q
PLL
(Phase
Locked
Loop)
Oscillator
Amplifier
XIN
XOUT
PLL602-38N
4x Low Phase Noise Multiplier PECL XO
Universal Low Phase Noise IC
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/24/04 Page 2
PIN DESCRIPTIONS
Name
TSSOP
Pin number
Type Description
X1
1
I
Crystal input. See Crystal Specifications on page 2.
X2
2
I
Crystal output. See Crystal Specifications on page 2.
GND 3,4
P
Ground.
CLK 5
O
True
output
PECL.
VDD 6,8
P
Power
Supply.
CLKC 7
O
Complementary
output
PECL.
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
V
DD
4.6 V
Input Voltage, dc
V
I
-0.5
V
DD
+0.5 V
Output Voltage, dc
V
O
-0.5
V
DD
+0.5 V
Storage Temperature
T
S
-65 150
C
Ambient Operating Temperature*
T
A
-40 85
C
Junction Temperature
T
J
125
C
Lead Temperature (soldering, 10s)
260
C
ESD Protection, Human Body Model
2
kV
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con-
ditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. General Electrical Specifications
PARAMETERS SYMBOL CONDITIONS MIN.
TYP.
MAX.
UNITS
Supply Current, Dynamic (with
Loaded Outputs)
I
DD
48MHz < Fout < 100MHz
65
mA
Operating Voltage
V
DD
2.97 3.63 V
Short Circuit Current
50
mA
3. Crystal Specifications
PARAMETERS SYMBOL CONDITIONS MIN.
TYP.
MAX.
UNITS
Crystal Resonator Frequency
F
XIN
Parallel Fundamental Mode
12
25
MHz
Crystal Loading Rating
C
L (xtal)
20
pF
Recommended ESR
R
E
AT cut
30
PLL602-38N
4x Low Phase Noise Multiplier PECL XO
Universal Low Phase Noise IC
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/24/04 Page 3
4. Jitter Specifications
PARAMETERS CONDITIONS
FREQUENCY MIN. TYP. MAX. UNITS
Period jitter RMS
With capacitive decoupling
between VDD and GND.
Over 10,000 cycles.
100.00MHz 4.3 ps
Period jitter Peak-to-Peak
With capacitive decoupling
between VDD and GND.
Over 10,000 cycles.
100.00MHz
27
ps
Integrated jitter RMS
Integrated 12 kHz to 20 MHz
100.00MHz
2.6
4
ps
5. Phase Noise Specifications
PARAMETERS FREQUENCY
@10Hz
@100Hz @1kHz @10kHz @100kHz
UNITS
Phase Noise relative to
carrier (typical)
100.00MHz -65 -95 -120 -125 -121
dBc/Hz
6. PECL Electrical Characteristics
PARAMETERS SYMBOL CONDITIONS
MIN. MAX. UNITS
Output High Voltage
V
OH
V
DD
1.025
V
Output Low Voltage
V
OL
R
L
= 50
to (V
DD
2V)
(see figure)
V
DD
1.620
V
7. PECL Switching Characteristics
PARAMETERS SYMBOL CONDITIONS MIN.
TYP.
MAX.
UNITS
Clock Rise Time
t
r
20% to 80% of signal
300
600
ps
Clock Fall Time
t
f
80% to 20% of signal
300
600
ps
Duty Cycle
Measured @ 50% of signal
45
50
55
%
PECL Levels Test Circuit
PECL Output Skew
OUT
OUT
50
50
VDD
2.0V
50%
OUT
OUT
t
SKEW
PECL Transistion Time Waveform
DUTY CYCLE
45 - 55%
55 - 45%
OUT
OUT
50%
20%
80%
t
R
t
F
PLL602-38N
4x Low Phase Noise Multiplier PECL XO
Universal Low Phase Noise IC
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 11/24/04 Page 4
PACKAGE INFORMATION
C
L
A
E
H
D
A1
e
B
8 PIN SOIC (in mm)
Symbol
Min.
Max.
A
1.35
1.75
A1
0.10
0.25
B
0.33
0.53
C
0.19
0.27
D
4.80
5.00
E
3.80
4.00
H
5.80
6.20
L
0.40
0.89
e
1.27 BSC
Nom
1.55
.175
0.43
0.23
4.90
3.90
6.00
0.645
ORDERING INFORMATION
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information fur-
nished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink's products are not authorized for use as critical components in life support devices or systems without the ex-
press written approval of the President of PhaseLink Corporation.
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL602-38N X C X - R
Order Number
Marking
Package Option
PLL602-38NSCL-R P602-38NSC SOIC 8 - Tape and Reel
PLL602-38NSCL P602-38NSC
SOIC 8 Tube
PART NUMBER
TEMPERATURE
C=COMMERCIAL
PACKAGE TYPE
S=SOIC
NONE=NORMAL PACKAGE
L=GREEN PACKAGE
(RoHS Compliant)
NONE= TUBE
R=TAPE and REEL
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