PMC-Sierra,Inc.
PMC-1980617 (R3)
2001PMC-Sierra, Inc.
PM73488
Released
QSE
5 Gbit/s ATM Switch Fabric Element
FEATURES
SWITCHING ALGORITHM
Supports blocking resolution in the
switch fabric.
Guarantees a lower bound on switch
performance using a patented
randomization algorithm called Evil
Twin SwitchingTM.
Determines routes using specified bits
in the header (self-routing switch
fabric) for unicast traffic.
Determines output groupings using a
lookup table for multicast traffic.
Allows output ports to be combined in
groups of 1, 2, 4, 8, 16, or 32 for
unicast traffic.
Allows output ports to be combined in
groups of 1, 2, or 4 for multicast traffic.
MULTICAST SUPPORT
Supports optimal tree-based multicast
replication in the switch fabric.
Supports 128 internal multicast
groups, expandable to 256 K with
external SRAM.
Provides 64 internal cell buffers for
multicast cells.
DIAGNOSTIC/ROBUSTNESS
FEATURES
Checks the header parity.
Counts tagged cells.
Checks for connectivity and stuck-at
faults on all switch fabric interconnects.
I/O FEATURES
Provides 32 switch fabric interfaces
with integrated phase aligner clock
recovery circuitry.
Provides a Start-Of-Cell (SOC) output
per four switch element interfaces.
Provides an external 16-bit
Synchronous SRAM (SSRAM)
interface for multicast group
expansion.
Provides a demultiplexed address/data
CPU interface.
Provides an IEEE 1149.1 (JTAG)
boundary scan test bus.
PHYSICAL CHARACTERISTICS
3.3 V supply voltage.
5 V tolerant inputs.
596-pin Enhanced Plastic Ball Grid
Array (EPBGA) package.
Operates from a single 66 MHz clock.
APPLICATIONS
A 5 Gbit/s Switch
A 10 Gbit/s Switch
A 5 Gbit/s-to-20 Gbit/s Scalable Switch
Architecture
A 2.4 Gbit/s-to-80 Gbit/s Scalable
Switch Architecture
A 5 Gbit/s-to-320 Gbit/s Scalable
Switch Architecture
BLOCK DIAGRAM
External SSRAM
Backpressure/Ack Flow
To QRT/QSE
BP/ACK from
QRT/QSE
Phase Aligners
and
Receive SE_D_IN
and SE_SOC_IN
BP_ACK
Drivers
Microprocessor
Interface
Unicast Routing and
Distribution Path
Arbiter
Multicast
Path
Data
Drivers
Phase Aligners and
Receive
BP_ACK_IN
JTAG
To QRT/QSE
BP/ACK to
QRT/QSE
PMC-Sierra, Inc.
8555 Baxter Place
Burnaby, B.C. V5A 4V7
Canada
Tel: 604.415.6000
Fax: 604.415.6200
PM73488 QSE
5 Gbit/s ATM Switch Fabric Element
To order documentation,
send email to:
document@pmc-sierra.com
or contact the head office,
Attn: Document Coordinator
All product documentation is available
on our web site at:
http://www.pmc-sierra.com
For corporate information,
send email to:
info@pmc-sierra.com
PMC-1980617 (R3)
2001 PMC-Sierra, Inc.
Evil Twin Switching, QRT, and
QSE are trademarks
of PMC-Sierra, Inc.
U.S. Patents pending
TYPICAL APPLICATIONS
5 Gbit/s ATM SWITCH USING 8 QRTs AND 1 QSE
10 Gbit/s ATM SWITCH USING 16 QRTs AND 2 QSEs
64 x 64 SWITCH APPLICATION (10 Gbit/s)
PM73487 #1
QRTTM
Receive Input
PM73487 #8
QRTTM
Receive Input
4
4
622 Mbit/s
Aggregate
622 Mbit/s
Aggregate
Receive UTOPIA
Level 2
PM73487 #1
QRTTM
Transmit Output
PM73487 #8
QRTTM
Transmit Output
4
4
622 Mbit/s
Aggregate
622 Mbit/s
Aggregate
Transmit UTOPIA
Level 2
PM73488
QSETM
PM73487 #1
QRTTM
Receive Input
PM73487 #16
QRTTM
Receive Input
2
2
622 Mbit/s
Aggregate
622 Mbit/s
Aggregate
Receive UTOPIA
Level 2
PM73487 #1
QRTTM
Transmit Output
PM73487 #16
QRTTM
Transmit Output
2
2
622 Mbit/s
Aggregate
622 Mbit/s
Aggregate
Transmit UTOPIA
Level 2
PM73488
QSETM
2
2
2
2
PM73488
QSETM
PM73487 #1
QRTTM
Receive Input
PM73487 #8
QRTTM
Receive Input
4
622 Mbit/s
Aggregate
Receive
UTOPIA
Level 2
PM73487 #1
QRTTM
Transmit Output
PM73487 #8
QRTTM
Transmit Output
4
622 Mbit/s
Aggregate
PM73487 #9
QRTTM
Receive Input
PM73487 #16
QRTTM
Receive Input
4
PM73487 #9
QRTTM
Transmit Output
PM73487 #16
QRTTM
Transmit Output
Transmit
UTOPIA
Level 2
622 Mbit/s
Aggregate
622 Mbit/s
Aggregate
Receive
UTOPIA
Level 2
622 Mbit/s
Aggregate
16
16
4
Transmit
UTOPIA
Level 2
622 Mbit/s
Aggregate
622 Mbit/s
Aggregate
622 Mbit/s
Aggregate
PM73488
QSETM
16
16
PM73488
QSETM
PM73488
QSETM
PM73488
QSETM
PM73488
QSETM
PDF 
ZIP