51
SFH610A/611A/615A/617A
5.3 kV TRIOS
OPTOCOUPLER
HIGH RELIABILITY
FEATURES
High Current Transfer Ratios
at 10 mA: 40320%
at 1 mA: 60% typical (>13)
Low CTR Degradation
Good CTR Linearity Depending on Forward Current
Withstand Test Voltage, 5300 VACRMS
High Collector-Emitter Voltage, VCEO=70 V
Low Saturation Voltage
Fast Switching Times
Field-Effect Stable by TRIOS
(TRansparent IOn Shield)
Temperature Stable
Low Coupling Capacitance
End-Stackable, .100"(2.54 mm) Spacing
High Common-Mode Interference Immunity (Uncon-
nected Base)
Underwriters Lab File #52744
VDE 0884 Available with Option 1
SMD Option See SFH6106/16/56 Data Sheet
DESCRIPTION
The SFH61XA features a high current transfer ratio, low
coupling capacitance and high isolation voltage. These
couplers have a GaAs infrared emitting diode emitter,
which is optically coupled to a silicon planar phototransis-
tor detector, and is incorporated in a plastic DIP-4
package.
The coupling devices are designed for signal transmission
between two electrically separated circuits.
The couplers are end-stackable with 2.54 mm spacing.
Creepage and clearance distances of >8 mm are
achieved with option 6. This version complies with IEC 950
(DIN VDE 0805) for reinforced insulation up to an operation
voltage of 400 V
RMS
or DC.
Specifications subject to change.
Maximum Ratings
Emitter
Reverse Voltage ............................................................................6 V
DC Forward Current ................................................................ 60 mA
Surge Forward Current (tP
10
s) ............................................ 2.5 A
Total Power Dissipation .........................................................100 mW
Detector
Collector-Emitter Voltage.............................................................70 V
Emitter-Collector Voltage...............................................................7 V
Collector Current ......................................................................50 mA
Collector Current (tP
1 ms)....................................................100 mA
Total Power Dissipation .........................................................150 mW
Package
Isolation Test Voltage between Emitter and
Detector, refer to Climate DIN 40046,
part 2, Nov. 74 ......................................................... 5300 VAC
RMS
Creepage ................................................................................
7 mm
Clearance................................................................................
7 mm
Insulation Thickness between Emitter and Detector............
0.4 mm
Comparative Tracking Index
per DIN IEC 112/VDE0 303, part 1 .........................................
175
Isolation Resistance
V
IO
=500 V, T
A
=25
C ..........................................................
10
12
V
IO
=500 V, T
A
=100
C ........................................................
10
11
Storage Temperature Range .......................................55 to +150
C
Ambient Temperature Range ......................................55 to +100
C
Junction Temperature...............................................................100
C
Soldering Temperature (max. 10 s. Dip Soldering
Distance to Seating Plane
1.5 mm) ....................................260
C
Package Dimensions in Inches (mm)
.268 (6.81)
.255 (6.48)
1
2
4
3
.190 (4.83)
.179 (4.55)
Pin One I.D.
.045 (1.14)
.030 (.76)
4
Typ.
1.00 (2.54)
Typ.
.150 (3.81)
.130 (3.30)
.040 (1.02)
.030 (.76 )
10
Typ.
3
9
.305
(7.75)
.022 (.56)
.018 (.46)
.012 (.30)
.008 (.20)
.135 (3.43)
.115 (2.92)
1
2
4
3
Emitter
Collector
Anode
Cathode
SFH610A
1
2
4
3
Collector
Emitter
Cathode
Anode
SFH611A
1
2
4
3
Collector
Emitter
Anode
Cathode
SFH615A/617A
53
SFH610/11/15/17A
Figure 1. Current transfer ratio (typ.)
vs. temperature
I
F
=10 mA, V
CE
=0.5 V
Figure 2. Output characteristics (typ.)
Collector current vs. collector-emitter
voltage
T
A
=25
C
Figure 3. Diode forward voltage
(typ.) vs. forward current
Figure 7. Permissable diode for-
ward current vs. ambient temp.
Figure 4. Transistor capacitance (typ.) vs.
collector-emitter voltage
T
A
=25
C, f=1 MHz
Figure 5. Permissible pulse handling
capability. Forward current vs. pulse
width
Pulse cycle D=parameter, T
A
=25
C
Figure 6. Permissible power
dissipation vs. ambient temperature
20
15
10
0
5
pF
C
10
-2
10
-1
10
-0
10
1
10
2
V
Ve
C
CE
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