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Preliminary
Product Description
Ordering Information
Typical Applications
Features
Functional Block Diagram
RF Micro Devices, Inc.
7625 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Optimum Technology Matching Applied
Si BJT
GaAs MESFET
GaAs HBT
Si Bi-CMOS
SiGe HBT
Si CMOS
1
2
3
6
5
4
VCC
GND
RF IN
RF OUT
GND
GC
ATTEN
RF2376
CELLULAR TDMA/CDMA LINEAR
VARIABLE GAIN AMPLIFIER
CDMA Cellular Handsets
TDMA Cellular Handsets
The RF2376 is a linear variable gain amplifier suitable for
use in TDMA and CDMA systems in the cellular band.
The features of this device include linear gain control,
high gain, and low noise figure. The IC is manufactured
on an advanced Gallium Arsenide Heterojunction Bipolar
Transistor (GaAs HBT) process and is featured in an
industry-standard miniature 6-lead plastic SOT package.
50dB Linear Gain Control Range
27dB Maximum Gain
Single 2.7V to 3.3V Supply
30mA Supply Current
High Linearity
7dB Noise Figure
RF2376
Cellular TDMA/CDMA Linear Variable Gain Amplifier
RF2376 PCBA
Fully Assembled Evaluation Board
4
Rev A2 010829
.90
.70
.10 MAX
1.30
1.00
3.10
2.70
.37 MIN.
3.00
2.60
1.90
.25
.10
.50
.35
1.80
1.40
9
T
EXT
*
*When Pin 1 is in
upper left, text
reads downward
(as shown).
All dimensions in mm.
1
Package Style: SOT23-6
Preliminary
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Absolute Maximum Ratings
Parameter
Rating
Unit
Supply Voltage
0 to +5.0
V
DC
DC Current
100
mA
Operating Ambient Temperature
-20 to +85
C
Storage Temperature
-40 to +150
C
Parameter
Specification
Unit
Condition
Min.
Typ.
Max.
Overall
V
CC
= 2.8V, V
GC
= 2.0V, T= 25C
Operating Frequency
836
MHz
Usable Frequency Range
800 to >1000
MHz
Maximum Small Signal Gain
24
27
30
dB
Linear Gain Control Range
50
dB
Gain Control Slope
70
dB/V
Maximum gain.
Input VSWR
1.5:1
2.5:1
Over entire gain control range
Output IP3
+22
+25
dBm
Noise Figure
7
dB
Maximum gain
Maximum Average Output Power
+8
dBm
TDMA modulation
Adjacent Channel Power
Rejection
-33
-32
dBc
TDMA modulation; P
OUT
=+8dBm
Alternate Channel Power
Rejection
-61
-57
dBc
TDMA modulation; P
OUT
=+8dBm
Maximum Average Output Power
+10
dBm
CDMA modulation; V
CC
= 3.0V, maximum
gain setting, ACPR<-52dBc.
Adjacent Channel Power
Rejection
-53
dBc
CDMA modulation; V
CC
= 3.0V. For
P
IN
> -23dBm, adjustment of P
IN
is required
to maintain ACPR performance over gain
control range. For P
IN
< -23dBm, ACPR per-
formance is maintained over entire gain con-
trol range.
Alternate Channel Power
Rejection
-67
dBc
CDMA modulation; P
OUT
= +10dBm,
V
CC
= 3.0V.
Power Supply
T = 25C
Supply Voltage
2.8
V
Specifications
2.7 to 3.3
V
Operating range
Gain Control Voltage
0 to 2.0
V
Supply Current
25
30
40
mA
V
CC
= 2.8V, V
GC
= 2.0V
34
mA
V
CC
= 3.0V, V
GC
= 2.0V
18
mA
V
CC
= 2.8V, V
GC
= 0.4V
V
GC
Current
1.5
mA
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
Preliminary
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Application Schematic
Pin
Function
Description
Interface Schematic
1
RF OUT
RF output pin. This pin is DC coupled and requires V
CC
through a bias
inductor sized accordingly to provide a high pass transformation with a
series capacitor.
2
GND
Ground connection. Keep traces physically short and connect immedi-
ately to ground plane for best performance.
3
GC
Analog gain control pin. This pin controls the gain of the IC. Minimum
gain occurs at V
GC
< 0.4V and maximum gain is achieved with
V
GC
=2.0V. 50dB of linear gain control with little variation of input P
1dB
is available.
4
RF IN
RF input pin. This pin is AC coupled.
5
GND
Ground connection. Keep traces physically short and connect immedi-
ately to ground plane for best performance.
6
VCC
Power supply. This pin should be connected to a regulated supply and
requires a bypass capacitor. Voltage is supplied through this pin to the
first stage collector; this voltage also controls the bias. Gain may be
tuned by adjusting the value of the feed inductor.
RF IN
4
5
6
ATTEN
3
2
1
Note orientation of
package in this schematic.
2.7 pF
GC
4.7 nH
47 nF
VCC
RF OUT
12 nH
47 nH
VCC
Preliminary
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Evaluation Board Schematic
4
5
6
ATTEN
3
2
1
Note orientation of
package in this schematic.
C6
2.7 pF
L2
4.7 nH
C3
47 nF
L3
12 nH
C4
47 nH
J2
RF OUT
J1
RF IN
VREG
VGC
P1
1
2
3
4
5
GND
GND
P1-3
P1-4
P1-1
VGC
C2*
C1
100 pF
2376400B
VREG/VCC
VREG/VCC
CON5
L1
6.8 nH
C8
33 pF
C9
33 pF
R1*
DNI
C7
100 pF
C5
47 nF
C16
1 uF
+
VREG/VCC
Preliminary
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Evaluation Board Layout
Board Size 2.0" x 2.0"
Board Thickness 0.028"; Board Material FR-4
Preliminary
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Gain versus V
GC
(CDMA)
(Frequency 836MHz @ -18dBm, V
CC
=3.0V, V
GC
=2.0V to 0.0V)
-30.0
-20.0
-10.0
0.0
10.0
20.0
30.0
40.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0
V
GC
(V)
Gain
(dB)
Gain[dB]@-40C
Gain[dB]@+25C
Gain[dB]@+85C
Noise Figure versus V
GC
@ Room Temperature
(Frequency 836MHz, V
CC
=3.0V, V
GC
=2.0V to 0.5V)
0.0
5.0
10.0
15.0
20.0
25.0
30.0
0.5
0.6 0.7
0.8 0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6 1.7
1.8 1.9
2.0
V
GC
(V)
Noise
Figure
(
dB)
NF [dB]
VSWR versus V
GC
@ Room Temperature
(Frequency 836MHz, V
CC
=3.0V, V
GC
=2.0V to 0.1V)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0
V
GC
(V)
VSWR
S
11
RF INPUT PORT [S11]
RF OUTPUT PORT [S22]
ACPR versus V
GC
(CDMA)
(Frequency 836MHz @ -18dBm, V
CC
=3.0V, V
GC
=2.0V to 0.0V)
-70.0
-60.0
-50.0
-40.0
-30.0
-20.0
-10.0
0.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0
V
GC
(V)
Adjacent
Channel
Power
(
dBc)
ACPR[dBc]@-40C
ACPR[dBc]@+25C
ACPR[dBc]@+85C
Alternate Channel Power versus V
GC
(CDMA)
(Frequency 836MHz @ -18dBm, V
CC
=3.0V, V
GC
=2.0V to 0.0V)
-90.0
-80.0
-70.0
-60.0
-50.0
-40.0
-30.0
-20.0
-10.0
0.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0
V
GC
(V)
Alternate
C
hannel
Power
(
dBc)
Altr.Ch.Power[dBc]@-40C
Altr.Ch.Power[dBc]@+25C
Altr.Ch.Power[dBc]@+85C
Gain versus V
GC
(Single Tone Test)
(RF Frequency 836MHz @ -17dBm, V
CC
=3.0V, V
GC
=2.0V to 0.0V)
-40.0
-30.0
-20.0
-10.0
0.0
10.0
20.0
30.0
40.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0
V
GC
(V)
Gain
(dB)
Gain [dB] @ -40C
Gain [dB] @ +25C
Gain [dB] @ +85C
Preliminary
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IGC versus V
GC
(V
CC
=3.0V, V
GC
=2.0V to 0.0V)
-3000.0
-2500.0
-2000.0
-1500.0
-1000.0
-500.0
0.0
500.0
1000.0
1500.0
0.
0
0.
1
0.
2
0.
3
0.
4
0.
5
0.
6
0.
7
0.
8
0.
9
1.
0
1.
1
1.
2
1.
3
1.
4
1.
5
1.
6
1.
7
1.
8
1.
9
2.
0
V
GC
(V)
I
GC
(uA)
Igc [uA]
Gain & OIP3 versus V
GC
(CDMA Frequency 836MHz, V
CC
=3.0V, V
GC
=2.0V to 0.0V)
-40.0
-30.0
-20.0
-10.0
0.0
10.0
20.0
30.0
40.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0
V
GC
(V)
Gain
(dB)
Gain [dB]
OIP3 [dBm]
Gain versus Input Power
(Frequency 836MHz, V
CC
=3.0V)
-40.0
-30.0
-20.0
-10.0
0.0
10.0
20.0
30.0
40.0
-25.0
-20.0
-15.0
-10.0
-5.0
0.0
5.0
10.0
Input Power (dBm)
Gain
(dB)
Gain[dB]@Vgc 2.0V
Gain[dB]@Vgc 1.5V
Gain[dB]@Vgc 1.0V
Gain[dB]@Vgc 0.5V
Gain[dB]@Vgc 0.3V
Output Power versus Input Power
(Frequency 836MHz, V
CC
=3.0V, V
GC
=2.0V)
-60.0
-50.0
-40.0
-30.0
-20.0
-10.0
0.0
10.0
20.0
30.0
-25.0
-20.0
-15.0
-10.0
-5.0
0.0
5.0
10.0
Input Power (dBm)
Output
Power
(
dBm)
Pout[dBm]@Vgc 2.0V
Pout[dBm]@Vgc 1.5V
Pout[dBm]@Vgc 1.0V
Pout[dBm]@Vgc .5V
Pout[dBm]@Vgc 0.3V
Preliminary
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Rev A2 010829
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