ChipFind - документация

Электронный компонент: RF2466PCBA

Скачать:  PDF   ZIP
Se
e Up
gr
aded Pr
od
uc
t RF2461
NO
T
FOR
N
EW
DE
SI
GNS
6-9
Product Description
Ordering Information
Typical Applications
Features
Functional Block Diagram
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Optimum Technology Matching Applied
Si BJT
GaAs MESFET
GaAs HBT
Si Bi-CMOS
SiGe HBT
Si CMOS
InGaP/HBT
GaN HEMT
SiGe Bi-CMOS
G
N
D
M
I
X
E
R

I
N
G
N
D
L
O
-
B
Y
P
A
S
S
FM-
GND
VCC
LO+
PD
IF SELECT
G
N
D
C
D
M
A
-
C
D
M
A
+
G
N
D
F
M
+
9
7
6
5
8
12
10
11
4
3
2
1
16
15
14
13
RF2466
3V CDMA/FM MIXER
CDMA/FM Cellular Systems
Supports Dual-Mode AMPS/CDMA
Supports Dual-Mode TACS/CDMA
General Purpose Downconverter
Commercial and Consumer Systems
Portable Battery-Powered Equipment
The RF2466 is a receiver dual downconverter designed
for the receive section of dual-mode CDMA/FM cellular
applications. It is designed to downconvert RF signals
while providing 14dB gain in CDMA mode and 7dB gain
in FM mode. Also, it features IF output selection and
power down mode. Noise Figure, IP3, and other specs
are designed to be compatible with the IS-95 Interim
Standard for CDMA cellular communications. The IC is
manufactured on an advanced Silicon Bipolar process.
Dual Mode CDMA/AMPS
Dual Mode JCDMA/TACS
Digitally Selectable IF Outputs
500MHz to 1100MHz Operation
Power Down Mode
RF2466
3V CDMA/FM Mixer
RF2466 PCBA
Fully Assembled Evaluation Board
0
Rev A9 021008
12
MAX
0.05
0.00
0.75
0.65
1.00
0.90
C
0.05
A
4.00
2.00
1.50
SQ.
4.00
2
2.00
1.60
2 PLCS
0.10 C A
2 PLCS
0.10
C A B
M
3.20
2 PLCS
0.75
0.50
3
0.45
0.28
INDEX AREA
0.10 C A
2 PLCS
3.75
3.75
0.10 C B
2 PLCS
0.10 C B
2 PLCS
-B-
0.80
TYP
Dimensions in mm.
NOTES:
1. Shaded pin is lead 1.
2. Pins 1 and 9 are fused.
1. Dimension applies to plated
terminal and is measured
between 0.10 mm and 0.25 mm
from terminal tip.
3
Package Style: LCC, 16-Pin, 4x4
NOT FOR NEW DESIGNS
See Upgraded Product RF2461
!
6-10
RF2466
Rev A9 021008
NO
T
FOR
N
EW
DE
SI
GNS
Se
e Up
gr
aded Pr
od
uc
t RF2461
Absolute Maximum Ratings
Parameter
Rating
Unit
Supply Voltage
-0.5 to +5
V
DC
Operating Ambient Temperature
-40 to +85
C
Storage Temperature
-40 to +150
C
Parameter
Specification
Unit
Condition
Min.
Typ.
Max.
Overall
T = 25C, V
CC
=3.0V, RF=881MHz,
LO=966MHz @ 0dBm, IF1= CDMA,
IF2=FM
RF Frequency Range
200 to 1000
MHz
LO Frequency Range
500 to 1100
MHz
IF Frequency Range
0.1 to 250
MHz
Conversion Gain
12.5
14
dB
IF1, 1k
balanced load.
5
7
dB
IF2, 870
load.
Noise Figure
9
dB
IF1 single sideband.
10.5
dB
IF2 single sideband
Input VSWR
<1.5:1
IF1 with external matching
<2:1
IF2 with external matching
Input IP3
+3
+7
dBm
IF1
+3
+7
dBm
IF2
Input P1dB
-7
dBm
IF1
-4
dBm
IF2
MIX IN to IF1, IF2 Rejection
35
dB
IF1, IF2 Output Freq. Range
70 to 100
MHz
With external IF interface network
Output Impedance
>1
k
IF1, balanced, open collector
870
IF2, single ended, with external inductor.
LO Input
LO Input Range
-10
-3
0
dBm
LO IN to RF Input Rejection
20
dB
LO IN to IF1, IF2 Rejection
15
dB
LO Input VSWR
<2:1
IF1 with external matching network
2.5
IF2 with external matching network
Power Supply
Voltage
2.7
3.0
4.0
V
Current Consumption
16
21
mA
IF1 selected
12
16
mA
IF2 selected
5
A
ENABLE=0
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
6-11
RF2466
Rev A9 021008
NO
T
FOR
N
EW
DE
SI
GNS
Se
e Up
gr
aded Pr
od
uc
t RF2461
Pin
Function
Description
Interface Schematic
1
GND
Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane.
2
IF SELECT
Control line for IF out select. A logic "low" enables the FM output. A
logic "high" enables the CDMA output. The threshold voltage is 1.6V,
and the pin draws less than 50
A when selected.
3
PD
Power down pin. A logic "low" (<1.6V) turns the part off. A logic "high"
(>1.6V) turns the part on. In addition, pin 2 (IF SELECT) should also be
taken low during power down.
4
LO+
Mixer LO balanced input pin. For single-ended input operation, this pin
is used as an input and pin 5 is bypassed to ground.
5
LO-
Same as pin 4 except complementary input.
See pin 4.
6
GND
Ground connection for the mixer. For best performance, keep traces
physically short and connect immediately to ground plane.
7
MIXER IN
Mixer RF input pin. This pin is internally DC-biased and should be DC
blocked if connected to a device with DC present. External matching
network sets RF and IF impedance for optimum performance.
8
BYPASS
Internal voltage reference. External RF and IF bypassing is required.
The trace length between the pin and the bypass capacitors should be
minimized. The ground side of the bypass capacitors should connect
immediately to ground plane.
9
GND
Same as pin 1.
10
GND
Same as pin 1.
11
VCC
Supply voltage for the mixers, bias circuits, and control logic. External
RF and IF bypassing is required. The trace length between the pin and
the bypass capacitors should be minimized. The ground side of the
bypass capacitors should connect immediately to ground plane.
12
FM-
Same as pin 13, except complimentary output. For typical single ended
operation, this pin is connected directly to V
CC
.
See pin 13.
13
FM+
FM IF output pin. This is a balanced output, but is typically used as a
single-ended output. The internal circuitry, in conjunction with an exter-
nal matching/bias inductor to V
CC
, sets the operating impedance. This
inductor is typically incorporated in the matching network between the
output and IF filter. The net output impedance, including the external
inductor, is about 870
at 85MHz. Because this pin is biased to V
CC
, a
DC blocking capacitor must be used if the IF filter input has a DC path
to ground. See Application Schematic.
14
GND
Same as pin 1.
15
CDMA+
CDMA IF output pin. This is a balanced output. The internal circuitry, in
conjunction with an external matching/bias inductor to V
CC
, sets the
operating impedance. This inductor is typically incorporated in the
matching network between the output and IF filter. The net output
impedance, including the external inductor, at 85MHz is higher than
1k
, even though the part is designed to drive a 1k
load. Because
this pin is biased to V
CC
, a DC blocking capacitor must be used if the IF
filter input has a DC path to ground. See Application Schematic.
16
CDMA-
Same as pin 15, except complementary output.
See pin 15.
C1
50 k
PD
50 k
LO IN+
LO IN-
MIX IN
LO OUT
VCC2
BIAS
IF2-
IF2+
2.1 k
8.5 pF
IF1-
IF1+
1.2
pF
1.2
pF
GND2
6-12
RF2466
Rev A9 021008
NO
T
FOR
N
EW
DE
SI
GNS
Se
e Up
gr
aded Pr
od
uc
t RF2461
Pin
Function
Description
Interface Schematic
Pkg
Base
GND
Ground connection. The backside of the package should be soldered to
a top side ground pad which is connected to the ground plane with mul-
tiple vias.
6-13
RF2466
Rev A9 021008
NO
T
FOR
N
EW
DE
SI
GNS
Se
e Up
gr
aded Pr
od
uc
t RF2461
Application Schematic
9
7
6
5
8
12
10
11
4
3
2
1
16
15
14
13
33 nF
15 nH
15 nH
MIX IN
LO IN
8.2 nH
3.3 pF
L
V
CC
FM
Saw
Filter
L
L
L
CDMA
Saw
Filter
200
10 pF
IF SELECT
PD
33 nF
1
F
FM IF OUT
CDMA IF OUT
33 nF
6-14
RF2466
Rev A9 021008
NO
T
FOR
N
EW
DE
SI
GNS
Se
e Up
gr
aded Pr
od
uc
t RF2461
Evaluation Board Schematic
(Download Bill of Materials from www.rfmd.com.)
9
7
6
5
8
12
10
11
4
3
2
1
16
15
14
13
17
T1
**XFMER
R1
33
R2
68
50
strip
J3
CDMA IF1
L2
390 nH
L4
3.3 uH
VCC
IF SEL
ENABLE
C3
9 pF
L3
3.3 uH
C5
33 nF
VCC
C6
10 pF
L5
8.2 nH
C7
3.0 pF
50
strip
J1
LO IN
C9
33 nF
C8
33 nF
L6
15 nH
50
strip
J2
MIXER I
L7
15 nH
L8*
TBD
50
strip
1
4
3
6
2
5
F1
GND GND
GND GND
OUT
I
N
L1
150 nH
C1
33 nF
J3
R3
10
VCC
C2
10 pF
50
strip
J4
FM IF2
**Core: Fair-Rite Balun #2865002402
L12: 3 turns #30 AWG (Green)
L34: 12 turns #32 AWG (Red)
One turn = one pass through BOTH holes.
Winding starts and finishes on same end of core.
L12 and L34 exit opposite ends of core.
F1: filter
2466400 Rev A
R4
200
0
0
Off
0
1
Off
1
0
FM
1
1
CDMA
Enable IF Select Stage
C4
9 pF
P2-3
ENABLE
GND
P2-1
IF SEL
P2
1
2
3
P1
1
2
3
P1-3
NC
GND
P1-1
VCC
C10
1 uF
+
6-15
RF2466
Rev A9 021008
NO
T
FOR
N
EW
DE
SI
GNS
Se
e Up
gr
aded Pr
od
uc
t RF2461
Evaluation Board Layout
Board Size 3.070" x 2.928"
Board Thickness 0.056", Board Material FR-4, Multi-Layer
6-16
RF2466
Rev A9 021008
NO
T
FOR
N
EW
DE
SI
GNS
Se
e Up
gr
aded Pr
od
uc
t RF2461
CDMA Gain and Noise Figure
versus LO Drive
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
11.0
12.0
13.0
14.0
-10.0
-9.0
-8.0
-7.0
-6.0
-5.0
-4.0
-3.0
-2.0
-1.0
0.0
LO Drive (dBm)
CDMA Gain (dB)
8.0
8.5
9.0
9.5
10.0
10.5
11.0
11.5
12.0
12.5
13.0
CDMA NF (dB)
CDMA Gain (dB)
CDMA NF (dB)
CDMA IIP3 and Noise Figure
versus LO Drive
4.0
5.0
6.0
7.0
8.0
9.0
10.0
11.0
12.0
-10.0
-9.0
-8.0
-7.0
-6.0
-5.0
-4.0
-3.0
-2.0
-1.0
0.0
LO Drive (dBm)
CDMA IIP3 (dBm)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
14.0
CDMA NF (dB)
CDMA IIP3 (dBm)
CDMA NF (dB)
FM Gain and Noise Figure
versus LO Drive
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
-10.0
-9.0
-8.0
-7.0
-6.0
-5.0
-4.0
-3.0
-2.0
-1.0
0.0
LO Drive (dBm)
FM Gain (dB)
6.0
8.0
10.0
12.0
14.0
16.0
FM NF (dB)
FM Gain (dB)
FM NF (dB)
FM IIP3 and Noise Figure
versus LO Drive
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
-10.0
-9.0
-8.0
-7.0
-6.0
-5.0
-4.0
-3.0
-2.0
-1.0
0.0
LO Drive (dBm)
FM IIP3 (dBm)
6.0
7.0
8.0
9.0
10.0
11.0
12.0
13.0
14.0
15.0
FM NF (dB)
FM IIP3 (dBm)
FM NF (dB)