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Product Description
Ordering Information
Typical Applications
Features
Functional Block Diagram
RF Micro Devices, Inc.
7625 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Optimum Technology Matching Applied
Si BJT
GaAs MESFET
GaAs HBT
Si Bi-CMOS
SiGe HBT
Si CMOS
20
18
23
Prescaler
128/129 or
64/65
Phase
Detector &
Charge Pump
24
14
12
15
R
ESN
T
R
+
L
OOP
FL
T
OSC SEL
R
ESN
T
R
-
8
TX OUT
1
3
Gain
Control
16
7
13
2
Ref.
Select
OS
C
B
1
OS
C
E
OS
C
B
2
VR
EF
P
PRESCL OUT
MOD CTRL
DIV CTRL
MO
D
I
N
LV
L
A
DJ
22
VC
O
T
U
N
E
RF2513
UHF TRANSMITTER
Single- or Dual-Channel LO Source
FM/FSK Transmitter
Wireless Data Transmitters
433/868/915MHz ISM Band Systems
Wireless Security Systems
The RF2513 is a monolithic integrated circuit intended for
use as a low-cost frequency synthesizer and transmitter.
The device is provided in a 24 pin SSOP package and is
designed to provide a phased locked frequency source
for use in local oscillator or transmitter applications. The
chip can be used in FM or FSK applications in the U.S.
915MHz ISM band and European 433MHz or 868MHz
ISM band. The integrated VCO, dual-modulus/dual-divide
(128/129 or 64/65) prescaler, and reference oscillator
require only the addition of an external crystal to provide
a complete phase-locked oscillator. A second reference
oscillator is available to support two channel applications.
Fully Integrated PLL Circuit
10mW Output Power at 433MHz
2.7V to 5.0V Supply Voltage
Low Current and Power Down Capability
300MHz to 1000MHz Frequency Range
Narrowband and Wideband FM
RF2513
UHF Transmitter
RF2513 PCBA-L
Fully Assembled Evaluation Board, 433MHz
RF2513 PCBA-M Fully Assembled Evaluation Board, 868MHz
RF2513 PCBA-H Fully Assembled Evaluation Board, 915MHz
11
Rev B8 010509
8MAX
0MIN
1
0.050
0.016
0.0098
0.0075
0.2440
0.2284
0.025
0.012
0.008
0.0688
0.0532
0.157
0.150
0.0098
0.0040
0.344
0.337
Package Style: SSOP-24
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Absolute Maximum Ratings
Parameter
Rating
Unit
Supply Voltage
-0.5 to +5.5
V
DC
Power Down Voltage (V
PD
)
-0.5 to V
CC
V
Operating Ambient Temperature
-40 to +85
C
Storage Temperature
-40 to +150
C
Parameter
Specification
Unit
Condition
Min.
Typ.
Max.
Overall
T = 25 C, V
CC
= 3.6V, Freq= 915MHz
Frequency Range
300 to 1000
MHz
Modulation
FM/FSK
Modulation Frequency
2
MHz
Maximum FM Deviation
200
kHz
Dependent upon Supply Voltage
PLL and Prescaler
Prescaler Divide Ratio
64/65 or 128/129
PLL Lock TIme
4/PLL BW
ms
The PLL lock time, from power up, is set
externally by the bandwidth of the loop filter.
PLL Phase Noise
-72
dBc/Hz
10kHz Offset, 10kHz loop bandwidth
-95
dBc/Hz
100kHz Offset, 10kHz loop bandwidth
Reference Frequency
17
MHz
Max Crystal R
S
TBD
100
Charge Pump Current
-40
+40
A
Transmit Section
Maximum Power Level
+3
+8
dBm
Freq= 433MHz
+2
dBm
Freq= 915MHz
Power Control Range
15
dB
Power Control Sensitivity
10
dB/V
Antenna Port Impedance
50
TX ENABL= "1"
Antenna Port VSWR
1.5:1
TX Mode
Modulation Input Impedance
4
k
Harmonics
-23
dBc
Spurious
dBc
Compliant to Part 15.249 and I-ETS 300 220
Power Down Control
Logic Controls "ON"
2.0
V
Voltage supplied to the input; device is "ON"
Logic Controls "OFF"
1.0
V
Voltage supplied to the input; device is "OFF"
Control Input Impedance
25
k
Turn On Time
5 + 4/PLL
BW
ms
From Change in OSC SEL,7.075MHz XTAL
Turn Off Time
4
ms
From Change in OSC SEL,7.075MHz XTAL
Power Supply
Voltage
3.6
V
Specifications
2.7 to 5.0
V
Operating limits
Current Consumption
27
mA
TX Mode, LVL ADJ= 3.6V
10
mA
TX Mode, LVL ADJ= 0V
8
mA
PLL Only
1
A
LVL ADJ= 0V, PLL ENABL=0V,
TX ENABL= 0V, OSC SEL= 0V
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
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Pin
Function
Description
Interface Schematic
1
OSC B2
This pin is connected directly to the reference oscillator transistor base.
The intended reference oscillator configuration is a modified Colpitts.
An appropriate capacitor as chosen by the customer should be con-
nected between pin 1 and pin 2.
2
OSC E
This pin is connected directly to the emitter of the reference oscillator
transistor. An appropriate capacitor as chosen by the customer should
be connected from this pin to ground.
See pin 1.
3
OSC B1
This pin is connected directly to the reference oscillator transistor base.
The intended reference oscillator configuration is a modified Colpitts.
An appropriate capacitor as chosen by the customer should be con-
nected between pin 3 and pin 2.
See pin 1.
4
PLL ENABL
This pin is used to power up or down the VCO and PLL. A logic high
(PLL ENABL>2.0V) powers up the VCO and PLL electronics. A logic
low (PLL ENABL<1.0V) powers down the PLL and VCO.
5
GND1
Ground connection for the PA buffer amp. Keep traces physically short
and connect immediately to ground plane for best performance.
6
VCC3
This pin is used to supply DC bias to the transmitter PA. A RF bypass
capacitor should be connected directly to this pin and returned to
ground. A 100pF capacitor is recommended for 915MHz applications.
A 220pF capacitor is recommended for 433MHz applications.
7
LVL ADJ
This pin is used to vary the transmitter output power. An output level
adjustment range greater than 12dB is provided through analog volt-
age control of this pin. DC current of the transmitter power amp ia also
reduced with output power. This pin MUST be low when the transmitter
is disabled.
8
TX OUT
RF output pin for the transmitter electronics. TX OUT output impedance
is a low impedance when the transmitter is enabled. TX OUT is a high
impedance when the transmitter is disabled.
9
GND2
Ground connection for the Tx PA functions. Keep traces physically
short and connect immediately to ground plane for best performance.
10
VCC1
This pin is used to supply DC bias to the PA buffer amp. A RF bypass
capacitor should be connected directly to this pin and returned to
ground. A 100pF capacitor is recommended for 915MHz applications.
A 220pF capacitor is recommended for 433MHz applications.
11
TX ENABL
Enables the transmitter circuits. TX ENABL>2.0V powers up all trans-
mitter functions. TX ENABL<1.0V turns off all transmitter functions
except the PLL functions.
12
PRESCL
OUT
Dual-modulus/Dual-divide prescaler output. The output can be inter-
faced to an external PLL IC for additional flexibility in frequency pro-
gramming.
13
VREF P
Bias voltage reference pin for bypassing the prescaler and phase
detector. The bypass capacitor should be of appropriate size to provide
filtering of the reference crystal frequency and be connected directly to
this pin.
OSC E
OSC B1
OSC B2
50 k
PLL ENABL
400
4 k
LVL ADJ
40 k
TX OUT
20
V
CC
40 k
20 k
TX ENABL
PRESCL
OUT
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Pin
Function
Description
Interface Schematic
14
MOD CTRL
This pin is used to select the prescaler modulus. A logic "high" selects
64 or 128 for the prescaler divisor. A logic "low" selects 65 or 129 for
the prescaler divisor.
15
DIV CTRL
This pin is used to select the desired prescaler divisor. A logic "high"
selects the 64/65 divisor. A logic low selects the 128/129 divisor.
16
MOD IN
FM analog or digital modulation can be imparted to the VCO through
this pin. The VCO varies in accordance to the voltage level presented
to this pin. To set the deviation to a desired level, a voltage divider refer-
enced to Vcc is the recommended. Because the modulation varactors
are part of the resonator tank, the deviation is slightly dependent upon
the components used in the external tank.
See pin 18.
17
VCC2
This pin is used to is supply DC bias to the VCO, prescaler, and PLL.
18
RESNTR-
The RESNTR pins are used to supply DC voltage to the VCO, as well
as to tune the center frequency of the VCO. Equal value inductors
should be connected to this pin and pin 20.
19
NC
Not internally connected.
20
RESNTR+
See pin 18.
See pin 18.
21
GND3
GND is the ground shared on chip by the VCO, prescaler, and PLL
electronics. Keep traces physically short and connect immediately to
ground plane for best performance.
22
VCO TUNE
Loop filter input to VCO.
23
LOOP FLT
OUT
Output of the charge pump. An RC network from this pin to ground is
used to establish the PLL bandwidth.
24
OSC SEL
A logic high (OSC SEL>2.0V) applied to this pin powers on reference
oscillator 2 and powers down reference oscillator 1. A logic low (OSC
SEL<1.0V) applied to this pin powers on reference oscillator 1 and
powers down reference oscillator 2.
ESD
This diode structure is used to provide electrostatic discharge protec-
tion to 3kV using the Human body model. The following pins are pro-
tected: 1-3, 9, 10,12-15, 17, 21-23.
MOD CTL
DIV CTL
RESNTR-
RESNTR+
4 k
MOD IN
RESNTR-
RESNTR+
4 k
VCO TUNE
LOOP FLT
V
CC
V
CC
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RF2513 Theory of Operation
Introduction
The RF2513 is a low-cost FM/FSK UHF transmitter
designed for applications operating within the 300 MHz
to 1000 MHz frequency range. It is particularly intended
for 315/433/868MHz band systems, remote keyless
entry systems, and FCC Part 15.231 periodic transmit-
ters. It can also be used as a single- or dual-channel
local oscillator signal source. The integrated VCO,
phase detector, prescaler, and reference oscillator
require only the addition of an external crystal to pro-
vide a complete phase-locked loop.
The RF2513 is provided in a 24-pin SSOP-24 package
and is designed to operate from a supply voltage rang-
ing from 2.2V to 5.0 V, accommodating designs using
three NiCd battery cells, two AAA flashlight cells, or a
lithium button battery. The device is capable of provid-
ing up to 10mW output power into a 50
load
(+10dBm) and is intended to comply with FCC require-
ments for unlicensed remote control transmitters.
RF2513 Functional Blocks
A PLL consists of a reference oscillator, phase detec-
tor, loop filter, voltage controlled oscillator (VCO), and
a programmable divider in the feedback path. The
RF2513 includes all of these internally, except for the
loop filter and the reference oscillator's crystal and two
feedback capacitors.
The reference oscillators are Colpitts type oscillators.
Pins 1 (OSC B2), 2 (OSC E), and 3 (OSC B1) provide
connections to the internal transistors used as refer-
ence oscillators. The Colpitts configuration is a low
parts-count topology with reliable performance and
reasonable phase noise. Alternatively, an external sig-
nal could be injected into the base of either transistor.
In either case, the drive level should be around
500mV
PP
. This level prevents overdriving the device
and keeps phase noise and reference spurs minimal.
The user sets which oscillator is operational by setting
pin 24 (OSC SEL) either high or low. This allows the
implementation of two channel systems.
The prescaler divides the Voltage Controlled Oscilla-
tor (VCO) frequency down by either 64/65 or 128/129,
using a series of flip-flops, depending upon the logic
level present at pin 15 (DIV CTRL). A high logic level
will select the 64/65 divisor. A low logic level will select
the 128/129 divisor. This divided signal is then fed into
the phase detector where it is compared with the refer-
ence frequency.
In addition to the DIV CTRL setting, one also sets the
prescaler modulus by setting pin 14 (MOD CTRL)
either high or low. A high logic level will select the 64/
128 divisor. A low logic level will select the 65/129 divi-
sor.
Pin 12 (PRESCL OUT) provides access to the pres-
caler output. This is used for interfacing to an external
PLL IC.
The RF2513 contains an onboard phase detector and
charge pump. The phase detector compares the
phase of the reference oscillator to the phase of the
VCO. The phase detector is implemented using flip-
flops in a topology referred to as either "digital phase/
frequency detector" or "digital tri-state comparator".
The circuit consists of two D flip-flops whose outputs
are combined with a NAND gate which is then tied to
the reset on each flip-flop. The outputs of the flip-flops
are also connected to the charge pump. Each flip-flop
output signal is a series of pulses whose frequency is
related to the flip-flop input frequency.
When both inputs of the flip-flops are identical, the sig-
nals are both frequency and phase locked. If they are
different, they will provide signals to the charge pump
which will either charge or discharge the loop filter or
enter into a high impedance state. This is where the
name "tri-state comparator" comes from.
The main benefit of this type of detector it's ability to
correct for errors in both phase and frequency. When
locked, the detector uses phase error for correction.
When unlocked, it will use the frequency error for cor-
rection. This type of detector will lock under all condi-
tions.
The prescaler and the phase detector bias voltage is
brought out through pin 13 (VREF P). This allows
bypassing of the of these two circuits to filter the refer-
ence crystal frequency.
The charge pump consists of two transistors, one for
charging the loop filter and the other for discharging
the loop filter. It's inputs are the outputs of the phase
detector flip-flops. Since there are two flip-flops, there
are four possible states. If both amplifier inputs are low,
then the amplifier pair goes into a high impedance
state, maintaining the charge on the loop filter. The
state where both inputs are high will not occur. The
other states are either charging or discharging the loop
filter. The loop filter integrates the pulses coming from
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